01244850 - Department of Electronics at Carleton University

Prediction of Phase Noise in CMOS Distributed Oscillators Jing Zhang, Haitao Mei, Tad Kwasniewski, Member, IEEE An implementation based upon 0.18pm CMOS technology achieved 16.6GHz operation (but without tuning ability), and exhibited a measured phase noise of -1 10 dBclHz at 1 M H z offset [3]. In 2001 Hui Wu and Ali Hajimiri implemented a IOGHz CMOS distributed oscillator with a tuning range of 12% and phase noise of -103 dBc/% at 600 kHz offset, and also a 12GHz bipolar oscillator with a tuning range of 26% and phase noise of -99 dBc/Hi at 600 kHz offset. Both distributed oscillators were designed by using the distributed amplifier in forward gain mode and fabricated in a 0.35pm BiCOMS process [4]. Contributions mentioned above form a limited survey of some of those aspects of distributed oscillators which are of practical interest, namely tuning capability, alternative technologies, and operating frequencies. However, the quoted distributed oscillator phase noise figures are based only on measurement results. It would seem that no theoretical work has been done on this important topic. Availability of closed form formulae that accurately predict the phase noise of distributed oscillators would not only be welcomed by engineers working in this field, but its development would improve our understanding. The present work is intended to be a step toward the realization of these goals. The work here adopts the topology of a distributed oscillator based on a distributed amplifier in forward gain mode, which is as same as that of [3] and [4]. Section 11 begins with the introduction of a linear analysis method for a generalized oscillator [SI. Its noise transfer function is given by (3). Section 111 yields to the derivation of an open-loop transfer function of a distributed oscillator. In section IV, the linear oscillator result (3) is applied to the distributed oscillator, and a closed form expression for additive phase noise is developed. The mixing effects resulting from circuit nonlinearity are then included to obtain the final result. The phase noise dependence on design parameters considered is also discussed. In Section V, Harmonic balance (HJ3) simulation in advanced design system (ADS) is used to validate the accuracy of the phase noise prediction given by the closed form formulae of Section IV. In section VI, conclusions are drawn.

Abstract-This paper presents a frequency-domain analytical method for predicting the phase noise in distributed oscillators. The method is based upon a first-order linear model, which is then augmented with the nonlinear effects. Closed form formulae are derived for predicting the distributed oscillator phase noise which contributes from the additive noise and mixing (intermodulation) noise. The principal issues related to phase noise are discussed. Harmonic balance (HB) simulation in advanced design system (ADS) is used to ascertain the accuracy of the phase noise predictions. It is found that the theoretical conclusions are in a good agreement with the phase noise observed in the simulation, which in turn is within acceptable limits. In five test cases, namely, three 4-stage distributed oscillators operating at the three different frequencies and two distributed oscillators in 4-stage and 5-stage respectively operating at the same frequency, the maximum calculatedsimulated phase noise error is about 5.0 dBc/Hz at lMHz offset from the carrier. Index Terms-Distri buted oscillators, phase noise, transmission lines, harmonic balance

I. INTRODUCTION OLTAGE- controlled oscillators play an essential role in wireless communications, especially as components of clock and data recovery circuits and frequency synthesizers. Their operating frequencies have had to keep up with the ever-increasing demands of high-frequency and microwave applications, a situation which has led to the development of a new type of an oscillator, a ‘distributed oscillator.’ The concept of the distributed oscillator shares its origin with that of the broadband distributed amplifier. Like distributed amplifiers, distributed oscillators can operate at frequencies close to MOSFET cut-off frequencies. In 1992, Z. Skvor et a1 proposed a decade-wide electronically-tunable distributed oscillator based upon a distributed amplifier operating in reverse gain mode [I]. In 1998, the same group described an experimental realization of a 4 GHi device having a 1-3.5 GHz tuning range and good spectral purity. The device consists of 4 GaAs PHEMTs connected with microstrip lines [2]. In 1999, an alternative design based on a distributed amplifier operating in forward gain mode was described by B. Kleveland and his colleagues.

V

This work was supported financially by CITO, NSERC and PMC-Sierra.

0-7803-7824-5/03/$17,00 02003 IEEE

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Proceedings SBMO/IEEE MTT-S lMOC 2003

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loaded (gate capacitances) transmission lines - such a set of interconnections is referred to as the 'gate line' in what follows. The transistor drain terminals are similarly modeled, the load now being the transistor output capacitances, and this set of interconnections is referred to as the 'drain line.' Both gate and drain lines are terminated by matching resistors having values equal to their characteristic impedances Z,and Zd. In order to determine the output noise power spectral density of a distributed oscillator using (3), one must derive the distributed oscillator open-loop transfer fimction which is also the transfer hnction of the distributed amplifier.

11. THELINEAR OSCILLATORY MODEL Any oscillator must satisfy the Barkhausen criterion: the gain of the amplifier must be sufficiently large to compensate circuit losses, and the loop phase delay must be an integral multiple of 2~ radians. Fig. 1 shows the simplest linear oscillator model, a small signal one. For this oscillator, each noise source in the oscillator is considered as an input, at fiequencies w ~ + A m close to that of the carrier, the noise power spectral density is shaped by

Fig.1 Linear oscillator model

If the transfer fbnction H ( j w ) is written in a polar form, one finds that namely, ~ ( j w=) ~ ( w )eJ.

Fig.3 Signal path containing the mthtransistor in a n-stage distributed amplifier

In Fig. 3, the signal path containing the r&' transistor of a n-stage distributed amplifier is shown. Consider the path from the input (node 1) via the m' transistor to the output (node 2). One can write the gate input voltage of this transistor as

= 1, ) and (1) takes the form When w = w, , then ~ ( o

where

r, =

+ jp, is the complex propagation constant of

the gate line written in terms of attenuation and phase components QI, and p,. When

111. OPEN-LOOP TRANSFER FUNCTION OF DISTRIBUTED

yn., excites the gate of the mthtransistor, it gives rise

to a drain current in, which may be written as

OSCILLATOR

Let g, be the transistor small signal transconductance. The current in,then flows into the drain line as shown in the Fig. In

3, one half going in each direction. The two currents are equal because the impendance seen by the transistor drain terminal is identical on either side, and equal to the drain line characteristic impedance z, . The component of in, / 2 going

Gate Line

Fig. 2 Distributedamplifier based oscillator

Now let us consider the distributed oscillator in Fig. 2 which is constructed by feeding the output of a distributed amplifier back to its input. In the figure, the gate-to-gate connections of the transistors are modeled as capacitively-

to the 'left' is dissipated by the matching impedance z, , and that going to the 'right' reaches the output (node 2). The output current i,,,,",

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*

iout,m =-.'m

2

'

e-Yd

( f l - m + M )IJ

'

v .

- -&, -

2

e-yP

(m-%1'2

"'

. e- Y d

Iv.

(n-ni+%) I d

(6) where yd =a,.+jp,, is the complex propagation constant of

the drain line written in terms of attenuation and phase components a,, and p, . The voltage at the external load zload = z,then becomes

ANALYSIS OF PHASE NOISE IN DISTRIBUTED OSCILLATORS

A. Design considerationsfor the distributed oscillator Care must be taken to ensure that there is a sufficient loop gain for oscillation to occur. It is required that the phase delay per section of the gate line is equal to that of the drain line. One must satisfy p, .I, = p, . id = p . I . The requirement that

- - c = C, = C. Since each transistor's input capacitance c,,, is greater than its output capacitance c,>,,, , an extra capacitor c,, shown in Fig. 1 =I,

Y,:,,,, = io,,,.,,, . z,= -g &.2 Y" ' e-Y, .,,I

The total output votage

v,~, for

Cm-X) I,

. e- y d

(n-nr+X) / d

(7) a n-stage distributed

amplifier is superposition

- - _

leads to L = L,

=L

and

4 at the transistor drain output is used to compensate for the difference and thus making p, = p,

=p.

The feedback

connection between the gate line and the drain line imposes a matching condition that the characteristic impedance of the gate line z,and that of the drain line z, are equal to Z, = 500hm, we obtain

The open-loop transfer function (voltage gain) of the distributed oscillator is

"d

'add

Cadd

'add

Fig. 4. Distributed oscillator with compensating capacitors

'add

c,,

The requirements above lead to the following modified expressions for a,, p, ,a,, pd

wherec,,,and

c,,,,are

the total input and output parasitic

capacitances of the driving transistor, R, and R, are the input

- -

and output resistances of the driving transistor, and L, , L, ,

C,

and

are the series inductances and parallel

capacitances of the gate line and the drain line per unit length.

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The open-loop transfer function of the distributed oscillator (9) can now be, to some degree, simplified

The amplitude and phase components of (20) are given by

zo e-as'n.I ,

A(@) = -g, .-

2

The derivatives of the transfer function amplitude (21) and phase components (22) are

-e-ad.~./

a,.l-a,.l

B. Analysis ofphase noise We assume that the signal amplitude at the distributed oscillator internal nodes is small and therefore a linear approximation is valid. The noise shaping function (3) obtained previously using linear system assumptions would be utilized to derive an expression for phase noise which is mainly attributed to the presence of the signal path additive noise. The contribution of the intermodulation from the nonlinearity of circuits will be also taken into account.

-d$(w) - -n . 2, . (C + C,)

dw

where c is the parasitic capacitance fi-om one section of transmission lines. Next, the intermodulation effects caused by cilcuit nonlinearity are considered. Mixing noise has the effect of shifting all noise components to sidebands above and below w,. This is true of noise components originating on either side of the carrier, the output noise power density predicted by (24) doubles for these sources

(27) C. Discussion

Fig. 5. Additive noise originatingin the signal propagation path

The phase noise of the oscillator can be defined as the ratio of total output noise power density ~ ~ , t l , , , o , , ~ ~ - l vatf u ~a certain

Fig. 5 shows a CMOS distributed oscillator whose thermal noise of transistor is modeled as the current sources I , ~ , , ,... I ~and ~ I " " , each one being directly connected to the

offset from carrier frequency to the carrier power

drain line. The impedance seen by the modeled current source at each connection point is zd/2(=z,/2). The resulting noise

customary to express such ratio as a logarithmic term, in units of dBc/Hz, thus

p,.

It is

voltage that appears here travels along the drain line and feeds back into the node 1 as an equivalent input noise. Assuming that I,, =I,, = ...= I,,~ = I , , the total input noise power density at node 1 due to the current I,, - I,,, is At constant carrier power

p,, phase noise is a

function of

Ivoi,f,noaz-laral12 . In (2% dA(w)/ dw , d$(o) / dw denote the slopes of the amplitude and the phase of the oscillator transfer function with respect to the frequency. The term dA(o)/ dw is negligible compared to d$(w)/ dm at frequencies close to

) is the drain current referred where I,,' = 4 k ~ . ( 0 . 8 7 3 . g , ~[5] thermal noise power spectral density of a MOSFET. Substitution of (23) into ( 3 ) yields an expression for the output noise power density

0,.Also In2

0~

grn'

( ~ , / 2 ) is ~ a constant. Therefore, only terms, I

+ e-% 3 + . , . + e - a d ( 2 n - 1 1 1

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)=n,&,

and

TABLE I COMPARISON OF FOUR-STAGE DISTRIBUTED OSCILLATORS OPERATING AT THREE DIFFERENT FREQUENCIES Error Phase noise Phase noise Frequency Calculation Simulation CalculatiodSimul (GHz) dBclHz dBc/Hz ation 1MHz offset lMHz offset dBc/Hz Y. 3 -98.6 -103.6 5.0 4.2 13.2 -96.0 -100.2

(d@(w)/dw)'oc n 2 .(C+C,,)' are counted on the right-hand side of (27). The phase noise relation is thereby obtained.

L(h)

0~

lO.log[g,, . n . R, /(n2. ( C + C,,,)*)]

(29)

To provide the reader more insight, two cases are described.

TABLE I I COMPARISON OF FOUR-STAGE AND FIVE-STAGE DISTRIBUTED OSCILLATORS OPERATING AT THE SAME FREQUENCY Phase noise Phase noise Error Frequency Calculation Simulation CalculatiodSimul GHz) dBclHz dBc/Hz ation 1MHz offset lMHz offset dBc/Hz 9.3 -98.6 -103.6 5.0

Case 1: The distributed oscillators designed to operate at different frequencies but having the same topology and the same number of stages n. The frequency of a distributed oscillator is given by [4] as f = 1 4 2 .n . I .

J773?741.Having Z,I-/=,

yields f = 1/[2. z, .(c+ c,")I. Here, z,and n are both constants. The operating frequency can therefore be altered by adjusting e,,?(one must keep in mind that the length of the

04

(keeping the channel length fixed), one can change the oscillation frequency. It is observed that the higher the operating frequency, the smaller e,,,. Smaller input capacitance corresponds to a smaller g , and larger R, . Calculation shows that the effects from g , and R, can be term in the expression of (29). Thus, the worst phase noise performance is predicted at the highest oscillation frequency. Case 2: Two distributed oscillators designed to operate at the same frequency but having different number of stages n. The equation f = 1/[2. n .Z, . (c+ c ,)I~indicates that to

(c+ c,,) and

49

B. Comparison of calculated phase noise and simulated phase noise Table I and Table I1 list the calculated phase noise and simulated phase noise for the two cases mentioned in section V. A. The data in Table I show that as the frequency increases, the calculated phase noise becomes worse, the simulated phase noise follows the same pattern. The maximum error between the calculation and the simulation is 5.0 dBcMz. The data in Table I1 show that for the distributed oscillators operating at the same frequency, calculated and simulated phase noise are almost the same. The maximum error between the calculation and the simulation is 5.0 dBcMz.

(c+ c,"l 2 is a dominant

have the same frequency, the product of

-in3 3

simulations are done in ADS and 0.13pm CMOS technology is employed. The transmission lines are modeled and simulated in Momentum, S-parameter data of transmission lines are obtained and used to do the oscillator analysis in HE3 simulation. In simulation, the following two cases are considered: (a) Four-stage distributed oscillators are designed to operate at three different frequencies. (b) Two distributed oscillators, one with four-stage and one with five-stage, are designed to operate at the same frequency.

transmission lines must be adjusted correspondingly to satisfy the matching requirement, and the parasitic capacitance C from each section of the transmission lines is proportional to c,").In other words, by using different transistor sizes

cancalled out. It can be seen that

-0x 4

n

must be identical in both cases. One can observe that if the oscillator is realized with more stages, a smaller c,,(transistor size) will be necessary. There will be more noise sources from the increased number of stages, but each will contribute lower noise amplitude due to its smaller g,,

VI.

value. Similarly, the oscillator with fewer stages will have fewer noise sources, but each one with greater amplitude. Therefore, it is expected that the phase noise from two oscillators will give about the same performance despite a different number of stages employed.

v.

CONCLUSIONS

In this paper, the phase noise of the distributed oscillator is explored by analyzing both linear and nonlinear conditions. As a result, the analytical formulae for predicting the phase noise are derived. The simulations in ADS verify the correctness of the analytical formulae. On comparing the phase noise obtained from calculations and simulations, it is found that both follow the same pattern and show the acceptable errors (maximum 5.0 dBc/Hz at 1M offset from the carrier). This work provides a practical guideline for designers to be used in predicting the phase noise of a distributed oscillator in the early stage of design.

EXPERIMENTAL VERIFICATION THROUGH SIMULATION

A . Simulation In this section, the accuracy of the analytical formulae for phase noise developed in Sections IV is demonstrated. The

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ACKNOWLEDGMENT A financial support from CITO, N S E R C and PMC-Sierra is gratefully acknowledged.

REFERENCES [I]

[2] [3] [4] [5] [6]

Z. Skvor, S. R. Saunders and C. S. Aitchison, “Novel decade electronically tunable microwave oscillator based on the distributed amplifier,” Electron. Lett.,vol.28,no.l7,pp. 1647-1648,Aug.1992. L. Divina and Z. Skvor, “The Xstributed oscillator at 4 GHz,” IEEE Trans. Microwave Theory Tech., vo1.46, pp2240-2243, Dec. 1998. B. Kleveland, et al, “ Monolithic CMOS distributed amplifer and oscillator,” IEEE ISSCC Dig. Tech. Papers, pp.70-7 I , Feb. 1999. Hui Wu and Ali Hajimiri, “Silicon-based distributed voltage-controlled oscillators,‘‘IEEE Journal of Solid-state Circuits, vol 36, no 3, pp. 493502, Mar. 2001. Behzad Razavi, “A study of phase noise in CMOS oscillators,” IEEE Journal od Solid-Stute Circuits, vo1.3 1 no.3, pp33 1-343, Mar. 1996. Peter H. Ladbrooke, “MMIC design GaAs FETs and HEMTs,” Arrech House. Boston and London

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