Letters International Journal of Bifurcation and Chaos, Vol. 17, No. 1 (2007) 227–242 c World Scientific Publishing Company
1-D DIGITALLY-CONTROLLED MULTISCROLL CHAOS GENERATOR A. RADWAN Department of Engineering Mathematics, Faculty of Engineering, Cairo University, Egypt A. M. SOLIMAN Department of Electronics & Communications, Faculty of Engineering, Cairo University, Egypt
[email protected] A. S. ELWAKIL Department of Electrical and Computer Engineering, University of Sharjah, P. O. Box 27272, Sharjah, Emirates
[email protected] Received January 26, 2006; Revised March 7, 2006 A digitally-controlled MOS-transistor-based 1-D multiscroll chaos generator is proposed. Both the number of scrolls and their location in the phase-space can be controlled via a digital counter and appropriate switches. The circuit is very suitable for integration, and PSpice simulations using a 0.5µ CMOS process parameters are provided. Keywords: Chaos; multiscroll chaos; canonical models.
1. Introduction
model was later modified by inserting one, two or three periodic multistep comparator nonlinearities to generate one-dimensional (1-D), (2-D) or (3-D) scroll-grid attractors [Yalcin et al., 2002]. The key point is that each extra break-point of the folding nonlinearity sets an extra equilibrium point in the state-space around which chaotic trajectories may evolve. Different forms of this nonlinearity were used in different chaotic oscillators to obtain 1-D [Ozoguz et al., 2002; Li & Yang, 2003; L¨ u et al., 2004a] and higher-D multiscrolls [L¨ u et al., 2004b]. Unfortunately, none of the earlier multiscroll generators offers precise digital control. In this work, a 1-D digitally-controlled multiscroll generator is proposed. Through an m-bit
The generation of multiscroll chaotic attractors has been a topic of both theoretical and practical interest [Suykens & Vandewalle, 1993; Suykens et al., 1997; Tang et al., 2001; Yalcin et al., 2002; Ozoguz et al., 2002; Li & Yang, 2003; L¨ u et al., 2004a; L¨ u et al., 2004b]. The first multiscroll oscillators [Suykens & Vandewalle, 1993; Suykens et al., 1997] were derived from the original Chua’s circuit by introducing a nonlinear resistor with multiple breakpoints. The number of possible scrolls is directly proportional to the number of breakpoints. In [Elwakil & Kennedy, 2001], a canonical model, which generated a double-scroll-like attractor using a comparator nonlinearity, was introduced. This
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digital counter, the number of generated scrolls can be precisely controlled. Also, the location in space of the generated scrolls can be precisely controlled.
I1 + 0.6I2 + I3 = If
2. Mathematical Model The proposed multiscroll chaos generator is based on the canonical third-order model [Elwakil & Kennedy, 2001; Sprott, 2000] ¨ + aX ¨ + bX˙ + F (X) = 0 X
Proposed multiscroll current-mode chaos generator.
0.5
0.9
0.4
0.8
0.3
0.7
0.2
0.6
0.1
0.5
0
0.4
−0.1
0.3
−0.2
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−0.3
0.1
−0.4 −2
−1
0 X
(a) Fig. 2.
(3)
normalizing time with respect to C/g, VX with respect to an arbitrary voltage Vref and choosing If = F (I4 ) = F (gVX ) (see Fig. 1), (3) can be transformed into the dimensionless form (1). The key to the proposed design is to implement the currentmode nonlinear function If = F (gVX ) such that it is digitally-controlled and enables the generation of
F(X)
f(X)
g g2 V¨X + 0.6 V¨X + 2 V˙ X = If C C
1
0 −3
(2)
assuming g1 = g2 = g3 = g, C1 = C2 = C2 = C and relating the currents I1,2,3 to the capacitor voltages (VC1 = VX , VC2 = VY , VC3 = VZ ), (2) becomes
(1)
where a and b are constants and F (X) is a nonlinear function. Here we choose to fix a = 0.6 and b = 1. It is easy to show that the current-mode gm − C circuit shown in Fig. 1 can realize this model. In particular, three balanced output transconductance amplifiers g1,2,3 and three capacitors C1,2,3 are configured as successive integrators in cascade. A current
Fig. 1.
amplifier, whose gain equals 0.6 is used to implement the constant a. The current mode equation for Fig. 1 is
1
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−0.5 −3
−2
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0 X
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(b)
Multisegment sawtooth nonlinear functions: (a) f (X) = |2X| − [2X] · sgn(X) and (b) F (X) = (f (X) − 0.5) · sgn(X).
1-D Digitally-Controlled Multiscroll Chaos Generator
multiscrolls. Consider the periodic sawtooth function f (X) given by f (X) = c|X/d| − c[X/d] · sgn(X)
(4)
where c and d are constants, [X/d] assumes the nearest integer value ≥X/d, |X/d| is the absolute value function and sgn(X) is the signum function. Figure 2(a) is a plot of f (X) in the range −3 < X < 3 for c = 1 and d = 0.5. Note that c defines the amplitude while d defines the period and that f (X) is even. We may easily obtain the oddsymmetrical function F (X) = (f (x) − c/2) · sgn(X) shown in Fig. 2(b). Using a proper circuit realization of F (X), d may be digitally-controlled and hence the number of observed scrolls from (1), which correspond to the number of generated sawtooth segments, may also be controlled.
3. Circuit Realization Figure 3 represents the MOS realization of the transconductor cells symbolized in Fig. 1. It is easy to show in Fig. 3(b) that if the transistor aspect ratios are chosen such that KM 1 = KM 2 = K and KM 3 = KM 4 and if all transistors are biased in the saturation mode then Iout = IM 2 − IM 1 = 0.5K(V2 + V1 − 2VT n + 2VDD )(V2 − V1 ) (5)
(a) Fig. 3.
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where VT n is the NMOS transistor threshold voltage and VDD is the biasing supply voltage. Selecting V2 = −V1 , a transconductor cell with gm = −Iout /V1 = 2K(VDD − VT n ) is obtained. The MOS circuit in Fig. 3(a) is designed to force V2 = −V1 by forcing IM 7 = IM 10 if KM 5 = KM 6 , KM 8 = KM 9 and KM 7 = KM 10 . All transistor aspect ratios are given in Table 1. PSpice simulations of the transconductor DC characteristics are shown in Fig. 4 using ORBIT 0.5µ CMOS parameters with VDD = 1.5V. It is seen that the linear operation range of the transconductor is approximately ±0.6V. Using current mirrors, extra copies of the current Iout may be obtained and inverted if needed. Using one such transcondutor cell with two inverted output currents, an absolute-value transconductor can be realized, as shown in Fig. 5. Transistors M13−14 form a simple digital inverter which generates the signal Vdir . This signal is used to switch the direction of the output current between the two pass transistors M11−12 . PSpice simulation of this cell is shown in the upper-left subplot in Fig. 4. Figure 6 shows the symbol and circuit realization of a simple 4-bit digitally-controlled currentsource (DCCS). The output of this cell is ICC which equals (2n )Iref , where Iref is a bias current and n = QA QB QC QD ranges from 0 to 15 depending on the digital bits QA,B,C,D . The transistors are sized such that KM 19 = 2KM 18 = 4KM 17 = 8KM 16 = 8KM 15 ,
(b)
MOS realization of the transconductor cell: (a) circuit used to force V2 = −V1 , and (b) basic transconductor.
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Fig. 4. PSpice simulations of the transconducor DC characteristics (gm ≈ 0.0875 mA/V). Subplot corresponds to the absolutevalue characteristics.
Fig. 5.
Implementation of an absolute-value transconductor.
1-D Digitally-Controlled Multiscroll Chaos Generator
Fig. 6.
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Symbol and circuit realization of a 4-bit digitally-controlled-current-source (DCCS).
as indicated in Table 1. An 8-bit DCCS can be designed in a similar way. Figure 7 shows PSpice simulation of the operation of this circuit when Iref = 3.5µA and QA,B,C,D are connected to the output of a 4-bit digital counter. ICC starts at 0 and ends up at 15Iref then repeats. Since most digital counters require a relatively high voltage (5V ) at their pins to ensure proper operation, the simple circuit shown in Fig. 8 is used to transform the digital levels of an input current Ii into the digital-voltage levels 0V or +5V. The transistor aspect ratios are indicated in Table 1. Of particular importance is KM 29 which is chosen much smaller than KM 28 so that the channel resistance of M29 is much larger than M28 . Finally, Fig. 9(a) shows the over-all implementation of the nonlinear sawtooth function Iout = F (gVX ). The circuit employs the absolute-value transconductor, described above, the DCCS, two digital-current to digital-voltage converters along with some current mirrors and transistor switches. The reference current IR is externally set and then copied to two internal current sources (IR and 0.5IR ) via current mirrors. Iout maybe connected to any of the three currents IO1 , IO2 or IO3 via an external switch. Noting from the circuit diagram that IX = |gVX |, Id = ICC − IX , Ie = IR − Id , Vcp = (+5, 0) · sgn(Id ) and V12 = (+5, 0) · sgn(Ie ), the function of this circuit can be summarized as follows: (1) Initially, the counter is reset to 0000, hence ICC = 0, Id = −IX and Vcp = 0. By connecting
Table 1. MOS transistor dimensions using a 0.5µm CMOS technology (Iref = IR = 3.5µA). Transistor
W/L (µm/µm)
M1,2
5/10
M3,4
50/2
M5,6
100/2
M7,10,24,26,30
10/2
M8,9
40/2
M11,12
4/1
M13,28
10/1
M14
52/1
M15,16
64/2
M17
32/2
M18
16/2
M19
8/2
M20,21
2/1
M22,23
1/1
M25,27,31
52/2
M29
1/10
Vcp to the counter count-up pin, assumed active low, the counter increases to 0001 making ICC = IR . If IR > IX → Vcp = +5 → counter stops. However, if IR < IX → Vcp = 0 → counter increments leading to ICC = 2IR and so on until eventually Vcp = +5 and the counter
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Fig. 7.
Fig. 8.
PSpice simulation of the DCCS circuit using a 4-bit up-counter.
Current-to-voltage digital converter symbol and circuit realization.
1-D Digitally-Controlled Multiscroll Chaos Generator
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(a)
(b) Fig. 9. Implementation of the nonlinear sawtooth function generator: (a) basic circuit, and (b) DL − DU enable control circuit.
stops. Since IX increases with VX , the counter will always seek to increase ICC to the nearest integer value greater than IX . (2) To ensure Id is always < IR (i.e. within one digital step), the current Ie is used. If Id > IR →
Ie < 0 → V12 = 0. By connecting the voltage V11 = V¯12 [see Fig. 9(a)] to the counter countdown pin, assumed active high, the counter will reduce ICC hence reducing Id until it falls below IR and V12 goes high stopping the counter.
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(a)
(b) Fig. 10. PSpice simulations of the nonlinear sawtooth function generator: (a) IO1 − VX , (b) IO2 − VX , (c) IO3 − VX , and (d) IO3 − VX with DL = 3 and DU = 10.
1-D Digitally-Controlled Multiscroll Chaos Generator
(c)
(d) Fig. 10.
(Continued)
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segments on each side will only be generated, as shown in Fig. 10(d).
(3) From the above explanation, Id may be expressed as follows IX − 2n IR if IX < DIR (6) Id = IX − DIR if IX ≥ DIR
4. Multiscroll Generation By connecting the current Iout in Fig. 9(a) to the current labelled If in Fig. 1, the multiscroll chaos generator is complete. The different functions of this generator can be summarized as follows:
where D = 2m − 1; m is the number of counter bits. For a 4-bit counter, D = 15. (4) The output current IO1 = 0.5IR − Ie is always in the range −0.5IR < IO1 < 0.5IR while IO2 = −IO1 and IO3 = −IO1 sgn(VX ). Note that Vdir is the same signal generated in Fig. 5. PSpice simulations of the three currents are shown in Fig. 10. Note that the total number of sawtooth segments is 30; 15 segments on both the positive and negative sides of VX . If an 8bit digital counter is used, the total number of segments would then be 2 ∗ 255 = 510. (5) Figure 9(b) shows a control circuitry which generates the counter enable signal EN. This circuit allows the counter to start counting from a specified lower value DL = QLA QLB QLC QLD to a specified upper value DU = QU A QU B QU C QU D . This means that it is possible to confine the appearing sawtooth segments in the nonlinear function to a specific range. For example, if DL = 3 and DU = 10, the sawtooth segments starting at segment 3 and ending at segment 10 from within the 15
(1) Connecting the switch in Fig. 9(a) such that Iout = IO3 , even-symmetrical scrolls can be generated. In this case, DL is always set to 0 and DU is used to generate a total of 2DU scrolls, DU scrolls in each half-space. PSpice simulations for this case are shown in Fig. 11 respectively for DU = 1, 2, 3, 4, 7, 10 and 15. (2) Connecting the switch in Fig. 9(a) such that Iout = IO1 and setting DL = 0, a number of scrolls equal to DU are generated in the positive-half space only. Alternatively, switching to Iout = IO2, DU scrolls are generated in the negative-half space only. PSpice simulations of these two cases are shown in Figs. 12(a) and 12(b) for DU = 12. (3) Connecting the switch such that Iout = IO1 and specifying values for DL and DU , the scrolls confined to the space positions between DL and DU in the positive-half space will be generated.
(a) Fig. 11. VX − VY PSpice projections of even-symmetrical multiscrolls for DL = 0 and (a) DU = 1, (b) DU = 2, (c) DU = 3, (d) DU = 4, (e) DU = 7, (f) DU = 10, and (g) DU = 15.
1-D Digitally-Controlled Multiscroll Chaos Generator
(b)
(c) Fig. 11.
(Continued)
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(d)
(e) Fig. 11.
(Continued)
1-D Digitally-Controlled Multiscroll Chaos Generator
(f)
(g) Fig. 11.
(Continued)
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(a)
(b) Fig. 12. Generated multiscrolls: (a), (b) 12 scrolls in the positive-only and negative-only half-spaces, (c) scrolls from 3 to 8 in the positive-half, and (d) scrolls from 3 to 9 in the negative-half.
1-D Digitally-Controlled Multiscroll Chaos Generator
(c)
(d) Fig. 12.
(Continued)
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The same is true for the negative-half space if Iout = IO2 . This case is demonstrated in Figs. 12(c) and 12(d) for DL = 3 and DU = 8, 9 respectively.
5. Conclusion We have reported a MOS-based digitally-controlled multiscroll chaos generator. The maximum number of generated scrolls is 2∗(2m −1) if an m-bit counter is used. The confinement of the scrolls in space; i.e. which equilibrium points are selected for the scroll evolution, can also be digitally-controlled using lower and upper location m-bit numbers (DL , DU ). The proposed technique can be easily generalized to produce 2-D and 3-D scroll grids which incorporate more than one nonlinear function F (X).
References Elwakil, A. S. & Kennedy, M. P. [2001] “Construction of classes of circuit-independent chaotic oscillators using passive-only nonlinear devices,” IEEE Trans. Circuits Syst.-I 48, 289–307. Li, Q. & Yang, X. [2003] “A new multiple-scrolls chaotic attractor and its circuit implementation,” Electron. Lett. 39, 1306–1307.
L¨ u, J., Chen, G., Yu, X. & Leung, H. [2004a] “Design and analysis of multiscroll chaotic attractors from saturated function series,” IEEE Trans. Circuits Syst.-I 51, 2476–2490. L¨ u, J., Han, F., Yu, X. & Chen, G. [2004b] “Generating 3-D multiscroll chaotic attractors: A hysteresis series switching method,” Automatica 40, 1677–1687. Ozoguz, S., Elwakil, A. & Salama, K. [2002] “n-scroll chaos generator using a nonlinear transconductor,” Electron. Lett. 38, 685–686. Sprott, J. [2000] “Simple chaotic systems and circuits,” Amer. J. Phys. 68, 758–763. Suykens, J. & Vandewalle, J. [1993] “Generation of ndouble scrolls (n = 1, 2, 3, . . .),” IEEE Trans. Circuits Syst.-I 40, 861–867. Suykens, J., Huang, A. & Chua, L. [1997] “A family of n-scroll attractors from a generalized Chua’s circuit,” Int. J. Electron. Commun. 51, 131–138. Tang, W., Zhong, G., Chen, G. & Man, K. [2001] “Generation of n-scroll attractors via sine function,” IEEE Trans. Circuits Syst.-I 48, 1369–1372. Yalcin, M., Suykens, J., Vandewalle, J. & Ozoguz, S. [2002] “Families of scroll grid attractors,” Int. J. Bifurcation and Chaos 12, 23–41.
