A 1V Supply Low Noise CMOS Amplifier Using Noise Reduction Technique of Autozeroing and Chopper Stabilization Yoshihiro Masui, Takeshi Yoshida, Takayuki Mashimo, Mamoru Sasaki and Atsushi Iwata Graduate School of Advanced Sciences of Matter, Hiroshima University E-mail:
[email protected]
Abstract However these noise reduction techniques using floating analog switches are not suitable for operating at a low supply voltage.
A low-noise CMOS amplifier operating at a 1-V supply voltage is developed using the two noise reduction techniques of autozeroing and chopper stabilization. The proposed amplifier utilizes a feedback with virtual grounded input-switches and a multiple-output switched op-amp. The low-noise amplifier fabricated by a 0.18-µm CMOS technology was measured at a 1-V power supply, and achieved low noise performance of 50-nV/√Hz input noise at 1-MHz chopping frequency.
φ1
φ1
φ2
t
φ2 t
C
Voff,Vfn OP-amp
Vin
Vout
φ1 Offset cansellation
Fig. 1 Principle of Autozeroing technique
Introduction φ1
Recently, sensor chips using a mixed-signal CMOS technology have been applied for sensing and monitoring biological functions [1-2]. The low-noise amplifier is one of the most significant circuits in the sensor chip because of detecting small level signals. However the increasing of dc offset voltage (Voff) and flicker noise (Vfn) becomes a serious problem in scaled CMOS technologies. The autozeroing and chopper stabilization technique are used for reducing these noises [3]. The principle of these techniques is illustrated in Fig.1and2. The autozeroing technique samples the dc offset (Voff) and 1/f noise (Vfn), at phase Φ1. And then subtracts the sampled noise from input signal at phase Φ2. The autozeroing technique can reduce the low-frequency noise of amplifier. Although the autozeroing technique increases baseband noise floor caused by aliasing inherent in the sampling process (Fig.3(b)). The chopper stabilization technique converts the frequency range of input signal to a higher corner frequency, and then demodulates it back to the baseband after amplification. Although the large energy is presented at a chopping frequency (fc) due to the low-frequency noise (Fig .3(c)). The chopper stabilization technique equipped with the low pass filter (LPF) can provide the clean output signal. Using both autozeroing and chopper stabilization techniques enable a reduction of the baseband noise floor and the modulated noise at the chopper frequency (Fig .3(d)) [4].
t
φ2
Voff,Vfn
t
Modulator
Demodulator
φ1
φ1
Vin-
Vin+ φ2
φ2
OP-amp
LPF
Vin+
Voff+Vfn
Vin(f)
V(f)
signal
Vout(f)
signal
f 3fc
LPF-bandwidth
white noise
signal fc
Vin-
φ1
φ1
5fc
Voff+Vfn
f
f fc
3fc
5fc
fc
3fc
5fc
Voff+Vfn
f
(a) no chopping, no autzeroing
Noise PSD (V)
Noise PSD (V)
Fig. 2 Principle of Chopper Stabilization technique
autzeroing frequency Voff+Vfn
f
(b) no chopping, with autzeroing
Voff+Vfn
f
(c) with chopping, no autzeroing
Noise PSD (V)
Noise PSD (V)
chopping frequency chopping frequency Voff+Vfn
Fig. 3 PSD using noise reduction technique
1
f
(d) with chopping, with autzeroing
Circuit Design
10-4
0.8
Input noise PSD(V/√Hz)
Figure 4 shows a equivalent circuit of the low-noise amplifier using autozeroing and chopper stabilization technique operating at a low supply voltage. The chopper modulators (CHP1, CHP2) placed with the virtual ground are implemented by simple analog switches. Because a voltage level of virtual ground is possible to set to any level and input signal amplitude is small. On the other hand, the demodulator CHP3 placed outside the virtual ground is impossible to constitute analog switches because of large output amplitude. Therefore the CHP3 is implemented by the SWOPA. The CHP1, CHP2 and CHP3 are switched by the complementally clock signals of phase Φ1 and phase Φ2. The multi-output SWOPA can configure the autozeroing scheme. During the phase Φ0, the output of SWOPA are connected to its input using dotted lines as shown in Fig. 4, so that it forms a voltage follower. The detected dc offset voltage is sampled into the hold capacitor C2; accordingly, the autozeroing operation cancels the dc offset. If the offset sampling is periodically, low-frequency noise also can be reduced.
Output Waveform(V)
1 Low noise Amplifier (With chopping With autozeroing)
0.6 0.4 0.2 0 0
SWOP (no chopping no autozeroing)
5
10 Time(us)
15
10-5
SWOP (no chopping no autozeroing)
10-6 10-7 10-8 10
-9
Low noise Amplifier (With chopping With autozeroing)
102
(a) Output Waveform
103 104 105 Frequency(Hz)
106
(b) Input noise PSD
Fig. 5 Measurements
Conclusion In this paper, we presented a 1-V supply low-noise amplifier using autozeroing and chopper stabilization technique. The key technique of noise reduction at a low supply voltage is multi-output switched op-amp and chopper modulator implementation in the virtual ground. The low-noise amplifier fabricated with a 0.18-µm CMOS technology was measured at a 1-V power supply, and achieved low noise performance of 50-nV/√Hz input noise at 1-MHz chopping frequency.
C HP2 φ1 φ2 φ2 φ1
Offset sampling(∼5us)
φ0 φ2
C2
References
C2
[1] T. Yoshida et al., “A design of neural signal sensing LSI with multiinput-channels”, IEICE Transactions Fundamentals, vol. E87-A, No. 2, pp.376-383, Feb. 2004. [2] C. C. ENZ et al., “Circuit Techniques for Reducing the Effects of Op-Amp Imperfections: Autozeroing, Correlated Double Sampling, and Chopper Stabilization”, Proceedings of The IEEE, vol. 84, No. 11, pp.1584-1614, Nov. 1996. [3] A. T. K. Tang, “A 3mV-Offset Operational Amplifier with 20nV/√Hz Input Noise PSD at DC Employing both Chopping and Autozeroing”, ISSCC Digest of Technical Papers, pp.386-387, Feb.2002. [4] V. Cheung et al., “A 1V CMOS Switched-Opamp SwitchedCapacitor Pseudo-2-Path Filter”, ISSCC Digest of Technical Papers, pp.154-155, Feb. 2000. [5] Q. Huang, C. Menolfi, “A 200nV offset 6.5nV/√Hz Noise PSD 5.6kHz Chopper Instrumentation Amplifier in 1 m Digital CMOS”, ISSCC Digest of Technical Papers, pp.362-363, Feb. 2001. [6] J. F. Duque-Carrillo et al., “1-V Rail-to-Rail Operational Amplifiers in Standard CMOS Technology”, Journal of Solid State Circuits, vol.35, No. 1, pp.33-44, Jan 2000. [7] T. Yoshida et al., “A 1V Supply 50nV/√Hz Noise PSD CMOS Amplifier Using Noise Reduction Technique of Autozeroing and Chopper Stabilization”, Symposium on VLSI Circuits Feb. 2005
φ1 CH P1 Timing chart
C1 Vinn
φ0
φ1 φ2
Vazp φ1, φ2
Vginn
Voutp
φ2 C1
φ1
Vginp
Vinp Fully-differential 3-output SW OPA
φ0
Voutn Vazn C HP3
O ffset cancellation path
Fig. 4 A equivalent circuit of The low-noise amplifier using autozeroing and chopper stabilization techniques
Experimental Results A test chip of the low-noise amplifier using chopper stabilization and autozeroing technique is fabricated with a 0.18-µm CMOS process (Vthn = 0.42 V, Vthp = 0.5 V).The measurements are shown in Fig. 5. The low-noise amplifier operated with 1-MHz chopping frequency and 5-µs autozeroing time at a supply voltage of 1 V. The input noise of SWOPA shows a typical 1/f noise spectrum, and the noise PSD is 2.5-µV/√Hz at 100 Hz. The proposed low-noise amplifier suppressed the noise PSD to less than 50 nV / √Hz.
2
A 1V Supply Low Noise CMOS Amplifier Using Noise Reduction Technique of Autozeroing and Chopper Stabilization Yoshihiro Masui, Takayuki Mashimo, Takeshi Yoshida, Mamoru Sasaki and Atsushi Iwata Graduate School of Advanced Sciences of Matter, Hiroshima University E-mail:
[email protected] ∼ Circuit Design ∼
∼ Background ∼ Recently, sensor chips use a mixed-signal CMOS technology. The low-noise amplifier is one of the most significant circuits in the sensor chip. However the increasing of dc offset voltage (Voff) and flicker noise (Vfn) becomes a serious problem in scaled CMOS technologies.
Key technique of noise reduction at a low supply voltage ・Multi-output switched op-amp ・Chopper modulator placed in the virtual ground CHP2 φ1 φ2 φ2 φ1
Offset sampling(∼5us)
Vbp1
VDD
φ0 φ2
Timing chart
Vbp Vazp
・Autozeroing technique ・Chopper stabilization technique
φ2
φ1
φ0
φ0
φ1
φ2
Vginp
Vginn
C1 Voutn
Vinn φ2
φ1
φ0
φ0
φ1
φ2
C1
Phase Φ1 ：The dc offset (Voff) and 1/f noise (Vfn) is sampled. Phase Φ2 ：The sampled noise is subtracted from input signal.
φ2
φ2 t
Vin
VSS
CHP3
Vbn1
Vazp φ1, φ2
Vginn
φ1
Vginp
Vout
CHP3
Fully-differential 3-output SWOPA
Vazn CHP3
Offset cancellation path
・ CHP3 is implemented by the SWOPA
・Voff and Vfn is decreased. ・Baseband noise floor Principle of Autozeroing technique caused by aliasing is increased.
・ The multi-output SWOPA can configure the autozeroing scheme.
＜Chopper stabilization technique＞ Voff,Vfn Modulator
∼ Experimental Results ∼
Demodulator φ1 t
LPF
Vin+
t
φ1
・Voff and Vfn is decreased. ・Modulated noise is increased. Voff+Vfn
Vin(f)
V(f)
signal
Vout(f)
signal white noise
signal f fc
3fc
5fc
3fc
5fc
fc
C2
3fc
C1
f
(a) no chopping, no autzeroing
Noise PSD (V)
Noise PSD (V)
Voff+Vfn
Noise PSD (V)
Noise PSD (V)
f
20 15
0.4
0 0
30
CMRR
20
0 102
10 Low noise Amplifier (With chopping、With autozeroing)
0.6
0.2
PSRR
40
10
1 0.8
50
SWOP (no chopping、no autozeroing)
5
10 Time(us)
15
103
104 105 106 Frequency(Hz)
107
10-5 10-6
Noise PSD (@100Hz) SWOP ：2.5μV / √Hz Low noise AMP ：50 nV / √Hz SWOP (no chopping、no autozeroing)
10-7 10-8 10-9 2 10
Low noise Amplifier (With chopping、With autozeroing)
103 104 105 Frequency(Hz)
∼ Conclusion ∼
Baseband noise floor is decreased Modulated noise is decreased Voff+Vfn
f
(d) with chopping, with autzeroing
Using both autozeroing and chopper stabilization techniques is effective for noise reduction.
Noise reduction techniques using floating analog switches ⇒Unsuitable for operating at a low supply voltage
108
-4
f
chopping frequency
Voff and Vfn is decreased Modulated noise is increased
(c) with chopping, no autzeroing
Voff+Vfn
0.18μm CMOS process (Vthn = 0.42 V, Vthp = 0.5 V) Supply voltage 1V Chopping frequency 1MHz、 Autozeroing time 5μs
Voff and Vfn is decreased Baseband noise floor is increased
(b) no chopping, with autzeroing
chopping frequency Voff+Vfn Modulated noise
autzeroing frequency
25
0 101 102 103 104 105 106 107 108 109 Frequency(Hz)
Microphotograph
Principle of Chopper Stabilization technique
＜Using both Autozeroing and Chopper stabilization＞
60
5
１.１ｍｍ
5fc
70
35
10 ＣＭＦＢ
f
f fc
SWOPA
LPF-bandwidth Voff+Vfn
40
30
０.８ｍｍ
φ1
Vin-
φ2
PSRR・CMRR(dB)
φ1
φ2
OP-amp
Input noise PSD(V/√Hz)
φ2
Gain(dB)
Vin+
Output Waveform(V)
φ1
Vin-
Voutp
Voutn
φ0
・ Chopper modulators (CHP1, CHP2) placed with the virtual ground →By simple analog switches
OP-amp
φ1 Offset cansellation
φ2
Vinp
Voff,Vfn φ1
C
φ0
φ1
φ2
Icmb
＜Autozeroing technique＞
t
CHP1
Vazn
Voutp
Icmb
φ1
C2
φ1
∼ Noise Reduction Technique ∼ Noise reduction techniques
C2
We presented a 1-V supply low-noise amplifier using autozeroing and chopper stabilization technique. ・ Key technique Multi-output switched op-amp Chopper modulator implementation in the virtual ground ・ Achievement of the low-noise amplifier 1-V power supply 50-nV/√Hz input noise at 1-MHz chopping frequency
106
