High-Speed Integrated Circuits and Systems Lab., Kwangwoon University, Seoul 139-701, Korea. *Samsung Electro-Mechanics Co., Suwon 443-803, Korea.
IEEE 2008 Custom Intergrated Circuits Conference (CICC)
A CMOS Direct Conversion Transmitter With Integrated In-Band Harmonic Suppression for IEEE 802.22 Cognitive Radio Applications Jongsik Kim, Seungsoo Kim, Jaewook Shin, Youngcho Kim, Junki Min*, Kihong Kim*, Hyunchol Shin High-Speed Integrated Circuits and Systems Lab., Kwangwoon University, Seoul 139-701, Korea * Samsung Electro-Mechanics Co., Suwon 443-803, Korea Abstract- A CMOS direct conversion transmitter for IEEE 802.22 cognitive radio applications is presented. In-band harmonic distortions are effectively suppressed across the full TV band by exploiting single-conversion dual-path architecture with integrated harmonic rejecting mixers and RF tunable filters. A fractional-N synthesizer with a single LC VCO and a wideband muti-modulus (2/3/4/6/8/12/16/24) divider block provide multiphase LO signals. Implemented in 0.18 µm CMOS, the transmitter delivers 0-dBm with in-band distortions less than -42 dBc across 54 - 862 MHz band without off-chip filters. Image and LO leakage components are also suppressed below -45 dBc and 36 dBc, respectively, through calibration circuitry. Measured P1dB and OIP3 are +9 dBm and +20 dBm, respectively.
This Work HRM
I 0º/45º/90º
Tunable RF LPF
I Q
54~450 MHz
Q
DA I Q
Balun
PA
450~862 MHz
IRM
XTAL
Frac-N PLL
LOGEN
Figure 1. Cognitive radio transmitter architecture.
I. INTRODUCTION Cognitive radio (CR) is considered as an enabling technology to overcome the current situation of the limited spectrum resources. It is to intelligently detect the spectrum usage at a given location and utilize temporarily unoccupied spectrum without interfering incumbent users. In 2004, FCC opened TV band for the CR applications. Afterwards, IEEE 802.22 working group initiated the first worldwide standardization activity for the CR-based wireless communication in the TV band between 54 and 862 MHz [1]. CR requires sensing, receiving, and transmitting functions preferably in a single CMOS chip. Recently a spectrum sensing device integrated into a CMOS receiver was reported for the first time, but only covered UHF band [2]. We anticipate that more advanced CR receivers with sensing functions will appear further in future by adopting various existing advanced TV tuner arts. On the other hand, however, CMOS transmitters that are applicable to CR are very limited in literature. A wideband transmitter covering 100MHz – 2.5GHz was reported for SDR applications [3]. But their Cartesian feedback structure was not suitable for a wideband signal and their DDS was not desirable either due to the relatively high current dissipation and high spurious tones. A wideband cable TV transmitter reported in [4] provided very limited output power (-16dBm) and employed high phasenoise ring oscillator and no PLL. In this paper, we present a TV-band direct-conversion transmitter and a frequency synthesizer in CMOS for IEEE 802.22-based CR applications. Effective suppression of inband distortions is achieved through integrated harmonic suppressing architecture and highly linear building block designs. Wideband LO generation is achieved through a
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wideband fractional-N frequency synthesizer with a single LC VCO and a wideband multi-modulus divider block. II. ARCHITECTURE For the CR transmitter, two architectural candidates are considered from the prior TV tuner arts. The most conventional architecture in wideband tuners is the dual conversion structure [5]. It suffers from high power dissipation and requires external SAW filters, thus not suitable for a single chip. For single chip realization, the single conversion architecture with low-IF [6] or zero-IF [7] is more suitable. Maxim et al. [7] demonstrated that a single-conversion zero-IF structure with harmonic rejection mixer and on-chip filtering could eliminate an otherwise bulky off-chip LC tracking filters that was used in [6]. But their two PLL’s and two VCO’s to cover the wideband were still a circuit overhead in [7]. In this work, we adopt single-conversion zero-IF transmitter architecture. Critical in-band distortions are effectively suppressed by integrated on-chip harmonic rejection mixers and accompanying RF tunable filters. Also, we adopt wideband fractional-N frequency synthesizer architecture with a single LC VCO and a wideband LO generation (LOGEN) block. Fig. 1 shows the transmitter architecture. Baseband I/Q signal is fed to the baseband filter. The following upconversion mixers are formed in dual paths. Harmonic rejection mixer (HRM) covers the lower half band from 54 to 450 MHz. The HRM rejects 3rd and 5th harmonic distortions that always fall in the band. The following RF tunable low pass filter (LPF) further suppresses the 7th and higher harmonics. The upper half band from 450 to 862 MHz imposes less severe in-band distortions. Thus a regular image
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VDD
VDD VDD IBB
VDD
Load Stage
Out
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Vop
Von
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RS M1
M 7 M8
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C2 R1
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-BBIN LO
L1
C3
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R1
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M4
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M6
Figure 4. Tunable RF filter.
(a) VDD L1
L1
CL
VB
ML
R2
R1 C1
RL RL
I CP
VB
ML
R2
Vop
Von
R1 C1
ICN
(b) Figure 2. (a) Mixer core schematic. (b) Mixer load stage schematic.
LO Leakage (dB)
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Calibration Current (uA) Figure 3. Simulation results of LO leakage calibration.
rejection mixer (IRM) is adopted for the sake of low current dissipation. A differential cascode driver amplifier delivers 0dBm output power, whose P1dB is set higher to cope with 10dB PAPR of OFDM signals. An external power amplifier is used to boost the output power up to 30 dBm. A fractional-N PLL with a single VCO generates a 1.0 ~ 1.8 GHz signal and subsequent multi-modulus LOGEN delivers appropriate multiphase LO signals to the mixers. This direct-conversion dualpath architecture is suitable for a single chip implementation across the full band without requiring external filters III. CIRCUIT DESIGN A. Wideband Transmitter The 110-mV baseband I/Q signal is fed to the baseband filter to remove the residual quantization noise created by preceding DAC. The baseband filter is a 6th-order Chebyshev II biquad. In order to support all the possible bandwidths of 5,
6, 7, and 8 MHz, the bandwidth is tunable from 2.1 to 6.5 MHz in 64 steps. The gain is also tunable from -15 to +15 dB. DC offset cancellation loop is implemented as a feedback loop, for which the lower cutoff frequency is designed to be tunable from 630 Hz to 9.4 kHz to cope with the various subcarrier spacings of OFDM signals of CR. Fig. 2(a) shows the core schematic of the mixer that is used for both HRM and IRM. Note that the HRM has three of these in parallel performing multiphase (0º/45º/90º) mixing with 1:√2:1 gm-ratio. This circuit structure is chosen for its high linearity [8]. The input stage is linearized through gmboosting with opamp and degeneration resistor RS, in which RS is variable to adjust the mixer gain. Current-mode amplification between the input and switching stages is employed to attain high linearity. Load stage of the mixer is crucial for broad bandwidth and high linearity. Fig. 2(b) details the load schematic. RL and ML provide load resistance. Off-chip inductors (82 nH for HRM and 6.2 nH for IRM) are used for shunt peaking to compensate the gain drop at high frequency and thus ensure a broad bandwidth. A 4-bit switched capacitor array CL is also used to maintain the gain flatness across an almost octave bandwidth. LO leakage calibration circuit is realized in the load stage. A dc level at the mixer output nodes Vop and Von are adjusted by varying ICP and ICN in order to counteract any process-induced dc offset at LO signals, which in turn remove the LO leakage at the RF output. The tuning resolution of the Vop and Von is 4.45 mV. The simulation results in Fig. 3 shows that the LO leakage is successfully removed against LO dc offsets by adjusting the calibration current ICP. In addition, a image leakage calibration circuit, though not shown here, is also added in LO buffers. All of these calibration circuitry allow us to keep the LO and image leakage components below -40dBc across the full TV band under hostile PVT variations. Fig. 4 shows the RF tunable LPF schematic. It consists of input buffer, notch filter (L1 and C1), and Sallen-Key LPF (M3,4, R1,2, C2,3). The source follower input buffer M1,2 is designed in order not to degrade the gain and linearity at the interface with the preceding mixer. The corner frequency of the Sallen-Key is tuned from 100 to 500 MHz by using C2 and R2. The transmission zero is designed to be around the 7th harmonic of the corner frequency, but the far-out attenuation is found to be not sufficient in this case [9]. Thus, we add an additional LC notch filter (L1, C1) such that the resonant frequency falls on the 9th harmonic of the Sallen-Key’s corner frequency. Moreover, they are designed to track each other by
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Frequency Detector
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VCO output 1149 ~1724 MHz IRM LO : 450~862 MHz : {0o/90 o}
Loop Filter PFD
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RF Transmitter
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Test block
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Figure 5. Frequency synthesizer and LO generation.
LC VCO
LOGEN
I2C
I
fin
Q
/2
Figure 7. Chip micrograph.
fin
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30 20
Gain (dB)
10
Figure 6. Wideband semidynamic divide-by-1.5 circuit.
using variable C1, C2, and R2. By doing so, the attenuation for the 3rd and higher in-band harmonics is always kept below -20 dBc across the whole band. Driver amplifier uses a differential cascode type. An external balun is used to deliver a single-ended output signal to the next power amplifier. To achieve high linearity over a wide band, resistive source degeneration is adopted. Degeneration resistor is optimized for high linearity with acceptable gain and noise figure. The simulated OIP3 and P1dB are at least +24 dBm and +10 dBm across the whole band.
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fcutoff fcutoff fcutoff fcutoff fcutoff
: 100MHz : 200MHz : 300MHz : 400MHz : 500MHz
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Frequency (MHz) (a) 20 10
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B. Wideband Fractional-N Synthesizer A fractional-N synthesizer is required for the CR transmitter because it must handle the variable channel bandwidths of 5, 6, 7, and 8 MHz. Fig. 5 depicts the fractional-N synthesizer and its accompanying LOGEN. A single LC VCO with a wideband LOGEN effectively covers the full band. The VCO generates 1149 - 1724 MHz, and the LOGEN converts it to 8 sub-banded signals through the variable division ratio 2/3/4/6/8/12/16/24. The 0º/45º/90º I/Q signals for HRM are generated by the divide-by-4 placed at the end while simple I/Q signals are generated by the divideby-2. In LOGEN, all the dividers are conventional current-mode logic type for its noise superiority, except for the divide-by-1.5. The divide-by-1.5 whose structure is shown in Fig. 6 is designed as a semidynamic type. To achieve almost an octave bandwidth without requiring a quadrature VCO, a wideband single-sideband mixer is realized by employing a three stage RC polyphase filter for the quadrature generation at the input. The peak phase mismatch and attenuation of the polyphase filter is 0.25 degree and -4.5 dB, respectively for octave bandwidth. A 3-bit-level 20-bit-resolution third-order single-loop delta-sigma modulator is employed to achieve low phase noise. In OFDM system, it is known that the integrated phase noise is more critical than the spot phase noise for SNR degradation [10]. We have optimized the loop bandwidth and parameters in order to attain the integrated phase noise of less than 1 RMS degree or equivalently -35 dBc.
0 -10
fcuttoff = 100 MHz fcuttoff = 200 MHz
0 -10 -20 -30 -40 0.0
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Frequency (GHz) (b) Figure 8. Measured characteristics of RF tunable filter. (a) Tunable bandwidth from 100 to 500 MHz. (b) Effect of LC notch filter for the corner frequencies of 100 and 200 MHz.
IV. MEASUREMENT RESULTS The transmitter is fabricated in a 0.18-µm RF CMOS technology. Fig. 7 is a micrograph of the fabricated chip. The silicon area is 2.4×3.4 mm2 including a test block. The chip is packaged in a 48-pin LPCC and tested on an evaluation board. An I2C interface is used for digital programming and tuning. The full chip including synthesizer draws 84 ~ 119 mA from a 1.8-V supply depending on the operation modes. Fig. 8(a) shows the RF tunable filter characteristics. As can be seen, the corner frequency is tuned from 100 to 500 MHz in 5 steps. Fig. 8(b) illustrates the effects of the LC notch filter. It shows that the far-out stop-band attenuation is significantly improved by using the LC notch filter. Fig. 9 shows the measured output spectrum of the transmitter without any offchip filter, where 3-MHz single-tone baseband input is used. The worst in-band distortion occurs when LO is the lowest 54 MHz. As clearly compared in Fig. 9(a), the in-band distortions
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-15.6dBc
LO=54MHz Tunable RF Filter “off”
Figure 11. Measured phase noise of fractional-N PLL at 1.6 GHz.
LO=54MHz Tunable RF Filter “on”
-42dBc
TABLE I. MEASURED PERFORMANCE SUMMARY
(a) LO=300MHz Tunable RF Filter “on” -52.4dBc
Technology
0.18 µm CMOS
Operating Frequency
43.75 ~ 900 MHz
Output P1dB
+9 dBm
Output IP3
+20 ~ +25 dBm
In-band harmonic distortions
< -42 dBc
LO Leakage
< -36 dBc
Image Rejection
< -45 dBc
Integrated Phase Noise
-34.6 dBc @ 1.6 GHz
Supply Voltage
1.8 V
Current Consumption
84 ~ 119 mA
V. CONCLUSION A zero-IF single-conversion transmitter IC for IEEE 802.22 Cognitive Radio applications has been presented. Realized in 0.18-µm CMOS, it covers the full TV band from 54 to 862 MHz. The in-band harmonic distortions are effectively suppressed by adopting dual-path upconversion structure with integrated harmonic rejecting mixers and tunable filters. A fractional-N frequency synthesizer with a single VCO and a wideband LOGEN is used for providing LO signals across the full band. Measurement results have shown acceptable performances for CR applications in future.
In-Band Harmonic Distortions (dBc)
(b) Figure 9. Measured output spectrum with (a) LO = 54MHz and tunable RF filter on and off, and (b) LO = 300MHz and tunable RF filter on. -20 -30
In-Band
Out-Band
HD3 HD5 HD7
-40 -50
ACKNOWLEDGMENTS This work has been supported in part by MIC ITRC program IITA-2008-C1090-0801-0038, and Seoul R&BD Program GR070039, and SEMCO.
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REFERENCES
2100
Frequency (MHz) Figure 10. Measured harmonic distortions against RF frequency.
are dramatically diminished by using the tunable RF filter. Fig. 9(b) shows the in-band distortion characteristics when LO=300MHz. Fig. 10 summarizes the measured in- and outband harmonics. As can be seen, the in-band harmonic distortion improves as the frequency increases and is always maintained below -42 dBc. The image and LO leakages are also measured less than -45 and -36 dBc, respectively, across the full band. The P1dB and OIP3 of the full transmitter are measured to be about +9 dBm and +20 ~ +25 dBm, respectively, across the full band. Fig. 11 is the PLL phase noise directly measured at the VCO output frequency of 1.6 GHz. The spot phase noises are -89 and -117 dBc/Hz at 1 kHz and 1 MHz offsets, respectively, and the integrated phase noise from 1 kHz to 4 MHz is -34.6 dBc. Table I summarizes the measured performance of the transmitter chip.
[1] IEEE 802.22 working group, http://www.ieee802.org/22 [2] J. Park et al., “A Fully-Integrated UHF Receiver with Multi-Resolution Spectrum Sensing (MRSS) Functionality for IEEE 802.22 Cognitive Radio Applications,” IEEE ISSCC, Feb. 2008 [3] G. Cafaro et al., “A 100 MHz – 2.5 GHz Direct Conversion CMOS Transceiver for SDR Applications,” IEEE RFIC Symp., Jun. 2007 [4] M. Borremans et al., “A CMOS Dual-Channel 100-MHz to 1.1-GHz Transmitter for Cable Applications,” IEEE JSSC, Dec. 1999 [5] J. –M. Stevenson et al., “A Multi-Standard Analog and Digital TV Tuner for Cable and Terrestrial Applications,” IEEE ISSCC, Feb. 2007 [6] V. Fillatre et al., “A SiP Tuner with Integrated LC Tracking Filter for Both Cable and Terrestrial TV Reception,” IEEE ISSCC, Feb. 2007 [7] A. Maxim et al., “0.13u CMOS Hybrid TV Tuner Using a Calibrated Image and Harmonic Rejection Mixer,” Symp. VLSI Cir., Jun. 2007 [8] H. Yoo et al., “A 97.2 mW 1.8 GHz Low Power CMOS Transmitter for Mobile WiBro and WiMAX,” IEEE RFIC Symp., Jun. 2007 [9] P. Su, “A Dual-Band Enhanced Harmonic Rejection Filter for Modulators in GSM and DCS Transmitters,” ESSCIRC, Sep. 2003 [10] H. Steendam et al., “The Effect of Carrier Phase Jitter on the Performance of OFDMA Systems,” IEEE T. Comm., Apr. 1998
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