JOURNAL OF LIGHTWAVE TECHNOLOGY, VOL. 22, NO. 12, DECEMBER 2004
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A Compact Nonlinear Equivalent Circuit Model and Parameter Extraction Method for Packaged High-Speed VCSELs Kyriaki Minoglou, Efstathios D. Kyriakis-Bitzaros, Member, IEEE, Dimitrios Syvridis, and George Halkias, Member, IEEE
Abstract—A compact nonlinear circuit model for the input of packaged high-speed vertical-cavity surface-emitting lasers (VCSELs) is presented in this paper. The model includes the thermal effects as well as the parasitics, due to the various levels of the packaging hierarchy, to ensure a realistic representation of the input of the VCSELs. The values of the model parameters are extracted from dc current–light–voltage characteristics and 11 vector measurements using a two-step parameter extraction procedure. Extraction of the model parameters and comparison between measured and simulated results have been performed for two different commercially available VCSELs operating at 2.5 Gb/s. The achieved agreement between the measured and simulated results is very satisfactory for the dc as well for the 11 curves in the frequency range from 3 MHz to 3 GHz. Index Terms—Circuit optimization, nonlinear circuits, parameter extraction, vertical-cavity surface-emitting lasers (VCSELs).
I. INTRODUCTION
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IGH-SPEED vertical-cavity surface-emitting lasers (VCSELs) have become the key technology for the medium-/ short-range optical interconnections ranging from the local area networks (LANs) down to the chip-to-chip links. Currently, there is an urgent request from the integrated circuit (IC) designers for a compact nonlinear VCSEL equivalent circuit model in order to simulate adequately the mixed photonic/very large scale integration (VLSI) modules under a unified VLSI design computer-aided design (CAD) environment. Previous research efforts have addressed the problem of the VCSEL model as a whole. In general, these approaches employ either a very simplified intrinsic VCSEL model or a simplistic parasitic input circuitry. Hence, these approaches are of limited relevance for the IC designer who needs an accurate nonlinear equivalent circuit model for the input of the VCSEL to enable the simulation of the high-speed nonlinear behavior of the IC circuitry/packaged VCSEL subsystems. In [1], a comprehensive circuit-level VCSEL model has been presented. This comprehensive model, based on photon,
Manuscript received December 22, 2003; revised July 20, 2004. K. Minoglou and G. Halkias are with the Institute of Microelectronics, National Center for Scientific Research (NCSR) “Demokritos,” 15310 Agia Paraskevi, Greece (e-mail:
[email protected]). E. D. Kyriakis-Bitzaros is with the Institute of Microelectronics, National Center for Scientific Research (NCSR) “Demokritos,” 15310 Agia Paraskevi, Greece, and also with the Department of Electronics, Technological Educational Institute (TEI) of Piraeus, 12244 Egaleo, Greece. D. Syvridis is with the Department of Informatics and Telecommunications, University of Athens, 15784 Athens, Greece. Digital Object Identifier 10.1109/JLT.2004.834983
carrier, and temperature rate equations, describes adequately the internal behavior of the device. However, the input of the VCSEL is simply modeled using a fixed capacitance in shunt with a nonlinear current-controlled voltage source without any parasitic element. On the other hand, in [2] and [3], simplified resistive–inductive–capacitive (RLC) and resistive–capacitive (RC) equivalent circuit input models have been employed, respectively, in order to approximate the ac response of VCSEL optical output, whereas the input parasitic elements are inmeasurements. Similarly, dependently estimated using Honeywell [4] employs a distributed RLC VCSEL equivalent circuit input model consisting of two LC stages that correspond to wire-bond and package lead parasitics, while the intrinsic VCSEL is modeled only as a resistor. Honeywell’s approach does not provide a parameter extraction method and estimated values are used for the parasitics. An interesting and detailed analysis of modeling laser packages (TO-56 and TO-46) is described in [5], with calculation of the parasitics based on their physical geometries, considering the VCSEL only as a resistance. In [6], a different approach, relying on the measurement of the small-signal optical response, is used to determine a function for the modulation response. Hence, the cutoff frequency due to the parasitics, the relaxation resonance frequency, and the damping frequency of the VCSEL are determined with a best-fit procedure. In order to overcome the limitations of previous literature, we have developed a compact nonlinear equivalent circuit model for the input of the VCSEL that 1) includes a modified junction model in order to describe accurately the exponential form and the temperature dependence of the VCSEL current–voltage (I–V) characteristics as well as the dependence of the VCSEL’s internal capacitance on the external bias and 2) employs a distributed RLC input network to model accurately the various input packaging parasitics. Unlike the method followed in [6], our approach does not require the measurement of the optical to determine the parameters of the equivalent circuit model of the packaged VCSELs. The values of all the required parameters are extracted using a two-step procedure based on measurements of the dc current–light–voltage (I–L–V) characteristics and of the small-signal . II. MODEL DESCRIPTION The entire circuit model for the input of a packaged VCSEL mounted on a test fixture is illustrated in Fig. 1. The leftmost , and , models the part of the network, consisting of
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Fig. 1. Equivalent circuit model for the input of the VCSEL.
test fixture that carries the VCSEL and provides a connector to the measurement equipment. The next stage represents the and of the package leads, followed by the parasitics inductance and capacitance of the wire bonds of the package. The intrinsic VCSEL is modeled by a series resistance (representing the access resistance of the VCSEL) and a nonlinear temperature-dependent current-controlled voltage source (representing the intrinsic voltage drop in the active region (repof the VCSEL) in shunt with a nonlinear capacitance resenting the p–n-junction diode capacitance as well as the distributed Bragg reflectors and the oxide layer capacitances). Hence, the intrinsic voltage drop is modeled according to the following semi-empirical relation, which corresponds to the series combination of a temperature-dependent resistor and a modified p–n-junction diode: (1a) (1b) where is the bias current and is the saturation current of the diode. The first term of (1a) corresponds to a temperature, where is an efdependent internal resistance fective reference temperature, is the internal temperature of is the internal resistance at temperature the VCSEL, and . The inverse-temperature dependence of this internal resistance indicates that the semiconductorlike behavior prevails in the usual temperature range of operation of the VCSEL. The second term of (1a) corresponds to a diode with thermal voltage and temperature-dependent saturation current . It is worthwhile noting that (1a) and (1b) are considered to be valid only within the range of the temperature measurements and cannot be used to extrapolate the operation temperature of the device. Hence, the effective reference temperature falls well below (usually around 160 K) the usual temperature range of the operation of the VCSELs. This practically results in limited values of the second term of (1a), thus avoiding any numerical instability. The saturation current is described is a by the diode’s model from SPICE [7] by (1b), where
thermal voltage sensitivity factor, is the saturation current at is the temperature exponent of the saturation temperature is the energy gap, and is the Boltzman’s concurrent, stant. A comparison of (1a) and (1b) to the expressions (33) and (34) in [1] indicates that in our approach the saturation current is described by a physics-based equation rather than an empirical relation, the thermal voltage is a function of temperature rather than a simple model parameter, and the series resistance depends on the temperature in a more consistent manner. Moreover, the internal device temperature is dynamically calculated using the thermal-rate equation [1] (2) is the thermal impedance of the VCSEL, is the where is the ambient thermal time constant (taken to be 1 s), is the output optical power. The thermal temperature, and impedance can be independently measured using various methods (see, e.g., [8] and [9]). The thermal-rate equation is implemented using an equivalent circuit, which consists of a and driven by parallel RC circuit with . a polynomial current source The intrinsic capacitance of the VCSEL is modeled by the junction diode’s equation from SPICE [7], shown in (3) at the bottom of the page, which can adequately take into account is the zero bias junction capacithe nonlinearities, where tance, and are grading coefficients, and is the built-in , junction voltage. Model parameters for extraction are while is taken to be 0.5. and III. PARAMETER EXTRACTION AND EVALUATION OF THE MODEL For the determination of the parameters of (1a), (1b), and (3) as well as of the parasitic elements of the input network both dc and ac data are required. Hence, a two-step parameter extraction procedure has been followed. Initially, the dc I–L–V characteristics are measured at different ambient temperatures and a lookup table is generated using these measurements. Under the dc operating conditions, the third term of the right-hand side of (2) is omitted and, therefore, the internal temperature of the device can be easily obtained using the lookup table containing the measured dc I–L–V characteristics. Hence, these data are used in the optimization tool OPSIM of Anacad, which employs a modified Levenberg–Marquardt method in order to extract the , and ) and parameters of (1a) and (1b) (i.e., . In practice, is much greater the value of the sum than (as indicated also by the results of Table I), and the disfrom is performed in the second step of the tinction of
(3)
MINOGLOU et al.: PACKAGED HIGH-SPEED VCSELs
TABLE I PARAMETERS RESULTING FROM FITTING THE VCSEL MODEL EXPERIMENTAL DATA FROM TWO DIFFERENT DEVICES
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Fig. 2. Measured I–L characteristics of VCSEL B at various ambient temperatures.
parameter extraction procedure where the value of is imposed as a constraint. Hence, in the second step of the parameter extraction procedure, we employ the previously extracted parameters for the I–V (as expressed by (1a) and (1b)) and the data from the vector measurements to determine the input , and ) as well parasitic elements (i.e., as the parameters of (3) (i.e., , and ). It is worthwhile parameter is measured only at room temperanoting that the ture, assuming that the essential thermal effects were adequately taken into account during the first step of the parameter extraction procedure. Two different commercially available VCSELs (hereafter referred to as VCSEL A and VCSEL B, respectively) were used to evaluate the model. Both devices were oxide-apertured operating at 850 nm, capable to run at 2.5 Gb/s and packaged in TO-46. All the packaged devices were mounted on special gold-plated test fixtures to ensure accurate dc and s-parameter measurements. The thermal resistance of both VCSELs was 900 K/W. taken from the data sheets to be Following the two-step parameter extraction procedure, initially the dc I–L–V characteristics have been measured at ambient temperatures 27 C, 45 C, 60 C, and 80 C, with bias current varying from 0 to 10 mA with a step of 0.1 mA (Fig. 2). Thus, the optimization tool OPSIM is supplied with the measured data and, starting from reasonable initial values, the first set of the parameters (i.e., , and ) is extracted. In the second step of the extraction procedure, the vector measurements have been performed for bias currents 3, 5, and 8 mA and within the frequency range of 3 MHz to 3 GHz. The optimization tool is supplied with the previously extracted parameters and the measured data and, thus, the second set of the parameters (i.e., , and ) is extracted. It is worthwhile noting that, initially, we have used in the optimization tool multiple targets (i.e., matching simultaneously the values measured at three different bias currents: 3, 5, and 8 mA). Then, we have used only one target (i.e., the values measured at 5 mA). We have observed that the
Fig. 3. Measured values (dotted line) and simulated (continuous line) I–V characteristics of VCSEL B at various ambient temperatures.
final values of the extracted parameters as well as the error between the measured and simulated ac responses at different bias currents remain almost unchanged, while the computation time decreases considerably. Therefore, we have concluded that the parameters extracted using a single target may be used to simulate the circuit at different bias currents. The whole parameter extraction operation takes only a few minutes on a typical UNIX workstation. The extracted values as well as the initial guesses for the parameters of the two devices (VCSEL A and VCSEL B) are given in Table I. The extracted values can be used to reproduce parameters and to inboth the I–V characteristics and the spect whether the measurements match to the simulation results. Figs. 3 and 4 show that very good agreement between the simulations and measurements is achieved for both VCSELs at various temperatures. for Figs. 5 and 6 illustrate the measured and modeled VCSEL A and VCSEL B, respectively, at a bias current of 5 mA
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Fig. 4. Measured values (dotted line) and simulated (continuous line) I–V characteristics of VCSEL A at various ambient temperatures.
Fig. 7. Measured values (asterisks) and simulated (continuous line) S parameter for VCSEL A at the bias current of 8 mA with the parameters extracted at the bias current of 5 mA.
for VCSEL Fig. 7 shows the measured and modeled A at the bias current of 8 mA. Although the parameters used curve are those extracted using the for the modeled data measured at the bias current of 5 mA, good agreement between data and model is observed. The good agreement of the curves in both bias currents indicates that the thermal effects are adequately modeled with our two-step extracting procedure. Moreover, from Figs. 5 and 7, it is observed that the curves for the two different bias currents differ mainly at frequencies below 2 GHz, where the current-dependent intrinsic VCSEL behavior is the dominant factor. At higher frequencies, the input impedance is dominated by the parasitics of the TO-46 package, and, therefore, the differences between the two curves are minimized. Fig. 5. Measured values (asterisks) and simulated (continuous line) parameter for VCSEL A at the bias current of 5 mA.
S
IV. CONCLUSION A compact and efficient nonlinear equivalent circuit model of high-speed VCSELs has been presented. The model takes into account the intrinsic nonlinear behavior of the device, including the thermal effects, as well as the parasitics introduced by the package and the test fixture hosting the device. The 17 model parameters are extracted from measurements of the dc I–L–V characteristics at different ambient temperatures and the parameters at different bias currents, using a two-step optimization procedure. The simulation results of the proposed model showed a very satisfactory agreement with the measurements. The model may be of great value for the IC designers requiring a compact nonlinear equivalent circuit model for the input of the VCSEL in order to simulate accurately the mixed photonic/VLSI modules under a unified VLSI design CAD environment.
Fig. 6. Measured values (squares) and simulated (continuous line) parameter for VCSEL B at the bias current of 5 mA.
S
for the frequency range from 3 MHz to 3 GHz. The maximum average error was found to be 6.1%.
REFERENCES [1] P. V. Mena, J. J. Morikuni, S.-M. Kang, A. V. Harton, and K. W. Wyatt, “A comprehensive circuit-level model of vertical-cavity surface-emitting lasers,” J. Lightwave Technol., vol. 17, pp. 2612–2632, Dec. 1999. [2] M. Bruensteiner and G. C. Papen, “Extraction of VCSEL rate-equation parameters for low-bias system simulation,” IEEE J. Select. Topics Quantum Electron., vol. 5, pp. 487–494, May/June 1999.
MINOGLOU et al.: PACKAGED HIGH-SPEED VCSELs
[3] D. Wiedenmann, R. King, C. Jung, R. Jager, R. Michalzik, P. Schnitzer, M. Kicherer, and K. J. Ebeling, “Design and analysis of single-mode oxidized VCSEL’s for high-speed optical interconnects,” IEEE J. Select. Topics Quantum Electron., vol. 5, pp. 503–511, May/June 1999. [4] J. K. Guenter, J. A. Tatum, A. Clark, R. S. Penner, R. H. Johnson, R. A. Hawthorne, J. R. Biard, and Y. Liu, “Commercialization of Honeywell’s VCSEL technology: Further developments,” in Proc. SPIE, vol. 4286, 2001, pp. 1–14. [5] S. H. Hall, W. L. Walters, L. F. Mattson, G. J. Fokken, and B. K. Gilbert, “VCSEL electrical packaging analysis and design guidelines for multi-GHz applications,” IEEE Trans. Comp., Packag., Manufact. Technol., pt. B, vol. 20, pp. 191–201, Aug. 1997. [6] B. J. Thibeault, K. Bertilsson, E. R. Hegblom, E. Strzelecka, P. D. Floyd, R. Naone, and L. A. Coldren, “High-speed characteristics of low-optical loss oxide-apertured vertical-cavity lasers,” IEEE Photon. Technol. Lett., vol. 9, pp. 11–13, Jan. 1997. [7] User’s Manual, May 1993. SPICE3 Version 3f3. [8] M. H. McDougal, J. Geske, C.-K. Lin, A. E. Bond, and P. D. Dapkus, “Thermal impedance of VCSEL’s with AlO -GaAs DBR’s,” IEEE Photon. Technol. Lett., vol. 10, pp. 15–17, Jan. 1998. [9] E. D. Kyriakis-Bitzaros and G. Halkias, “Thermal resistance evaluation of high-speed VCSEL’s: An isothermal optical transient technique,” IEEE Photon. Technol. Lett., vol. 14, pp. 269–271, Mar. 2002.
Kyriaki Minoglou was born in Athens, Greece, in 1976. She received the Bachelor’s degree in electrical engineering from the Aristotle University of Thessaloniki, Thessaloniki, Greece, and the M.Sc. degree in microlectronics from the Department of Informatics, University of Athens, Athens, Greece, in 2000 and 2002, respectively. She is currently working toward the Ph.D. degree with the Institute of Microelectronics, National Center for Scientific Research (NCSR) “Demokritos,” Agia Paraskevi, Greece, focusing on the design of optical systems and optical system electronic interfaces.
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Efstathios D. Kyriakis-Bitzaros (S’90–M’91) was born in Corfu, Greece, in 1965. He received the B.Sc. degree in physics and the Ph.D. degree in electrical engineering from the University of Patras, Patras, Greece, in 1987 and 1994, respectively. He joined the Institute of Microelectronics, NCSR “Demokritos,” Agia Paraskevi, Greece, in 1996, where he is currently an Associate Researcher. Since 2003, he has also been an Assistant Professor with the Department of Electronics, Technological Educational Institute (TEI) of Piraeus, Egaleo, Greece. His current research interests include the development of efficient circuit models for high-speed light-emitting devices, the implementation of short-range optical interconnection schemes, and the applications of low-power complementary metal–oxide–semiconductor (CMOS) circuits. He is the author or coauthor of two book chapters and several publications in scientific international journals and conference proceedings. He has also served as a reviewer in international journals and conferences. Dr. Kyriakis-Bitzaros is a Member of the IEEE Lasers & Electro-Optics Society (LEOS).
Dimitrios Syvridis, photograph and biography not available at the time of publication.
George Halkias (M’92) graduated from the Physics Department of the University of Patras, Patras, Greece, in 1980. He received the D.E.A. and the Ph.D. degrees in microelectronics from the University of Lille, Lille, France, in 1981 and 1985, respectively. He was with the Foundation for Research and Technology-Hellas and the Physics Department of the University of Crete, Heraklion, Crete, Greece, from August 1987 to September 1996, where he conducted research in the fields of III–V compound microelectronics and optoelectronics. He has also spent a one-year sabbatical (1992–1993) at the CALCE Center for Electronic Packaging, University of Maryland, College Park, where he was mainly involved in research on optical and electrical interconnections and on electronic packaging technology. Since September 1996, has been with the Institute of Microelectronics, National Center for Scientific Research (NCSR) “Demokritos, ” Athens, Greece, where he conducts research mainly on integrated optoelectronics. He has more than 80 publications in refereed journals and conference proceedings.
