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A free-running, time-based readout method for particle detectors To cite this article: A Goerres et al 2014 JINST 9 C03025
- TOFPET ASIC for PET applications M D Rolo, R Bugalho, F Gonçalves et al. - STiC — a mixed mode silicon photomultiplier readout ASIC for time-offlight applications T Harion, K Briggl, H Chen et al. - Studies of the high rate coincidence timing response of the STiC and TOFPET ASICs for the SAFIR PET scanner R. Becker, C. Casella, S. Corrodi et al.
View the article online for updates and enhancements.
Recent citations - The PANDA Strip ASIC: PASTA A. Lai - First results of the front-end ASIC for the strip detector of the PANDA MVD T. Quagli et al - A time-based front-end ASIC for the silicon micro strip sensors of the Micro Vertex Detector V. Di Pietro et al
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P UBLISHED BY IOP P UBLISHING FOR S ISSA M EDIALAB R ECEIVED: December 15, 2013 ACCEPTED: January 24, 2014 P UBLISHED: March 19, 2014
W ORKSHOP ON FAST C HERENKOV DETECTORS - P HOTON DIRC DESIGN AND DAQ S EPTEMBER 4–6, 2013, G IESSEN , G ERMANY
DETECTION ,
´ b F. Gonc¸alves,b G. Mazza,c A. Goerres,a,1 R. Bugalho,b A. Di Francesco,b C. Gaston, M. Mignone,c V. Di Pietro,c A. Riccardi,c J. Ritman,a A. Rivetti,c M.D. Rolo,b,c J.C. da Silva,b R. Silva,b T. Stockmanns,a J. Varela,b V. Veckalnsb and R. Wheadonc a Forschungszentrum
J¨ulich, Wilhelm-Johnen-Straße, 52428 J¨ulich, Germany b Laborat´ orio de Instrumentac¸c˜ao e F´ısica Experimental de Part´ıculas (LIP) Lisboa, Av. Elias Garcia 14 – 1◦ , 1000-149 Lisboa, Portugal c Istituto Nazionale di Fisica Nucleare (INFN) Torino, Via Pietro Giuria 1, 10125 Torino, Italy
E-mail:
[email protected] A BSTRACT: For the EndoTOFPET-US experiment, the TOFPET ASIC has been developed as a front-end chip to read out data from silicon photomultipliers (SiPM) [1]. It introduces a time of flight information into the measurement of a PET scanner and hence reduces radiation exposure of the patient [2]. The chip is designed to work with a high event rate up to 100 kHz and a time resolution of 50 ps LSB. Using two threshold levels, it can measure the leading edge of the event pulse precisely while successfully suppressing dark counts from the SiPM. This also enables a time over threshold determination, leading to a charge measurement of the signal’s pulse. The same, time-based concept is chosen for the PASTA chip used in the PANDA experiment. This high-energy particle detector contains sub-systems for specific measurement goals. The innermost of these is the Micro Vertex Detector, a silicon-based tracking system. The PASTA chip’s approach is much like the TOFPET ASIC with some differences. The most significant ones are a changed amplifying part for different input signals as well as protection for radiation effects of the high-radiation environment. Apart from that, the simple and general concept combined with a small area and low power consumption support the choice for using this approach. K EYWORDS : Electronic detector readout concepts (solid-state); Front-end electronics for detector readout; Si microstrip and pad detectors; Solid state detectors 1 Corresponding
author.
c 2014 IOP Publishing Ltd and Sissa Medialab srl
doi:10.1088/1748-0221/9/03/C03025
2014 JINST 9 C03025
A free-running, time-based readout method for particle detectors
Contents Introduction and motivation
1
2
The TOFPET ASIC
2
3
PASTA – a time-based readout ASIC for PANDA
3
4
Conclusion and outlook
6
1
Introduction and motivation
The TOFPET ASIC is a readout front-end chip developed for the EndoTOFPET-US1 experiment [1]. The aim of the project is to develop an image-guided diagnostic system, which provides minimalinvasive surgery for an examined patient. Based on a PET scanner, it uses radioactive β + biomarkers to locate cancer areas by detecting the annihilation photons. To reduce examination and exposure times, the detection of the photons includes timing information (time of flight, TOF) and thus increases the position precision of the instrument [2]. A resolution alongside the line of response of ∆x = 3 cm should be achieved, leading to a time resolution of the detection system of around 200 ps [1]. The TOFPET ASIC realizes a concept to use time of flight information for PET applications described in [3]. The chip is connected to a silicon photomultiplier (SiPM), which converts the light of photoactive LYSO crystals into electrical signals. Because the photon transition time in the crystal can be as high as 230 ps [4], it is essential for the required time precision to be sensitive on the first photoelectrons. Therefore, the readout electronics has to be low-noise, capable of high event rates, and, due to intrinsic noise of SiPM, cope with high dark count rates. A similar development is ongoing for the readout of the Micro Vertex Detector (MVD) of the PANDA2 experiment. PANDA is a multi-purpose particle detector for hadron physics studies at the FAIR3 accelerator complex, currently under construction in Darmstadt, Germany. The accelerator will produce a high-luminosity beam and therefore a high event rate in the detection systems. Looking at the innermost system, the MVD, reduced space for cooling and placement adds low power consumption and a compact design to the list of requirements for the readout electronics. In this document it will be shown that a time-based readout of signal data, as developed with the TOFPET ASIC, is also a feasible solution for the MVD and what changes have to be made. 1 Endoscopic
Time-of-Flight Positron Emission Tomography and Ultrasound. Annihilation at Darmstadt. 3 Facility for Antiproton and Ion Research. 2 Antiproton
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1
ch0
thrT thrE front-end
ch1
4x TDCT
TDC_CTRLT
4x TDCE
TDC_CTRLE
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PreAmp
thrT PreAmp thrE front-end
ch2
...
4x TDCT
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analogue TDC
2
CLK
TDC Control
LVDS con�g
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LVDS data
data register
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Global Controller
Figure 1. The ASIC is divided into four parts: an analog front-end (1), an analog (2) and digital (3) TDC, and one global controller (4) for all 64 channels.
2
The TOFPET ASIC
The TOFPET ASIC is a 64-channel, self-triggered readout front-end chip for SiPM. To achieve the required time precision, it uses a low threshold setting Vth T (the resulting branch is identified with time) to minimize time walk effects. The low threshold increases the susceptibility to dark counts from the SiPM. Therefore, a second, higher threshold Vth E (identified with energy) is introduced for two reasons: firstly, the discriminator output DOE 4 validates an event. If this is not present, the event is marked as a dark count. Secondly, it delivers an additional mark on the falling edge of the pulse to enable a time over threshold measurement (TOT), which can be used to determine the energy of the detected photon. The necessary measurements can be broken down into recording points in time, hence the description as time-based. The realization of this process is divided into an analog front-end, a time to digital converter (TDC) and a global controller (GCTRL) (see figure 1). The input stage of the signals into the front-end is a analog preamplifier, realized as a regulated gate cascode (RGC). The input DC bias to the preamplifier is adjustable in a range of 500 mV with 6 bit precision. Its output is mirrored and AC coupled to two transimpedance amplifiers, generating voltages with adjustable gain. These two voltages are then fed into independent leading-edge discriminators, generating the threshold signals for the time (DOT ) and energy (DOE) branch. In the next stage, the time information of the discriminator output is determined. In normal operation the rising edge of the DOT and falling edge of DOE are stored, named according to the sequence of edges t1 and t3 , respectively (see figure 2). With a nominal clock rate of 160 MHz, this leads to a timing resolution of 6.25 ns. A gray encoded counter delivers the source for storing this coarse time. In addition, a fine time measurement is necessary to achieve a resolution of about 50 ps. The traditional approach would be to stretch the signal with the desired factor, but this leads to an extended dead time of the channel. Thus, a time-interpolating approach, as it is described in [5], is chosen: As soon as the threshold signal arrives, the capacitor in a time to analog converter (TAC) is being charged with a constant current ITAC . The charging stops at a known rising edge of a clock, in 4 Discriminator
output for the energy branch.
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ch63
1
analogue TDC
data register
V
event signal dark signal
Vth_E Vth_T t t1 2
t3
t
a range of 1 to 3 clock cycles later. This charge is then transferred to a four times larger capacitor. Finally, the synchronous recharging (called conversion) of this capacitor is started, using a 32 times higher current ITDC = 32 · ITAC . Together, this leads to an amplification factor of 128 of the phase from the discriminator output to the clock. From the conversion step, the start and end for both branches are stored. They make up the fine time measurement. The downside of this process is the time it takes to transfer, recharge, and reset the TDC capacitor,5 during this time the channel is dead for new events. To cope with shortly following events, a multi-buffer approach as in [6] is used: four equal TAC buffer stages are filled and processed in a round-robin scheme, leading to a very short dead time between two events of a few clock cycles (≈ 20–30 ns at 160 MHz) in the TDC. This is not to be mistaken with the continuous rate capability, because if all TAC buffers are full, the rate again is limited by the TDC conversion time. Together with the recovery time of the amplifiers, the ASIC is able to read out at least 50–100 kHz continuously. These developments lead to the first prototype of the TOFPET ASIC (see the floorplan sketch in figure 3, left), produced in 130 nm CMOS technology. It has 7.1 × 3.5 mm2 outer dimensions and a channel pitch of 102 µm. Thorough tests of the chip are ongoing since spring of 2013. These tests deliver helpful insight of the used concept for future versions.
3
PASTA – a time-based readout ASIC for PANDA
Another use of the same, time-based readout concept is within the PANDA project. PANDA (Antiproton Annihilation at Darmstadt) is a particle physics experiment in development and will be located at the FAIR accelerator complex next to the GSI6 in Darmstadt, Germany. Its focus is on hadron physics in the regime of charmonium states. The desired annihilation reaction will be provided by an antiproton beam with 1.5 to 15 GeV momentum hitting hydrogen or heavy nuclei targets. In the high luminosity mode with L = 2 · 1032 cm−2 s−1 roughly 2 · 107 collisions per second are expected [7]. Because of the broad physics program and the similarity of signal and background 5 The 6 GSI
processing time for a 511 keV photon is in the order of 300 ns. Helmholtz Centre for Heavy Ion Research.
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Figure 2. A simplified signal shape after the pre-amplifier (dark red) and a dark event (bright brown). Two discriminator levels (Vthr T and Vthr E ) deliver in total four points in time, from which only t1 and t3 are stored for timing and time over threshold information. If the signal exceeds Vthr E (circle), it is validated and processed.
connections to sensor
5.0 mm
3.5 mm
auxiliary connections
TOFPET
PASTA
connections to sensor 4.2 mm
7.1 mm
Figure 3. The floorplan of the two ASICs, both orientated that sensor input pads are at the bottom. Number of pads are not to scale. Left: the TOFPET ASIC with 64 channels and 7.1 × 3.5 mm2 outer dimensions (pitch: 102 µm). Pads to the outside are located on the sides while the back is left free to enable a back-toback packing of two chips. Right: the PASTA chip, also with 64 channels but tighter pitch of 60 µm, leading to 4.2 × 5.0 mm2 preliminary outer dimensions. Auxiliary connections are on the opposite edge of inputs to enable placing of several chips in a row. Table 1. Comparing the parameters of the TOFPET [1] and the required values for the MVD from the technical design report [8]. The upper limit for the power consumption in the MVD results from updated calculations of the cooling system. The last line in the table shows, where work is still needed.
Area [mm2 ] Ch. pitch Hit rate Time bin. CLK Deadtime Power TOFPET 7.1 × 3.5 102 µm < 100 kHz 50 ps 80-160 MHz ∼20-40 ns 7-8 mW/ch MVD req. < 8 × 8 60 µm < 40 kHz < 10 ns 155.56 MHz < 6 µs < 4 mW/ch X x X X X X x events, the experiment will run without a first-level hardware trigger. Instead, the data of all subdetectors is read out and an event selection is done on the complete data-set of PANDA. Therefore, all involved sub-systems have to be designed with autonomous data taking. The innermost of these systems is the Micro Vertex Detector (MVD), an important part in PANDA’s tracking system. It is designed to have an extrapolated spatial resolution of 30 µm RMS at the interaction vertex [8]. The MVD is based on silicon pixel and strip sensors. For the latter a new, free-running readout solution is under development. It has to cope with a high event rate of up to 40 kHz per channel in hot spots close to the beam pipe. A time resolution of at least 10 ns has to be achieved, but the better the timing of signals is, the easier it is in a later step to combine separate signals to complete events. Because the MVD will also deliver information for particle identification from the energy loss of particles in the sensor, a charge determination with a resolution of 8 bits is required. Limited cooling capabilities demand a power dissipation of less than 4 mW/ch (requirements from [8]7 ). Concluding, a simple and fast, yet accurate readout solution is needed. Because of the experience with the TOFPET ASIC’s development, a time-based approach8 is chosen for the PANDA 7 In the technical design report an upper limit of 8 mW/ch is given, but newer simulation results lead to only 4 mW/ch. 8 Time-based
in this context means the storage of timestamps, instead of sampling the pulse height for instance.
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auxiliary connections
auxiliary connections
9 The
smallest pitch of the used sensors is 50 µm, but different options how to connect the sensor to the ASIC are under investigation. With these, it is possible to use an ASIC pitch of 60 µm.
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Strip ASIC (PASTA), which will read out the MVD’s silicon strip sensors. Even though the concept’s very high time precision of 50 ps is not needed per se, it supports an accurate time over threshold measurement. At the same time, the simple readout of timestamps keeps power consumption low. Some important differences have to be addressed though. A major difference between the two ASICs will be the used technology. Moving from a 130 nm CMOS technology, used in the TOFPET chip, to an area optimized technology with 110 nm structure size helps not only to reduce the footprint, but also saves a lot in development costs due to different pricing options. However, this change makes a new placing of cells necessary. In addition, the preamplifier stage in the of the TOFPET chip has to be changed because of the lower capacitance and signal height produced by silicon strip sensors. Therefore, the preamplifier has to deliver a much higher gain which is achieved by a different amplifying concept. Also, the time over threshold measurement, which is more important in the MVD than TOFPET, requires an improved linearity in the preamplifier for different input charges. The mentioned change in technology helps to reduce the channel pitch down to 60 µm, which is needed for a successful placement of the front-end chips in the MVD.9 This is only possible by extending the chips length and reducing the overall area, see figure 3. In the digital part, a complete redesign of the TDC control has been decided. As a consequence of the results of testing and experiences during development, unnecessary features can be removed and a clearer structure can be applied. This leads to a lot less used cells and smaller area. A preliminary number gives an estimate of only 10–20% of the original values, thus supporting shrinking the pitch. Also, improved ways of controlling the charge operations will reduce the processing time while keeping the clock at the same rate — or the same processing time with a slower clock rate. Another important aspect to address is the power consumption. Due to tight packing inside the MVD, not much space is available for the cooling system. A reduction of the power consumption by a factor 2 is required, down to 4 mW/ch. Various items help in this matter. Firstly, in the TOFPET both input stages for positive and negative signals are powered simultaneously, even though only one stage is active. This behavior is improved in the PASTA chip and will already save 1–2 mW/ch. Another big improvement comes from the new TDC control design. Estimations predict savings of roughly 1 mW/ch. Further reductions will be achieved by tuning the analog part towards more optimized elements and, if necessary, running with a slower clock. This will be configurable during the runtime. If chosen, it will decrease drastically the power consumption in the digital part with the cost of a worse time resolution. But since the time resolution is less critical to the MVD and improvements have been made in the control logic, the drawback is negligible. The foreseen use case close to the interaction point lays in a radiation-intense environment and introduces a complete new requirement to the chip. Radiation hardness, especially in the control logic, is important to keep the readout running. A single event upset (SEU), which changes one bit of a register, can lead to undefined operating states and thereby to a complete freeze of the logic in the worst case. To prevent this, vulnerable registers in the digital part will be protected with triple mode redundancy (TMR) [9] or Hamming encoding [10], depending on the size of the register. The introduced, but necessary overhead contributes to a larger area consumption, which is in the same range as the change of technology yields.
Except of the different analog front-end with adaptations to the higher input capacitance, none of the discussed points makes the development incompatible with the TOFPET requirements. In fact, lots of improvements in functionality and reduced power will strongly benefit a second TOFPET version. Therefore, the development on the TOFPET and PASTA chips can be considered a common effort within a wide range.
4
Conclusion and outlook
References [1] M.D. Rolo et al., TOFPET ASIC for PET applications, 2013 JINST 8 C02050. [2] J. Karp et al., Benefit of time-of-flight in PET: experimental and clinical results, J. Nucl. Med. 49 (2008) 462. [3] F. Powolny et al., Time-based readout of a silicon photomultiplier (SiPM) for time of flight positron emission tomography (TOF-PET), IEEE Trans. Nucl. Sci. 58 (2011) 597. [4] E. Auffray et al., A comprehensive & systematic study of coincidence time resolution and light yield using scintillators of different size, wrapping and doping, IEEE NSS/MIC Conf. Rec. (2011) 64. [5] S. Henzler, Time-to-digital converters, Springer Series in Advanced Microelectronics, Vol. 29 (2010). [6] A.E. Stevens et al., A time-to-voltage converter and analog memory for colliding beam detectors, IEEE J. Solid State Circ. 24 (1989) 1748. [7] PANDA collaboration, M.F.M. Lutz et al., Physics performance report for PANDA: strong interaction studies with antiprotons, arXiv:0903.3905. [8] PANDA collaboration, W. Erni et al., Technical Design Report for the: PANDA Micro Vertex Detector, http://panda-wiki.gsi.de/pub/Mvd/MvdTalkOrPaperDrafts/panda tdr mvd.pdf. [9] R. Lyons and W. Vanderkulk, The use of triple-modular redundancy to improve computer reliability, IBM Journal of Research and Development 6 (1962) 200. [10] R. Hamming, Error detecting and error correcting codes, Bell System technical journal 29 (1950) 147.
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The TOFPET ASIC was developed for reading out SiPM detectors with a continuous rate of up to 105 events per second. By using a TDC with analog interpolation, it is able to reach a time binning of 50 ps with a 160 MHz clock rate. Similar to the TOFPET ASIC’s approach, a time-based readout is also chosen for the MVD strip part inside the PANDA experiment. The good time resolution delivers a precise time over threshold measurement for charge determination without the need of stretching or sampling the signal. Additionally, the concept attains a low power consumption which is an important boundary from the cooling capabilities. The differences between TOFPET and PASTA chip will address the different input conditions — namely a much lower capacitance and signal height from the silicon strips —, different geometrical boundaries, and the protection for a radiation-intense environment. These developments are minimal invasive to the TOFPET concept, hence being able to use most of them also in future TOFPET versions. It is planned to have a first version of the PASTA chip going into production in the course of 2014.
