A Low Complexity Reconfigurable Multistage Channel Filter Architecture for Resource-Constrained Software Radio Handsets
Journal of Signal Processing Systems for Signal, Image, and Video Technology (formerly the Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology) ISSN 1939-8018 Volume 62 Number 2 J Sign Process Syst (2009) 62:217-231 DOI 10.1007/ s11265-008-0330-3
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Author's personal copy J Sign Process Syst (2011) 62:217–231 DOI 10.1007/s11265-008-0330-3
A Low Complexity Reconfigurable Multi-stage Channel Filter Architecture for Resource-Constrained Software Radio Handsets Smitha K.G. & A. P. Vinod
Received: 18 October 2008 / Revised: 2 December 2008 / Accepted: 3 December 2008 / Published online: 8 January 2009 # 2009 Springer Science + Business Media, LLC. Manufactured in The United States
Abstract Software defined radio (SDR) is emerging as a powerful platform for future generation cellular systems, due to its capability to operate conforming to multiple mobile radio standards. Channelizer in an SDR operates at the highest sampling rate and hence a low complexity design is needed for the most computationally intensive part of the SDR receiver. The channel filters in the channelizer extracts radio channels of varying bandwidths, corresponding to various communication standards from the wideband input signal. An architecture for implementing low complexity, low power and reconfigurable channel filter for the SDR mobile handsets, based on multi-stage frequency response masking (FRM) is proposed in this paper. The proposed architecture is unique in a way that it is able to effectively exploit the redundancy in multi-stage realization by utilizing the common masking filters and also capable of extracting varying bandwidth channels. Design examples show that the proposed architecture offers 47.5% complexity reduction and 18.1% power reduction over single-stage FRM approach. Keywords Low complexity . Reconfigurability . Software defined radio . Channel filter . Frequency response masking
S. K.G. (*) : A. P. Vinod School of Computer Engineering, Nanyang Technological University, Nanyang Avenue, Singapore 639798, Singapore e-mail:
[email protected] A. P. Vinod e-mail:
[email protected]
1 Introduction Software defined radio (SDR) provides a solution that migrate the conventional hard-wired radio platforms to flexible software definable platforms which supports multiple air-interface standards [1, 2]. The fundamental idea of SDR, is to replace most of the analog signal processing in the receivers with digital signal processing, in order to provide the advantage of flexibility through reconfiguration. This will enable different air-interfaces to be implemented on a single generic hardware platform [1–3]. The key requirement in SDR platforms is the ability to support multiple communication channels per radio frequency (RF) band. These platforms typically employ channelizer. The channel filter in the channelizer extracts individual radio channels (frequency bands) from the received wideband signal for further processing. Since the channel filter needs to operate at the highest sampling rate in the digital front end (DFE) of the SDR receiver, it requires architecture which has low complexity and low power. Furthermore, the compatibility of a channel filter with different communication standards is ensured by its reconfigurability. Therefore the key requirements in SDR channel filters are low complexity, low power and reconfigurability. In literature, filter banks have been widely used for extraction of multiple channels in multi-standard wireless communication base station receivers. The complexity of a filter bank channelizer is independent of the number of received channels; hence, when a large number of channels are needed in a receiver, the filter banks can be a computationally attractive choice [4]. The discrete Fourier Transform filter bank (DFTFB) have been extensively used for channelization in multi-standard
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base station receivers for extracting multiple channels since, it can be realized by implementing a single prototype lowpass filter and corresponding modulator such as DFT [4]. But the main limitations of DFTFB are [4]: (1) Unable to perform channelization for channels with different bandwidths. (2) If the channel bandwidth is considerably smaller than the bandwidth of the wideband input signal, the prototype filter must be highly selective resulting in higher filter length and complexity. Apart from the above limitations of the DFTFB channelizer reported in literature [4], it can be noted that the reconfiguration overhead of DFTFB is high. This would impose constraints if the channelizer is to be implemented on resource-constrained mobile handsets. A detailed analysis of filter bank channelizers along with its advantages and disadvantages is given in Table 1. The analysis gives an insight to various techniques available in literature to extract variable bandwidth channels. Among all
the architectures listed in Table 1, only the modulated perfect reconstruction (PR) filter bank [9] is able to extract channels of varying bandwidths. It can be noted from Table 1 that even the modulated PR filter bank [9] is not a very good candidate for SDR handset receiver due to its complexity limitations. In general, most of the previous works on channelization [4–9] were focused on base station channelizers where simultaneous extraction of multiple channels (i.e., parallel reception of multiple channels) needs to be performed. However, the ultimate aim of SDR is to realize most of the transceiver functionalities in mobile handsets in place of base stations, where the true potential of SDR could be exploited. In a handset-based channelizer, only one radio channel corresponding to the single user needs to be extracted at a given time. Therefore, filter bank approach is not an efficient solution for channel extraction in SDR handsets. To the best of our knowledge, extraction of
Table 1 Comparison of filter bank channelizers. Filter banks in literature
Advantages
Disadvantages
Goertzel filter bank (GFB)[4]
1) Less complexity than the DFT filter banks. 2) Able to channelize equal bandwidth channels at arbitrary band locations and hence overcomes fixed channel stacking problem. 1) Computational complexity is less than conventional DFT filter banks 2) Multiple channels can be extracted 1) The desired channel is obtained at an appropriate stage of QMF tree, corresponding to the bandwidth of the channel of interest.
1) Unable to extract channels with different bandwidths. 2) Ultimate reconfigurability is also not achievable.
Polyphase DFT filter bank (DFB) [5] Tree-structured quadrature mirror filter bank (TQMFB) [6] Multi-standard channelizer [7] Two stage multi-mode channelizer [8]
Modulated PR filter bank [9]
1) Performs channelization for channels with variable bandwidth 1) Hybrid architecture involving low complexity frontend DFTFB with fixed number of channels and a flexible back-end DFTFB with variable number of channels. 2) Hardware optimization can be done for the front-end fixed filter bank. 1) Performs channelization for channels with variable bandwidths
1) Unable to perform channelization for channels with varying bandwidths 1) Selectively extract signals whose channel spacing is related by a factor-of-two. 2) Larger delay in obtaining the desired output due to multi-stage filtering and decimation processes. 1) Employs distinct filter bank channelizers for each cellular communication standard and hence highly complex implementation 1) Ability to extract channels of variable bandwidth is restricted by the fixed passbands of front-end DFTFB.
1) As the analysis and synthesis need two prototype filters, the multiplication for channel filtering is doubled. 2) Needs both DFT and IDFT and hence the multiplications are also doubled. 3) The bandwidth of the wideband signals generated by the synthesis section are integer multiples of the bandwidth of the subband signals generated by the analysis section. Therefore, this approach is not suitable for SDR signals when channels of multiple communication standards have bandwidths that are fractional multiples of each other.
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varying bandwidth channels of multiple communication standards for single channel reception/transmission in an SDR handset with low complexity is hardly addressed in literature. The scenario is that, only one channel needs to be extracted during a certain time interval, but the channel bandwidth can be different at some other time interval, when the handset works on a different communication standard. The Per-Channel (PC) architecture is an efficient approach for channelization than the filter bank approach when the number of channels to be received is less [4]. In PC approach, a distinct filter is employed for each communication standard with different frequency band edge specifications corresponding to the channel spacing of the standards. Hence for a SDR handset, where only a single channel is needed at a given time interval, the PC approach is an alternative to filter bank approach. On the other hand, the complexity and cost of the PC architecture increases with the number of communication standards integrated on the handset. Therefore, there is a need to explore alternative low complexity reconfigurable channel filter architectures that could be implemented in resourceconstrained SDR handsets with low area and power consumption. Ideally, the reconfigurability of the channel filter must be accomplished by reconfiguring the same architecture with minimum overhead, instead of employing separate filters for each standard. A reconfigurable channel filter based on the low complexity method of Frequency response masking (FRM) was proposed in [10]. This method was able to significantly lower the complexity and incorporate reconfigurability using single-stage FRM method for the channel filter when compared to the reconfigurable FIR filters in [11, 12]. The basic idea in [10] was to reconfigure the channel filter by using a fixed-coefficient modal filter and by varying the interpolation values to get the frequency band of desired bandwidth. However, if the technique in [10] is used to realize filters with very narrow transitionband width, the resulting filter complexity would be relatively high, which makes it difficult to realize in resource-constrained hardware. Our aim in this paper is to design and implement a reconfigurable channel filter which can extract varying bandwidth channels (single channel during a given time interval) with less complexity and low power when compared to the method in [10]. A reconfigurable architecture for channel filtering is proposed using multistage FRM method, which is an extension of the singlestage FRM in [10]. The proposed multi-stage FRM-based reconfigurable channel filter is a low complexity solution than the single-stage FRM in [10] as the sub-filters used in our architecture are having wider transition width and consequently lower order compared to the latter method.
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Reconfigurability is achieved by suitably changing the interpolation values, which will result in variable bandwidth output. The proposed architecture is unique in a way that it is able to effectively exploit the redundancy in multi-stage realization by utilizing the common masking filters and thus channel filter complexity is further reduced. An introductory work in this aspect is given in [13] and it is noted that parts of the material in this paper have been presented at a conference [13]. Following the introduction, the rest of the paper is organized as follows. Section 2 presents a review of FRM technique, the design steps of the proposed channel filter and illustrative examples. Implementation results and design examples are shown in Sections 3 and 4 respectively. The functionality test for the proposed filter is shown in Section 5. Section 6 gives our conclusions.
2 Proposed Channel Filter In this section, a low complexity reconfigurable architecture which reuses the same hardware for varying bandwidth channels is presented. Finite Impulse Response (FIR) filters are usually used in channel filters due to its absolute stability and linear phase property. The filters should have sharp transition-band to meet the stringent adjacent channel attenuation specifications of wireless communication standards. Therefore, longer length FIR filters are needed in the channelizer. As the filter length increases, its complexity also increases. FRM [14] technique is an approach to build sharp transition-band filters with reduced complexity. 2.1 Frequency Response Masking Technique The FRM technique is one of the most efficient techniques to realize FIR filters with sharp transition-bands, using several wide transition-band sub-filters [14]. FRM filter design procedure is shown in Fig 1a. It starts with the design of a prototype lowpass filter Fa(z) of odd length N, also known as the Band Edge Shaping (BES) filter. The frequency illustration of BES filter and its complementary filter Fc(z) is shown by solid and dotted line in Fig. 1(b.I) respectively. Replacing each delay elements by L delays, filters with transfer function Fa(zL) and Fc(zL) are formed as shown by the solid and the dotted line in Fig. 1(b.II) respectively. The transition-band width and the bandwidth of Fa(zL) is a factor L narrower than that of Fa(z). Two masking filters, Fma(z) and Fmc(z), shown in Fig. 1(b.III) are used to remove the undesired frequency components from the output of the BES filter and their outputs are summed to result the sharp transition response, F(z) as shown in Fig. 1(b.IV). The transfer function of the entire
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Figure 1 a Architecture of FRM, b Frequency response illustration of FRM [14].
Magnitude I
Fa[zL]
Fma[z]
Fa(z) Fc(z) = 1-Fa(z) Fa(zL)
Fc(zL)
II
Fma(z) -L(N-1)/2
Z
F[z]
Fmc[z]
III
Fmc(z)
F(z) IV Frequency
(a) Architecture of FRM.
single-stage FRM filter is given by the architecture in Fig. 1a [14]: h ðN 1Þ i F ð zÞ ¼ Fa zL Fma ð zÞ þ zL 2 Fa ð zÞ Fmc ð zÞ
ð1Þ
h ðN 1Þ i where zL 2 Fa ð zÞ ¼ Fc ðzL Þ is the complementary filter delayed by L delays. Note that the length of the two masking filters Fma(z) and Fmc(z), must be equal to ensure the outputs from two branches are in phase. If they are of unequal length, zero valued coefficients must be padded to the shorter one. The design steps for the sub-filters involve the solution of the expressions [14]: m ¼ fp L ; fap ¼ fp L m; fas ¼ fs L m;
fmap ¼ fp ; fmas ¼
ð2Þ
m fap m þ 1 fas ; fmcp ¼ ; fmcs ¼ fs L L ð3Þ
where b xc denotes the largest integer less than x, L is the interpolation factor or number of delays fp and fs are the passband and stopband edges of the overall filter, fap and fas are the passband and stopband edges of the BES filter (Fa(z)), fmap and fmcp are the passband edges and fmas and fmcs are the stopband edges of the two masking filters respectively. Thus any sharp transition-band output response with low complexity can be realized, by suitable selection of the passband and stopband edges of the BES and the masking filters. Low complexity realization is possible in FRM design technique due to the shorter length of BES and masking filters. In order to realize an arbitrary bandwidth channel, the value of L may need to vary from very low value to very high values. Increasing the value of L will produce two
(b) Frequency response illustration of FRM [14].
effects: It enables us to have more flexibility with the bandwidth, but increases the complexity of masking filters. The output of the BES filter when interpolated by L results in (L+1) multi-band outputs which lies close together. As L is increased, the multiple passbands of the multi-band response will be located closer to each other. Consequently, very narrow transition-band masking filter would be required to isolate the band of interest from the multi-band response. As the complexity of the masking filters increases when the transition-band becomes narrow, the overall filter complexity also increases. The above problems of a singlestage FRM can be eliminated by employing proposed multi-stage FRM technique [15]. Figure 2a shows the representation of a two-stage FRM. Two-stage FRM is realized using a single-stage FRM along with the FRM implementation of BES filter. Here the BES filter is interpolated in two stages and L1 is the interpolation factor of first stage and L2 is the interpolation factor for the second stage, so that effectively L1.L2=L. The two-stage FRM can be better illustrated using frequency response diagram as shown in Fig. 2b. The frequency response illustration of the BES filter for the first stage Fa(z) and its complementary, Fc(z) is shown as solid and dotted lines in Fig. 2(b.I) respectively. The BES filter and its complementary for the first stage are interpolated by L1 as indicated by solid and dotted lines in Fig. 2(b.II) respectively. The masking filter’s Fma1(z) and Fmc1(z) for the first stage is given in Fig. 2(b.III). The entire first stage is used as the BES filter for second stage. Hence the entire first stage is interpolated by L2 as shown in Fig. 2(b.IV) and (b.V). Figure 2(b.V) shows the interpolated first stage masking filter and it’s complementary, as solid and dotted lines respectively. The second stage masking filter and its complementary are shown as solid and dotted lines in Fig. 2(b.VI) respectively. Figure 2(b.IV), (b.V) and (b.VI) are added as indicated by Fig. 2a to obtain the final response, F(z) indicated by
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Figure 2 a Architecture of twostage FRM. b Frequency response illustration of two-stage FRM.
First stage
Fa [ z L1 L2 ]
Fma1[ z L2 ]
[ z −L1L2 ( N −1) / 2 ]
Fmc1[ z L2 ]
Fma 2 [ z ]
Second stage
[ z − L2 ( N
1) / 2
Fmc 2 [ z ]
]
(a) Architecture of two-stage FRM. Magnitude I
Fa(z)
Fc(z) = 1-Fa(z)
Fa(zL1)
Fc(zL1)
II Fma1(z) Fmc1(z) III Fa(zL1.L2)
Fc(zL1.L2)
IV Fmc1(zL2)
Fma1(zL2)
V Fma2(z) VI
Fmc2(z) F(z)
VII Frequency
(b) Frequency response illustration of two-stage FRM.
Fig. 2(b.VII). Hence by using multi-stage method, sharper filters can be generated with minimum complexity.
number of delays for BES filter Fa(z) to realize the overall channel filter. 3. Calculate the filter length of BES filter, (NBES) [16],
2.2 Design Steps of Proposed Multi-stage Channel Filter NBES ¼ 1. The passband and stopband of the BES filter is fixed initially as fap and fas.. 2. Let fp and fs are the passband and stopband edges of the overall channel filter to be designed and let L the
2 log10 ð10 @1 @2 Þ 1 3ðfas fap Þ
ð4Þ
where ∂1 and ∂2 are the peak passband and stopband ripples respectively, and (fas-fap) is the normalized bandwidth and
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rounded to the nearest odd integer value. Also calculate length of the masking filter, Nmasking, depending upon the number of interpolated channels of the BES filter to be masked for the given L value. If Nmasking>NBES, then factorize L into two factors, L=Li.Lj. Check whether Nmasking
