A Low Power and Low Phase Noise Complementary Colpitts Quadrature VCO S.-L. Jang, Y.-H. Chuang, Y.-C. Wang, S.-H. Lee and J.-F. Lee Department of Electronic Engineering National Taiwan University of Science and Technology 43, Keelung Road, Section 4, Taipei, Taiwan 106, R.O.C. Tel: 886-2-27376383 Fax: 886-2-27376424 E-mail:
[email protected] Abstract — A low power and low-phase noise quadrature voltage controlled oscillator (QVCO) using the differential complementary Colpitts oscillator topology has been developed. A transformer inductor is used to form a differential output oscillator and the back-gate coupling technique is used to generate quadrature outputs. The advantage of proposed QVCO is analyzed in terms of power consumption, phase noise, and figure of merit. The low power QVCO has been fabricated with 0.18um CMOS technology for 4.8GHz band operation and its phase noise is -115.24 dBc/Hz at 1MHz offset while operated with 2.2mA current consumption and 3.96mW power consumption for the whole QVCO from 1.8V supply. The figure of merit is -182.2 dBc. Key Words —CMOS, Colpitts oscillator, quadrature, voltage controlled oscillator, back-gate coupling, transformer.
I. INTRODUCTION The study of direct conversion radio transceivers has dramatically increased in recent years due to the need for low-power, low-cost, and highly integrated transceiver chips, and these direct conversion architectures require quadrature voltage controlled oscillator (QVCO) signals. There are several design options [1] available to generate the QVCO signals: These are 1) combination of VCO, polyphase-filter and output buffers , 2) VCO at double frequency followed by master slave flip flops, and 3) two cross-coupled VCOs, 4) superharmonic coupling, 5) transformer coupled quadrature VCOs, and 6) quadrature VCO with back-gate coupling[2]. Each method has its own merits. In this paper, we propose a new low power and low phase noise quadrature VCO circuit. We use the coupled inductor concept to form a differential complementary (C-) Colpitts VCO, which can effectively improve the phase noise [3]. Then we use this differential VCO cell to construct a low power QVCO with the back-gate coupling technique. II. DIFFERENTIAL C-COLPITTS OSCILLATOR Figs. l (a) and (b) [4] show the complementary (C-) Colpitts oscillator and the equivalent small-signal circuit, respectively. In Fig. l(b), Gm( = gmn + gmp), Cgs, Csub, and Rsub represent the overall transconductance, the overall gate-source capacitance, the drain to substrate parasitic capacitance and the resistance of the transistors MN1, and MP1 in Fig. 1(a), respectively. R1 represents the series resistance of inductor L1. gmn and gmp are respectively the transconductances of MN1 and MP1.
VDD
L1
MP1 L1
R1
Vd(S) id(S)
Csub
Vg(S) MN1
Cgs
GmVg(S)
Rsub
Fig.1. (a) Schematic of complementary Colpitts oscillator: (b) Equivalent small-signal equivalent circuit.
Fig. 1(b) is a standard small-signal equivalent circuit of a Colpitts oscillator, which has a tap between two capacitors. The oscillator [4] core is composed of only two components: a complementary pair of transistors and one inductor, and is adequate for high frequency, low noise, and low power application, due to the simplicity and the high negative conductance of the oscillator core. Fig. 2 shows the proposed differential C-Colpitts oscillator, which uses the concept of inductor coupling. k is the coupling coefficient, L1 and L2 are the transformer inductors. As described in [3], for all reciprocal coupling topologies, the total phase noise is reduced provided the coupling phase is chosen correctly. Following this rule, two complementary Colpitts oscillators can be coupled with each other. In doing so, two advantages are obtained. First, the two complementary Colpitts oscillators are locked together and the output signals are differential. Second, due to coupling effect, the phase noise will be reduced. Compared to Fig.4(b) in [5], the proposed circuit use less active devices, therefore the circuit has the potential of low power and low cost due to less chip occupied area. In addition, one transformer instead of two inductors is used, and the chip area can be further scaled down. There are many ways to construct a QVCO based on the proposed cell in Fig. 2. We choose the back-gate coupling [2] approach as a mechanism. Fig. 3 shows the implemented quadrature VCO schematic with the output buffers (not shown). It integrates two differential CColpitts oscillator proposed in Fig. 2 and based on the back-gate coupling structure to form the quadrature output signal. The circuit is formed by four pairs of NMOS (MN1, MN2, MN3 and MN4) transistors and PMOS (MP1, MP2, MP3 and MP4) transistors, and the overall Cgs, the overall Csub and the resistance of the
VDD
VDD
MP1
MP2
MP3
MP4
k
k
L1
L2
L3
L4
MN1 Cb Rb
Cf
Cv
MN4
Cm
MN2
Cm
Cv
Cv
Vcon
Fig. 2. Proposed differential C-Colpitts oscillator
transistors. L1 and L2, and L3 and L4 are transformer inductors. All transistors are housed in separate wells, so that each transistor can be used as a full four-terminal device. The resistors Rb are added for dc biasing of the body terminals and the capacitors Cb for ac coupling. The two differential VCOs are coupled through the backgates of the core NMOS (MN1, MN2, MN3 and MN4) transistors. The capacitors Cv are implemented with the accumulation mode varactors to control the resonant frequency of the complementary Colpitts QVCO, they are in series with MIM capacitance Cm. The capacitors CF between gate and source of NMOS transistors are an extra design parameter which can be used to reduce the phase noise and to enhance the start-up of oscillation. The QVCO requiring no additional active components to couple each other has several advantages: First, without any active coupling components, the noise source reduced and phase noise of the oscillator decreased. Secondly, without those coupling components, the chip area will be reduced and the power dissipation reduces. The QVCO circuit has been simulated with the circuit simulator Spectra-RF to provide a quadrature signal output III. EXPERIMENTAL RESULT This circuit shown in Fig. 3 is implemented in a standard triple-well 0.18um CMOS technology for 4.5GHz operation band. Fig. 4 shows the microphotograph of the fabricated chip. On-board measurements of output spectrum and output power performances were obtained using an Adventest R3162 spectrum analyzer. Fig. 5 shows the output spectrum at 4.84 GHz, with -6.88 dBm output power for the circuit with operated current of 2.2 mA from 1.8-V supply with the power dissipation of 3.96mW. The phase noise of the QVCO is -115.24 dBc/Hz at 1MHz offset frequency. Fig. 6 shows the frequency tuning range versus varactor control voltage (Vcon) tuned from 0 to 1.8V, and the output frequency is from 4.39 GHz to 4.88 GHz. The capacitors Cv are made of accumulation-mode MOS as Vcon increased, its average capacitance per oscillation cycle decreases, the oscillation frequency therefore increases. Table I summarizes the measurement results at 4.8GHz operation
Cb Rb
MN3
Cm
Cf
Cm
Cv
Vcon
Fig. 3. Schematic of proposed QVCO
Fig. 4. Die photograph of the fabricated QVCO
The QVCO is compared to other recently published VCOs in Table II using the figure of merit defined as [8].
FOM = L{∆f } + 10 log[(
∆f 2 ) ⋅ PDC ] f osc
where L{∆f } is SSB phase noise measured at ∆ f offset from f osc carrier frequency and PDC is DC power consumption in mW. As shown in Table II, the figure of merit (FOM) of the quadrature VCO is -182.2 dBc and is lower value among the previously reported quadrature VCO. IV. CONCLUSION A new low power and low phase noise complementary Colpitts quadrature voltage control oscillator with coupled inductors and back-gate coupling topology based on 0.18-um triple-well CMOS technology has been developed. The implemented C-Colpitts QVCO shows phase noise of -115dBc/Hz at 1-MHz offset while dissipating only 2.2 mA for the whole C-Colpitts QVCO from the 1.8-V supply. The frequency tuning range of the quadrature VCO is from 4.39GHz to 4.88GHz. And the figure of merit of the VCO is -182.2 dBc and is the lower value among the previously reported quadrature VCO.
TABLE I PERFORMANCE SUMMARY OF THE FABRICATED QVCO Parameter Value
ACKNOWLEDGEMENT The authors would like to thank the CIC of National Science Council, R.O.C. for the chip implementation.
Supply Value
1.8V
Oscillator Core Current
2.2mA
Power Consumption
3.96mW
Frequency Tuning Range
4.39GHz~4.87GHz
Frequency VCO Gain QVCO Frequency (4.867GHz)VCO in 1MHz
270.25 MHz/V -115.24dBc/Hz
TABLE II COMPARISON OF THE PERFORMANCE WITH PRIOR WORKS CMOS Process Freq. Power Phase FOM QVCO [um] [GHz] [mW] Noise [dBc]
Fig. 5. Output spectrum of the QVCO at 4.8 GHz
5
Frequency(GHz)
4.9 4.8 4.7 4.6 4.5 4.4 4.3 0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
Vcontrol(V) Fig. 6. Output frequency versus control voltage
[6]
0.35
1.8
50
-140@3M
[7]
0.25
1.57
30
-147@3M
-178.5 -186.5
[8]
0.18
6
6.8
-106@1M
-176.7
[2]
0.18
1.1
5.4
-120@1M
-173.5
This work
0.18
4.5
3.96
-115@1M
-182.2
REFERENCES [1] M. Tiebout, “Low power, low phase noise differentially tuned quadrature VCO design in standard CMOS,” IEEE J. Solid-State Circuits, vol. 36, pp. 1018–1024, July 2001. [2] H.-R. Kim, C.-Y. Cha, S.-M. Oh, M.-S. Yang, and S.-G. Lee “A very low-power quadrature VCO with back-gate Coupling,” IEEE J. Solid-State Circuits, vol. 39, pp. 952 955, Dec. 2004. [3] H. Jacobsson, B. Hansson, H. Berg, S. Gevorgian, “Very low phase-noise fully-integrated coupled VCOs,” Radio Frequency Integrated Circuits (RFIC) Symposium, 2002 IEEE , 2-4 June 2002 Pages:467 – 470. [4] C.-Y. Cha and S.-G. Lee; “A complementary Colpitts oscillator based on 0.35 um CMOS technology,” ESSCIRC, Portugal, 2003.pp. 691–694, 2003 . [5] C.-Y. Cha and S.-G. Lee; “Overcome the phase noise optimization limit of differential LC oscillator with asymmetric capacitance tank structure,” Radio Frequency Integrated Circuits (RFIC) Symposium, 2004 IEEE , Pages:583 – 586. [6] P. Andreani, A. Bonfanti, L. Romano, and C. Samori, “Analysis and design of a 1.8-GHz CMOS LC quadrature VCO,” IEEE J. Solid-State Circuits, vol. 37, pp. 1737– 1747, Dec. 2002. [7] P. Vancorenland and M. Steyaert, “A 1.57-GHz fully integrated very low-phase-noise quadrature VCO,” IEEE J. Solid-State Circuits, vol. 37, pp. 653–656, May 2002. [8] H. Shin, Z. Xu, and M. F. Chang, “A1.8V 6/9 GHz switchable dual-band quadrature LC VCO in SiGe BiCMOS technology,” IEEE RFIC Symp.., 2002, pp. 71– 74.
