A New Approach to Reduce Current Ripple of PWM ...

2016 IEEE 8th International Power Electronics and Motion Control Conference (IPEMC-ECCE Asia)

A New Approach to Reduce Current Ripple of PWM Inverters by Variable Switching Period Irham Fadlika

Pekik Argo Dahono

Department of Electrical Engineering Universitas Negeri Malang Malang, Indonesia [email protected]

School of Electrical Engineering and Informatics Institut Teknologi Bandung Bandung, Indonesia [email protected]

Abstract—This paper presents a new approach to reduce current ripple of PWM inverters by Variable Switching Period (VSP). The analytical expressions for output current ripple of the inverter as a function of the PWM reference signal are derived. The current ripples of the proposed method are then compared to the one using constant switching period. This method provides general expressions to control the current ripple of the inverter without sacrificing the switching losses of the inverter. It is shown that by using this technique, the minimum output current ripple is obtained. Experimental results are included to show the validity of the proposed concept.

significant increase in the fundamental output voltage as well as decrease in harmonics. Reference [11] proposed a method to decrease acoustic noise that caused by interaction of the fundamental and harmonic flux densities in induction motor by using random modulated switching frequency. A study of current ripple prediction in [12] shows that by using variable switching frequency, current ripple can be regulated to meet the certain ripple requirement. This method is realized by predicting the current ripple before pulses are generated. Furthermore, this method is applied to reduce switching loss and EMI noise [13] – [16].

Keywords— PWM Inverter, Variable Switching Period, current ripple

From the references above, there are many ways to increase the optimum performance of three-phase PWM inverter. But, they mostly lacking of theoretical analysis of current ripple and variable switching frequency to precisely adjust the current ripple to be minimum. In this paper, a new approach to reduce current ripple of three phase PWM inverter with variable switching period is proposed. From now on, the term of switching period is used instead of switching frequency due to the mathematical analysis conducted later. Basically, this paper proposed a general method to control the variable of switching period based on the pattern of the total current ripple of PWM inverter. With this method, minimization of current ripple can be obtained easily without difficulties to control the current ripple in some areas where its value is bigger. Furthermore, minimization of the total current ripple can be realized without sacrificing the switching losses of the inverter. To verify the derived expressions, experimental results are included.

I. INTRODUCTION Three-phase voltage source inverters are widely used in various applications in power conversion, such as Variable Speed Drives (VSD), Uninterruptible Power Supply (UPS), and Grid Tied Inverter. For these purposes, pulse width modulation (PWM) technique has been used to control the voltage and frequency of the inverter output for many reasons. Implementation of PWM technique is considered more modest than the programmed one. A lot of studies have been done for years to improve the performance of PWM inverters [1] – [5]. One of the most important parameters in PWM inverter is output current ripple. The output current ripple is important to determine the performance and design of an inverter. Several studies have showed that minimization output current ripple can be done by injecting harmonic signal into the reference signal. This method is popular for three – phase PWM inverter application [6] and multiphase application [7] – [9]. For a long time, constant switching frequency is used in PWM technique for three-phase PWM inverters. The constant switching frequency PWM generates unequal distributed current ripple which is increase the acoustic and EMI noise for the converter system. Compared to constant frequency switching PWM, variable switching frequency PWM allow the spectrum of the current ripple to distribute in a wider range. In [10], by using variable switching frequency and harmonic injection on the reference signal, the method produces

iv v Ed

u

iuv

iu

w

u

w

e

LL RL

iw Fig. 1. Three – phase PWM Inverter

978-1-5090-1210-7/16/$31.00 ©2016 IEEE

978-1-5090-1210-7/16/$31.00 ©2016 IEEE

v

2016 IEEE 8th International Power Electronics and Motion Control Conference (IPEMC-ECCE Asia)

VT v ur v wr

II. ANALYSIS OF OUTPUT CURRENT RIPPLE The scheme of three-phase voltage-source PWM inverter is shown in Fig. 1. The inverter is assumed to be supplied by ripple-free dc voltage source. The load is represented in delta connection and each phase of resistance, RL, an inductance, LL , and a sinusoidal counter emf in series connection. In addition, dead time effect is negligible and switching frequency carrier signal is much higher than fundamental frequency.

(a ) Ts

At first, let us consider phase uv from Fig.1 to be analyzed. The voltage equation of this phase can be expressed as di vuv = euv + RL iuv + LL uv (1) dt Where vuv is line-to-line output voltage and iuv is the load current. Load current iuv consists of the harmonic and average component and can be written as

iuv = iuv + iuv

vuv = euv + RL iuv + LL

(4)

v −v iuv =  uv uv dt LL

v

π 2

Fig. 2. Three – phase reference signal

sv vuv T0

T2

T1

T3

T3

T2

T0

T1

iuv

0

t1

t2

t3

t4

t5

t6

t7

t8

The detailed PWM waveforms over one switching period is shown by Fig. 3. When the switching frequency (fs) is high compared to fundamental frequency (fr) of the inverter, then the value of reference signal during one switching period can be assumed constant. The waveforms shown in Fig.3 are valid during the interval A which is shown in Fig. 2. Using eqn. (5) the current ripple iuv from Fig. 3 can be derived as

(5)

v

r w

iuv

A

π 6

sw

Fig. 3. Deteail PWM waveforms in one switching cycle. (a). Reference and carrier signals. (b). Switching states of each phase u, v, and w. (c). Line – to – line voltage vuv . (d). current ripple ̃ .

diuv dt

r v

(d)

su

(3)

where vuv is the average value of the line-to-line voltage. When the harmonic component of current is small, then the voltage drop across the resistance due to the harmonic component can be neglected. Thus, the harmonic current now can be expressed as

0

(c)

1 0 1 0 1 0 Ed 0

t0

di vuv = RL iuv + vuv + LL uv dt

vur

(b)

(2)

Upon substituting (2) into (1) the following equation is obtained as

v vr

θ

 − (t − t 0 )    E   −T0 +  d − 1  (t − t1 ) v  uv    v uv  = −(t − t4 ) x LL   E   −T3 +  d − 1 (t − t5 )   v uv    ( t − t8 )  

for t0 ≤ t ≤ t1 for t1 ≤ t ≤ t3

(6)

for t3 ≤ t ≤ t5 for t5 ≤ t ≤ t7 for t7 ≤ t ≤ t8

where

vuv =Ed

T1 +T2 T0 +T1 +T2 +T3

(7)

2016 IEEE 8th International Power Electronics and Motion Control Conference (IPEMC-ECCE Asia)

The time intervals T0, T1, T2, and T3 in term of switching period Ts can be expressed as

2T0 1 1 vur = − Ts 2 2 VT 2T1 1 vur - vwr = Ts 2 VT

(8)

E  2 −  d − 1 T0 (T1 + T2 ) v  uv 

(9)

2 3  Ed  (T1 + T2 ) T33  + − 1 +  3 3  vuv  

2T2 1 vwr − vvr = Ts 2 VT

(10)

2T0 1 1 vur = + Ts 2 2 VT

(11)

where VT is the amplitude of the triangular switching signal. The reference signal can be derived with respect to VT as

vur = k sin θ + so VT

(12)

vvr 2π  = k sin  θ − 3 VT 

  + so 

vwr 2π  = k sin  θ + 3 VT 

  + so 

(13)

(14)

where θ = 2πfrt and fr is the fundamental frequency of reference signal, k is modulation index, and so is arbitrary signal which is injected into the reference signals. The mean square value of the current ripple over switching period can be obtained by integrating the square value of eqn. (6) over the period of to – t8 (Fig.3 ). The integration can be done only over the half switching period as the current ripple waveform symmetric with respect to t = t4 , and the result is

1 Iuv2 = Ts

t0 + Ts



t0

2v 2 Iuv2 = uv2 Ts LL T1 + T2

+

 0

t

2 4 iuv2 dt =  iuv2 dt Ts t0

T3 T0 2 2   t dt +  t dt  0 0 2   Ed    − 1 t  dt   −T0 +   vuv    

2v 2  T 3 Iuv2 = uv2  0 + T02 (T1 + T2 ) Ts LL  3

(15)

(16)

By substituting eqns. (12) – (14) into eqns. (8) – (11) and then the results into eqn. (16), the following equation is obtained E 2 k 2T 2 π  π   Iuv2 = d 2 s sin 2  θ +  1 − 3 k sin  θ +  64 LL 6  6   3 π   + k 2 + 3 so 2 + 3 kso sin  θ −  4 3  

(17)

The same analysis can be done to phase vw and wu, and the results are E 2 k 2T 2 π  π   2 Ivw = d 2 s sin 2  θ −  1 − 3 k sin  θ +  2  2 64 LL   3  + k 2 + 3 so 2 − 3 kso sin (θ )  4  E 2 k 2T 2 5π   π   2 Iwu = d 2 s sin 2  θ +  1 − 3 k sin  θ −  6   6 64 LL  

(18)

(19)

3 π   + k 2 + 3 so 2 + 3 kso sin  θ +  4 3  

III. PRINCIPLE OF VARIABLE SWITCHING PERIOD In this proposed method, the approach of VSP is used by building the switching or carrier period to be variable, shown in Fig. 4. This technique basically works by increasing switching frequency or in other words decreasing the switching period at the time when total current ripple is in high value. Meanwhile, when total current ripple is in low value, the switching period is slightly increased. By setting the appropriate switching period based on the total current ripple pattern, the outcome is that the average value of switching period is the same as its fundamental value. With this method, the expected total output current ripple can be reduced without sacrificing switching losses of inverter.

2016 IEEE 8th International Power Electronics and Motion Control Conference (IPEMC-ECCE Asia)

Based on Fig. 5, the square value of total current ripple is repeated six times over one fundamental period. The clearer view is provided in Fig. 6, where third harmonic signal is injected. Thus, the expressions of VSP is obtained by following its pattern, that is

Ts = T (1 + A6 cos ( 6θ + γ 6 ) )

Fig. 4. The carrier waveforms of variable switching period (upper figure) and constant switching period (lower figure).

In this paper, minimization of total output current ripple is realized by both using harmonic injection signal and VSP. It has been shown in [6], the optimum injection signal to minimize the total output current ripple is

1 so = k sin(3θ ) 4

π

π

π

6

3

2

θ

2π 5π π 7π 4π 3π 5π 11π 2π 6 3 2 3 6 3 6

Fig. 5. Square value of total current ripple waveform in one fundamental frequency without addition of so

2 2 2 Itotal = Iuv2 + Ivw + Iwu

(23) Minimization of total harmonics in the load currents can be done by obtaining the optimum value of A6 and γ6. 2

π

π

6

3

2

2π 5π π 7π 4π 3π 5π 11π 2π 6 3 2 3 6 3 6

θ

Fig. 6. Square value of total current ripple waveform in one fundamental 1 4

frequency with addition of s o =    k  sin (3θ )

According to eqns. (17) – (19), the square value of output current ripple is a function of θ and Ts. We can conclude that the total current ripple is not constant and thus the value of peak – to – peak total current ripple is influenced by the θ and the value of Ts. Thus, the constant period Ts can be modified as ∞   Ts = T  1 +  ( An cos ( nθ + γ n ) )   n =1 

(20)

Where Ts is average switching period, T is fundamental switching period, An is amplitude of nth order switching period, γ n is nth order phase angle of the switching period.

(22)

To perform the analysis, let us consider the mean square value of harmonic phase current for uv, vw, and wu in eqns. (17) - (19). And the sum of harmonic in the load currents is obtained as

δ I total =0 δγ 6

π

(21)

2

δ I total =0 δ A6

(24)

By Substituting eqns. (17) – (19) and eqns. (21) – (22) into eqn. (23) and the result to eqn. (24), the result are

A6 = −

143 k (945π k + 512 3) 7 − 549376k 3 +1 35135 k 2π + 205920 π

(26)

γ6 = 0 (27) To calculate the total rms current ripple in each phase, integration can be done only over the one-sixth of the fundamental frequency, that is

1 Iuv , RMS =

π

5π 6

π I

−

6

2 uv

dθ (28)

2016 IEEE 8th International Power Electronics and Motion Control Conference (IPEMC-ECCE Asia)

Substituting eqns. (26) – (27) to eqn. (21) and the result with eqn. (22) to eqn. (28), the rms output current ripple can be expressed as

(

= K C ( − 12.289k ( k 4 + 3.0566k 2 + 2.3278) π 2

I

uv, RMS

32  4 896 2  k + 16.561k 2 ) 3 +  k 2 +  k + 21 291  

)

(30)

1

2048  2 2 2 2 + π + 150.36k ( k + 1.5224) π  873  

)

IV. EXPERIMENTAL RESULTS In order to verify the derived expressions in this paper, experimental is conducted with the parameters shown in Table 2. The construction of this experiment based on Fig. 1 using MOSFET IRFP460 power semiconductors. In this inverter, static load in wye connection was used instead of delta connection and the neutral was isolated. To avoid short-circuit through upper and lower arm of the semiconductors, a dead time 2 μs was used. The values of load resistance and inductance are   = 25 Ω   = 2.5 mH. The DC source voltage = 200 V was obtained by using a 3 – phase diode rectifier. To make sure the dc link voltage is ripple free, an LC filter is used with the value 10 mH and 250 μF, respectively. The average switching frequency  = 5 kHz and the output inverter frequency is 50 Hz. and

where

k C= 



 



π  -8.1308 π k  k 2 +

15 13440

6 679

2  32    3  +  k 2 +  π 2 + 49.582 k 2   21 21    

32

When the load is wye connected, the constant K is modified as

KY =

Ed T

(29)

3LY

Fig. 9 shows experimental results of output current ripple using proposed method and third harmonic injection signal. This figure shows that by using proposed method, the output current ripple is reduced. It should be noted that the reduction of the current ripple in PWM linear region (k ≤ 1) up to 11 %. by using the proposed method.

where LY is the wye connected load inductance

TABLE I.

Digital storage oscilloscope was used to capture the waveform of the output line current of the inverter over one switching period and eventually the data from oscilloscope analyzed to obtain the total harmonics of the inverter output line current. The numerical calculations are shown in Table I. Fig. 7 show experimental results of output line current u using the proposed method. Fig. 8 shows the experimental and calculated results of output current ripple using the proposed method. It has been shown that the experimental results compare favorably with the calculated ones.

OUTPUT CURRENT RIPPLE COMPARISON BETWEEN SIN34 AND PROPOSED METHOD Calculated (Iuv/KY)

Experimental (A)

SIN 34

Proposed Method (SIN34 +VSP)

% reduction

SIN 34

Proposed Method (SIN34 +VSP)

% reduction

0.5

0.02894490

0.028889679

-0.190781%

0.268741549

0.273825197

1.8916%

0.6

0.031559041

0.03139766

-0.511364%

0.293332686

0.296712071

1.1521%

0.7

0.033457466

0.033033898

-1.265990%

0.311378916

0.307521899

-1.2387%

0.8

0.03491645

0.033902512

-2.903896%

0.325479685

0.318675974

-2.0904%

0.9

0.036312689

0.034100105

-6.093141%

0.338995462

0.316019963

-6.7775%

1.0

0.038123936

0.033779032

-11.396786%

0.356247632

0.31797128

-10.7443%

1.1

0.040885281

0.033363221

-18.397967%

0.367853366

0.308205273

-16.2152%

1.2

0.045093345

0.033833008

-24.971173%

0.388888956

0.312545105

-19.6313%

1.3

0.05110218

0.036586635

-28.404942%

0.472075569

0.337982775

-28.4049%

k

2016 IEEE 8th International Power Electronics and Motion Control Conference (IPEMC-ECCE Asia)

signal. Experimental results are included to show the validity of the analysis. The derived expressions are useful to determine filters required on the output sides of PWM inverters. REFERENCES [1] Fig. 7. Experimental result : Output line current u using the

Output Current Ripple (A)

proposed method (k = 0.8, 1 ampere/div; 2.5 ms/div)

[2]

0.4

[3]

0.3

[4]

0.2

Calculated

[5]

Experimental

0.1

[6]

0 0

0.2

0.4 0.6 0.8 1 Modulation Index, k

1.2

Fig. 8. Experimental and calculated results of total output current ripple of proposed method

[7] [8] [9]

Output Current Ripple (A)

0.5

SIN 34

0.4

[10]

Proposed Method (SIN 34 + VSP)

0.3

[11]

0.2 [12] 0.1 0 0

0.2

0.4 0.6 0.8 Modulation Index, k

1

1.2

Fig. 9. Experimental results of output current ripple as a function of modulation index

V. CONCLUSION In this paper, a new approach to reduce current ripple by using VSP in three-phase PWM inverter have been derived. The general expression of VSP is obtained based on the pattern of the total output current of PWM inverter, so that the minimization can be done easily. It has been shown that, the optimum ways to produce minimum total output current ripple are by using VSP plus 25 percent third harmonic injection

[13] [14]

[15]

[16]

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