A NOVEL APPROACH FOR HARDWARE IMPLEMENTATION OF A DETUNING COMPENSATION CONTROL SYSTEM FOR SC CAVITIES K. PRZYGODA1, R. PAPARELLA2 1 TECHNICAL UNIVERSITY OF LODZ, POLAND 2 INFN MILANO, LAB. LASA, ITALY KEYWORDS: FPGA, Piezo sensor, Piezo actuator, Function generator, Lorentz force, Detuning ABSTRACT: Superconducting (SC) resonant cavities seems to be an attractive option for various linear accelerators under construction. The nine-cell 1.3 GHz cavities have demonstrated gradients up to 38 MV/m. They are susceptible to small changes of dimension caused by mechanical vibrations, cooling systems, human activity (microphonics) and high gradients of RF field (Lorentz forces) as well. FPGA – based control system for cavity detuning compensation is presented.
Linear accelerators uses SC cavities to accelerate electrons or positrons. TESLA type cavities are made from Niobium and for optimum operation they are cooled down to the cryogenic temperatures of 2K. They are powered by RF wave with constant frequency of 1.3 GHz, supplied from klystrons via couplers. They are operated in pulse mode with a repetition rate up to 10Hz. The RF pulse duration is around 2 ms. Field inside cavity rises to nominal value in around 500 us and during the following 800 us the accelerating gradient is kept constant (flat-top region). Almost all the energy from RF pulse is transferred to the travelling bunches of particles during this period, thanks to the extremely low resistance of cavity walls, that is lowered by RF superconductivity to nano-Ohm region. The mechanical resonance frequency of these SC cavities is around 200 Hz (Fig. 1). The shape of the cavity can be deformed by two groups of effects: vibrations, cooling systems, human activity and Lorentz forces caused by electromagnetic field [2]. The RF power is filled into the cavity during the pulse. The first phenomena is unpredictable and stochastic and its effects it’s quite limited since it generates up to 20Hz detuning. The second one is repetitive and predictable and its amplitude mainly depends on the square of accelerating field. An electromechanical system for cavity shape active and fast compensation is necessary for high gradients operation. The most widely used active elements for such systems are multilayer piezoelectric stacks. They were successfully assembled in pairs (actuator, sensor) for all 8 cavities of the FLASH (Free Electron Laser in Hamburg) Module 6 in Module Test Stand in DESY. Moreover a digital control system is also essential for properly driving piezoelectric actuators. A key component for such control system is responsible for the computation of the cavity detuning, since this information is needed as an error reference signal. Then from the real detuning information the control system has to determine the proper piezo driving signal. A first approach for such issue was implemented
using Matlab environment. However the solution, even if useful and successfully tested, is anyway too slow to be inserted in a real-time control loop, as for example needed to compensate the microphonics detuning [7]. Therefore a fastest, FPGA – based, control system for cavity detuning is presented. The paper presents first results from measurements and tests of implemented modules. abs(fft)
20
15 amplitude [a.u.]
INTRODUCTION
10
5
0 100
200
300
400
500 600 freq [Hz]
700
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1000
Fig. 1. Mechanical resonance frequency around 200 Hz for cavity 1 (module ACC6) measured during RF pulse mode
OBJECTIVES AND ASSUMPTIONS The design is divided into two parts. One involves cavity detuning computation algorithms while the second one the detuning compensation module. As a basic assumption, the project will be designed in Virtex II Pro FPGA using SIMCON3.1L low-level radio frequency control board, the reference board for the upcoming XFEL linear accelerator. The specific key features of this architecture are: 1. 512x36 block RAM modules 2. Fast 18x18 multipliers 3. Internal RocketIO modules Moreover all computations are done using 18 bits 2’complement sign numbers. The blocks are designed
using 8.1 Xilix ISE, however, the involved algorithms are general and can be implemented using various hardware and software. As said before, the main goal for the control system is to calculate cavity detuning between RF pulses and quickly estimate the best online piezo response to compensate for cavity deformations.
CONTROL SYSTEM OVERVIEW The implemented system is consisted of two main blocks as it is depicted in Fig. 2. Pforwa
Detuning compensation cavity
A
The detuning algorithm is realized with several processing stages (Fig. 3). It is based on electromechanical model of SC cavity [4]. The main formula for calculations is shown below: ⎞ U fowrard − 1 ⎛⎜ ∂φ probe Δω = ⋅ − 2 ⋅ ω1 / 2 ⋅ ⋅ sin(φ forward − φ probe ) ⎟ ⎟ 2 ⋅ π ⎜ ∂t U probe ⎝ ⎠ where
φ probe φ forward ω1 / 2
bandwidth of cavity resonator
U forward
amplitude of forward signal
U probe
amplitude of probe signal
phase of probe signal phase of forward signal
Field detection
Probe signal
FPGA1
ADC
ADC
Reflected signal
I,Q
I,Q
Forward Calibration I,Q coordinate conversion
Opto link
Forward signal
I,Q
ADC
Detuning calculation
ADC
Detuning table
Gradient table
B
Pprobe
PA
DAC
PS
Delay table
Amplitude table
Function Generator
Prefle
The application of detuning computation module
Q
Amp
FPGA2
Phs Probe phase
Fig. 2. Hardware implementation of detuning compensation system. PS and PA are piezo sensor and actuator
Authors decided to use two SIMCON3.1L boards to design the above system. One board is responsible for fast computation of cavity detuning using the information from forward, reflected and transmitted power probes. The second board is devoted to generate fast response in the form of continuous packets of pulses applied to piezoelectric active elements operated as actuators. Test signals measured from probes after downconversion are distributed to the first FPGA using fast 14 bits resolution ADC converters. The data can be sampled with clock frequencies up to 80 MHz. The detuning value is driven to the second board using fast optical links. Internal build-in Rocket IO modules are dedicated for this purpose. The second board is equipped with internal function generator for proper pulse shape generation. The applied amplitude of proper shape is calculated automatically using given algorithms. The function generator outputs are connected to fast DAC outputs. Moreover the module for feedback information from piezoelectric sensors is added. Power amplifiers are used for driving piezoelectric actuators with high voltages (gain -40, up to 160 V) while operational amplifiers with gain G=0.5 V/V operated as buffers are used to fit the signals to input ADC channels (piezo sensor read back). The implemented system is in evaluation stage now. The compensation and detuning computation blocks has been implemented and tested separately. For the future purpose they will be combined as it has been described. The implemented modules are deeply described in separate sections.
Phs forward
Phs Probe
Amp Probe
I
Amp Forward
LP FIR
Sine memory Adr DIV
DET
MUL
SUB
Dout
SUB
Fig. 3. Detuning calculation block
The input analytical signals from probes are downconverted with 250 kHz intermediate frequency (IF) via nonlinear mixers. Sampling of IF with a sampling rate four times higher gives four samples per cycle. Therefore, two consecutive samples represent a real and imaginary parts of probe, forward and reflected signals [1]. The signals from ADC channels are demodulated using I (in-phase) and Q(quadrature) field detectors. Forward and reflected signals are then properly combined to eliminate cross-talks. This procedure implies a cross multiplication between forward and reflected signals using 4 weighting coefficients named a,b,c and d. Phase/amplitude detectors are used to obtain phase and amplitude from IQ data (coordinate conversion from Cartesian to polar). The amplitude and phase signals are combined together to calculate final detuning value. Dual-port RAM memory block was added for sine values interpolation. The derivative of the probe phase signal is then computed via a proper 32 taps FIR (Finite Impulse Response) filter. Conversion from Cartesian to polar coordinates is the most critical issue for this design. Authors decided to use new methods to decrease timing and accuracy of the computations. Whole system is synchronized using external trigger and strobe signals. The first one inform FPGA that new RF pulse is filling the cavity, it is a 1 us width square pulse with repetition
rate between 2 and 10 Hz. The second one is used for validation of incoming samples from external downconverter. Its repetition rate is 1 us. Implemented detuning calculation module so far consumes around 60% of all FGPA resources. Moreover this value could be subjected to a further increasing for future purposes.
settings of proper amplitude, offset and delay for applied signal. Detuning measurements were initially done with Matlab scripts then the FPGA-based calculation module was adopted. advance
The application of detuning compensation block The compensation module consists of detuning data stream, a pack of input registers, dual port RAM memories, address decoders and internal function generator (Fig. 4). The programmable function generator is the main module among those. The initial values of the generator can be set using external registers and BRAM block memory. The memory block is used to interpolate the proper pulse shape. Function generator parameters, as amplitude and delay, are calculated automatically using given algorithms. Dualport RAM memories are dedicated for storage of amplitude and delay values from manual performed measurements. Using additional components as address decoders and combinatorial logic the online compensation goal has been achieved. Moreover the interpolation of the actual detuning is an essential block for the system. In sight of its implementation a FIR smoothing LP filter has been used before to ease the detuning interpolation. Also The first derivative of detuning value is computed since it’s used for the finetuning correction calculation. All input registers and memories can be easily changed via Integral Interface. DETUNING stream
Amplitude updater
FIR interp
amplitude memory
addrB dataA addrA
Grad Register slope sel
amplitude
Function Generator
Addr encoder
delay memory
addr data
delay
Fig. 4. Detuning compensation block
Implemented module consumes 50% of all FPGA resources.
THE CONTROL SYSTEM INITIAL TESTS Several tests of implemented modules were performed in MTS in DESY. All 8 cavities with 16 assembled active elements were taken into consideration. The main goal for the carried out tests was to find a proper shape, amplitude and delay of the pulse for detuning compensation in each cavity.
FG start
FPGA start MT start
RF start
time
1 us
FPGA delay FG delay
FG to RF dly
Fig. 5. The trigger distribution for piezo FPGA
A new timing approach was used for the implemented system. An additional trigger for piezo FPGA was successfully added. TABLE 1. The various delay settings of performed tests.
method delay [ms] 1st osc 0,449 2 Hz1 2,449 2 1,36 0,64 2nd osc 1,449 10 Hz3 2,449 1 97 4
Comment from MT2 to FPGA start from MT to RF start from FPGA start to FG start from FPGA start to FG start from FG start to RF start from MT to FPGA start from MT to RF start from FPGA start to RF start from FPGA to FG start from FG to RF start
Therefore it wasn’t necessary to port additional delay block in hardware (Fig. 5). The carried out delay settings are shown in Tab. 1. The measurements were carried out using one single negative half a sine pulse applied to piezoelectric actuator via amplifier. Its time width is 2.5 ms, therefore corresponding to a frequency of 200 Hz if repetitive. This value corresponds to the mechanical cavity resonance frequency shown in Fig. 1. The frequency was discovered from spectrum analysis of cavity oscillations without piezo pulse. Two methods were tested to compensate cavity detuning. The first method takes advantage of the cavity oscillation directly driven by the Piezo, therefore it’s based on a short time advance of the Piezo pulse if compared to the RF pulse. This time value (around 0.6 ms) was discovered experimentally but it’s coherent with the mechanical propagation time from piezo to cavity (Fig. 6). The second method is instead using the second free cavity oscillation induced by the Piezo pulse, so it needs a longer time advance to be set (around 4 ms, see Fig. 7).
Function generator manual tests The measurements involves function generator component implemented in Virtex II pro FGPA. The control application coded in c++ was used for manual
1
Measurements performed with 2 Hz repetition rate of RF pulse MT – main trigger source for accelerator system 3 Measurements performed with 10 Hz repetition rate of RF pulse 2
Performed measurements allowed authors to find out the proper amplitude and delay for applied pulse. Results from measurements are depicted in Tab. 2. FPGA-based function generator was used with lower RF gradients (20 – 25 MV/m). The maximum achievable piezo voltage from DACs outputs is around 40 V (±1*(-40) V). The
real voltage applied to piezo actuator was actually one half of it because of 50 Ohm termination for all inputs and outputs. Therefore an external function generator was used with higher RF gradients. For future purpose new piezo amplifiers from APEX will be ported with gains G = - 100V/V and average current load up to 300mA.
TABLE 2. Measurements for proper delay and amplitude for various cavity gradients. RF power grad [MV/m] 20
cav1
cav2
Dly [ms] 1,36
Amp [V] 20
25
0,36
28
30
1,0809
58
33
1,0809
80
35
1,0809
86,4
Dly [ms] 1,36
cav3
Amp [V] 24
Dly [ms] 1,36
0,36 / 32 / 28 0,36 4 -3,3 1,0809 76 1,0809 detuned
cav4
cav5
Amp [V] 20
Dly [ms] 1,36
Amp [V] 20
28
28 76 96
52
0,36 / -3,3 1,0809
1,0809
70,4
1,0809
1,0809
80
Dly [ms] 0
cav6
Amp [V] 32
Dly [ms] 0,4 / -2,2 5 Detuned
Amp [V] 24 / 28
Amp [V] 28
Dly [ms] 0,4
Amp [V] 20
32
0,36
32
detuned
88
detuned
external DESY servers. Test signals from cavity 1 in ACC6 module were connected to three ADC inputs of SIMCON3.1L board. The detuning result was driven to one of four available DAC outputs.
4
x 10
1.62 1.6
final detuning
piezo on piezo off
1.58
800 calibration parameters: a = -0,41349 + 1,6972i b = 0,0060967 + 0,0045048i
600
RF START 2000 us
1.56 1.54
400
PIEZO START 1360 us
200 detuning [Hz]
amlitude [a.u.]
Dly [ms] 0,8 / -3,2 0,36 / -3,3 1,0809
cav8
detuned
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Fig. 6. 1’st oscillation compensation method (gradient 20 MV/m).
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x 10
-800
piezo off piezo on
1.635
amlitude [a.u.]
1.625 1.62 1.615 1.61 1.605 RF START 1000 us
1.6 1.595 0
PIEZO START before MT 3300 us delay
1000 2000 3000 4000 5000 6000 7000 8000 9000 10000 time[us]
Fig. 7. 2’nd oscillation compensation method (gradient 20 MV/m).
Online detuning calculation tests The tests were performed using Virtex II pro FPGA. Some Matlab scripts were used to communicate with FPGA. The board can be easily operated using fast
5
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1000 1200 time [us]
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Fig. 8. The measurements of cavity detuning using SIMCON3.1L board
1.63
4
0
The calibration parameters were calculated with Matlab script and transferred directly to FPGA. The detuning computation is shown in Fig. 8. Eventually, two jumps in the detuning data stream occurs sometime, as for 500 us in Fig 8, at the edges at 500 and 1300 us. This issue is related to the calibration coefficients. Actually it has been shown that a good set of coefficients for the detuning Matlab scripts is not always equally good for the FPGA version of the same script. In order to minimize those result jumps across edges, the calibration coefficients should be manually modified both in the real and imaginary component. It’s anyway important to underline that those jumps induce just an additional offset in the fill-time and, eventually, in the flat-top region but, since the decay region is unaffected by this issue, the actual data can be easily reconstructed.
means that the delay was set before main trigger event detuned - cavity was switched off forcing an high detuning when its maximum operating RF gradient was achieved.
THE RESULTS FROM MEASURMENTS 300
piezo off piezo on, step motor off piezo on, step motor on
250 200
X: 665 Y: 134.9
detuning [Hz]
150 100
X: 665 Y: 34.41
50 0
The performed measurements results were used for the simulations of an automatic cavity detuning compensation method. The implemented VHDL components has been optimised for minimum latency and resource utilization. They can be easily applied in other places of the LLRF control system. For future purpose authors are planning to port the implemented controller to upcoming ATCA system [5].
X: 665 Y: -50.66
THE AUTHORS
-50 -100 -150 -200 400
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1200 1400 time[us]
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Fig. 9. The detuning measurements with and without piezo compensation for cavity 1 ACC6 module
Performed tests proved that cavity deformation can be easily compensate using negative single pulse shape that interacts with oscillations caused by RF field pulse. Up to a maximum value of 630 Hz of detuning has been compensated in this way (cavity 3, module 6, 35 MV/m). The result of the detuning without applied pulse, with applied pulse and with step motor correction is depicted in Fig. 9. The proper step motor position was set to eliminate static detuning offset around 100 Hz. The proper delays and amplitudes were discovered for all 8 cavities. The measurements were performed for high operating gradients from 20 to 35 MV/m. The performed measurements will be used to apply to the system the method based on the adaptive feed forward algorithm shown. The initial settings for amplitude of applied signal are taken from amplitude memory. The algorithm is focused on the applied signal to piezostack and the online measurement of cavity detuning. Previously performed tests discovered that, when close to the optimal compensation settings, the amplitude of piezostack signal might be assumed as a linear function of the RF gradient [3, 6]. As a consequence, a real-time amplitude correction can be calculated for fine-tuning. If the error is smaller than previous one the new settings are stored in the amplitude memory. If the error still exists then a further correction is calculated and signal amplitude is properly modified. The given algorithm is in evaluation stage now. The initial simulations has been performed using ModelSim6.0d software. The tests with real accelerator signals will be next performed.
CONCLUSIONS The new control system was initially implemented in Virtex II Pro FPGA device. The implemented control system allows to compensate all cavities detuning in MTS. Moreover the system was used for online computation of cavity detuning. The calculation was dedicated to one cavity but in the future it will be ported to all cavities. Multiplexing and demultiplexing blocks with counters will be added for this purpose. The counters will be responsible for samples distribution from 8 cavities.
Konrad Przygoda is from the Department of Microelectronics and Computer Science, Technical University of Lodz, al Politechniki 11, Poland. Rocco Paparella is from Istituto Nazionale di Fisica Nucleare, Università degli Studi di Milano and Laboratorio Acceleratori e Superconduttivita' Applicata. Via Fratelli Cervi 201, 20090 Segrate, Italy. E-mail:
[email protected],
[email protected]
ACKNOWLEDGEMENTS We acknowledge the support of the European Community-Research Infrastructure Activity under the FP6 „Structuring the European Research Area” program (CARE, contract number RII3-CT-2003-506395), and Polish National Science Council Grant “138/E370/SPB/6.PR UE/DIE 354/2004-2007”.
REFERENCES [1] Schilcher T., “Vector sum control of pulsed accelerated fields in Lorentz force detuned superconducting cavities”, PhD thesis, Hamburg 1998, pp. 52. [2] Doleans M., “Etudes dans les cavities supracoductrices elliptiques a beta reduit”, PhD thesis, Paris 2003, pp. 32,55. [3] Sękalski P., ”Smart materials as sensors and actuators for Lorentz force tuning system”, PhD thesis, Łódź 2006, pp. 88,111-118. [4] Jałmużna W., “Design and Implementation of universal mathematical library supporting algorithm development for FPGA based systems in High energy physics experiments”, MSc. thesis, Warsaw 2006, pp. 61,62. [5] Kay Rehlich., “ATCA: a new Bus System for High Reliability”, 2005, DESY, Hamburg, Germany. [6] M. Huning, RWTH Aachen, S.N. Simrock, “System identification for the digital RF control system”, DESY, Hamburg, Germany. [7] Stefan Simrock, Gevorg Petrosyan, Alberto Facco, Vladimir Zviagintsev, INFN-LNL; Stefano Andreoli, Rocco Paparella, “First demonstration of microphonics control of a Superconducting cavity with fast piezoelectric tuner”, Particle Accelerator Conference 2003.
