SCIENCE CHINA Information Sciences
. RESEARCH PAPER .
October 2012 Vol. 55 No. 10: 2226–2233 doi: 10.1007/s11432-012-4636-1
A novel compact low-power direct conversion receiver for mobile UHF RFID reader LIU Shan1* , WANG Xin’An1* , SHEN JinPeng1 , WANG Bo1 , YE Tao2 & HUANG Ru3 1Key
Laboratory of Integrated Microsystems, Peking University Shenzhen Graduate School, Shenzhen 518055, China; Kong R&D Centre for Logistics and Supply Chain Management Enabling Technologies, HongKong, China; 3Institute of Microelectronics, Peking University, Beijing 100871, China
2Hong
Received February 24, 2012; accepted June 2, 2012; published online July 13, 2012
Abstract A novel direct conversion receiver with low cost and low power is implemented in a 0.18 μm 1P6M standard CMOS process for a Mobile UHF RFID reader. A highly linear active mixer with low flicker noise and low noise active load is proposed. An efficient and low cost on-chip DC offset voltage canceling scheme is adopted with a high-input-impedance four-input OPAMP to buffer the output of the DC offset canceller (DCOC) block. The receiver has a measured input 1 dB compression point of −2 dBm and a sensitivity of −72 dBm in the presence of the large leakage signal from the transmitter. Only occupying a silicon area of 2.5 mm2 and consuming 21 mA from a 1.8 V supply, the receiver makes the mobile UHF RFID reader to communicate with a transponder in a distance of 1 m conveniently. Keywords OPAMP
direct conversion receiver, mobile UHF RFID reader, low power, DCOC, active mixer, four-input
Citation Liu S, Wang X A, Shen J P, et al. A novel compact low-power direct conversion receiver for mobile UHF RFID reader. Sci China Inf Sci, 2012, 55: 2226–2233, doi: 10.1007/s11432-012-4636-1
1
Introduction
Radio frequency identification (RFID) as an automatic identification technology, due to its numerous advantages, is becoming popular and commercially significant. Especially the UHF band passive RFID system has large storage capacity, high data rate, and rewritable ability. Moreover, it supports multiple tag identification, and suitable for non-line-of-sight environment [1]. Currently many different UHF RFID products are available in the market to meet different demands. Implanting the RFID reader into a mobile phone or PDA is becoming a new trend in the design of RFID systems. A typical UHF RFID system consists of a reader and several passive transponders (Figure 1). To reduce both the cost and size of a UHF RFID system, a directional coupler is always used instead of an RF circulator. The communication between the reader and the transponders can be defined as half duplex. As shown in Figure 1, firstly the reader sends an un-modulated carrier signal through the antenna to energize the transponders. Once the transponders are powered up, the reader sends commands to the transponders by modulating the carrier signal. After the commands are completed, the reader stops modulating the *Corresponding author (email:
[email protected],
[email protected])
c Science China Press and Springer-Verlag Berlin Heidelberg 2012
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Carrier wave signal
DSP
TX
Modulated signal
LO
RX
Directional coupler
Figure 1
Transponder
Backscatter signal from transponder
A typical UHF RFID system.
carrier and sends again un-modulated carrier signal to provide power for the transponders. At this time, the selected transponder encodes the data and responds by back-scattering the reader’s carrier signal. The back-scattering is achieved by reflecting the incoming carrier power by changing the impedance of the transponder antenna [2]. In general, mobile device has some inherent problems such as: the short service lifetime of battery, and the isolation between the transmitter and the receiver. Nowadays the price of a mobile phone or PDA is becoming lower and lower, so the cost of UHF mobile RFID reader is a key barrier to its popularity. To prolong the battery service lifetime and lower the cost of UHF mobile RFID reader, a novel low-cost, low-power receiver is presented in this paper.
2
System design considerations
RFID is a technology from radar system. The data from the passive transponders to the reader is transferred by reflecting the reader’s carrier signal, and the receiver and the transmitter of the UHF RFID readers are working at the same time. When the reader is communicating with the transponder, due to the finite isolation of the transmitter between the receiver, and the imperfect matching of the coupler between the antennae, there is a large leakage signal fed into the receiver from the transmitter. The power of the leakage signal can be calculated by the following equations: PLeakage1 = PTX + S11attenna − Ccoupler ,
(1)
PLeakage2 = PTX − IsoTX−RX ,
(2)
PLeakage,total = PLeakage1 + PLeakage2 P1
dB−RX
− 5 dB.
(3)
PTX is the output power of the transmitter, S11attenna is the S11 of the antenna, Ccoupler is the coupler coefficient, IsoTX−RX is the isolation of the transmitter to the receiver. According to (1), if the S11attenna is −10 dB and the coupler coefficient is 10 dB, 15 dBm output power of the transmitter (PTX ) will induce at least a leakage signal of −5 dBm at the input of the receiver. PLeakage2 is omitted as it is much less than PLeakage1 . According to (3), taking 5 dB for margin, the input P1dB point of the receiver should be larger than 0 dBm. What is more, the leakage signal mixing with the LO signal will generate a very large DC offset. So there are two main difficulties in designing a receiver for UHF RFID reader: the first one is to design a high linearity RF fronted-end to make sure that the large leakage signal will not saturate the RF front-end, and the other one is to cancel the DC offset voltage efficiently. There are several schemes to cancel the DC offset voltage [3–5]. Ref. [3] uses a series feedback structure with high input impedance to cancel the DC offset. But the capacitance is 10 nF, which is unable to be integrated on chip. Ref. [4] uses another signal path to generate a signal which is equal to the leakage signal in amplitude and phase and utilize a differential amplifier in front of the down-converted mixer to cancel the leakage signal. But this method is very complicated and will make the area of chip larger and consume more power. It is not suitable to mobile UHF RFID reader. Ref. [5] uses a low pass filter
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Mixer
DCOC
PGAa
PGAb
ΔΣ ADC
Mixer
DCOC
PGAa
PGAb
ΔΣ ADC
RFIN
Figure 2
The architecture of the receiver.
as a high pass filter to cancel the DC offset voltage. This way is easier than the method in [4], but it almost doubles the area and the power consumption of the analog baseband circuits. It is not the best choice for mobile UHF RFID system. In this paper, we present a novel low cost low power integrated direct-conversion receiver with an efficient DCOC scheme for mobile UHF RFID applications.
3
Circuits design
The proposed direct-conversion architecture receiver for mobile UHF RFID reader is depicted in Figure 2. It consists of a down conversion mixer, a DCOC block, two PGA and a low pass filter. 3.1
RF front-end
Because there is a large leakage signal fed into the receiver from the transmitter, the receiver of UHF RFID reader always eliminates the low noise amplifier (LNA) to reduce the linearity demands of the down conversion mixer. So the noise figure of the receiver can be expressed as
2 Vni,DCOC A2V,Mixer (Vn + In Rs )2 + NF = 1 + 2 + 2 α · 4kT Rs α · 4kT Rs
2 Vni,DCOC A2V,Mixer ·A2V,DCOC
α2 · 4kT Rs
,
(4)
where α denotes the voltage gain from the antenna to the input of the mixer, and Vn and In denote the equivalent input noise voltage and noise current of the mixer respectively, and the Rs is the impedance 2 2 and Vni,BB is the equivalent input noise of the DCOC and the Baseband of the antenna, Vni,DCOC respectively, AV,Mixer and AV,DCOC is the voltage gain of the mixer and the DCOC respectively. The down-conversion mixer used in the direct conversion receiver is illustrated in Figure 3. To improve the linearity of the mixer, the derivative superposition method in [6] is used. But the auxiliary device is a BJT in linear region not a MOSFET in sub-threshold region, as a MOSFET in sub-threshold region is noisier than a BJT in linear region. What is more, a capacitor cross-coupled common-gate (CCCG) scheme [7] is adopted in the input stage to improve the noise performance and save half current consumption with the same conversion gain. By (4), increasing α will reduce the NF of the receiver. So instead of a current tail, an external 50 to 200 Ω balun is used, which not only realizes the impedance matching between the directional coupler and the two I/Q mixers, but also provides the receiver with 6 dB voltage gain to improve the noise performance. Since the receiver is direct-conversion, and the down conversion active mixer is the first block of the receiver, the flicker noise is another crucial problem. From [8] we know that the flicker noise of the mixer is mainly coming from the switch stages, and the flicker noise of BJT is much smaller than that of the MOSFET, so vertical NPN BJTs are used in the switch stages to reduce the flicker noise. The vertical NPN BJTs with 5×5 μm emitter area in our process has a transient frequency of about 2.3 GHz, and a current gain of about 20, which are sufficient for the 900 MHz operation frequency UHF RFID reader system [9]. Except the flicker noise from the switch stage, the noise of the loads also increases the noise figure of the receiver. In order to get a high conversion gain to suppress the noise contribution of the analog
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VDD R2 MP1
R1 MP0 MP2
VBLOAD
OPAMP RL
Low noise active load
VREF
CL
VBLOAD
MP3 RL CL
Vout
V-NPN BJT for switch stage
VLO VB1 CCCG Input stage with BJT
CM1
CM0
50 Ω to 200 Ω Balun VREIN
Figure 3
The topology of the down conversion mixer.
Rf
VCM
Rs InnA InpA
INP
outp
OUTP
R1
C R
S1 Four inputs OPAMP
VCM S1 R C
R1
INN
InnB InpB VCM
outn
OUTN
Rs Rf
Figure 4
The topology of the DCOC.
baseband circuits, low noise active loads parallel with RC is used. The RL and CL are not only used as loads to filter the high harmonic components of the output of the mixer, but also as a common voltage detector. 3.2
DCOC block
As illustrated in Figure 2, the DCOC block is connected with the active Gilbert cell mixer, and followed by a programming gain amplifier (PGA). It is used to cancel the DC offset voltage generated by the large leakage signal mixing with the LO signal. The proposed DCOC block is depicted in Figure 4. It is a simple first order high pass filter with a time-varying 3 dB cut-off frequency corner. Once the transmitter starts to send the carrier signal, the switch S1 is closed to set a higher 3 dB cut-off frequency to remove the DC offset voltage quickly, when
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Vdd Mbias
Mtail1
M13
M14
Mtail2
Mtail3
R1 outn
inpA
M1
M2
innA inpB
M3
M4
vcm innB
outp
C1 C1
M 9 M 10
outp
outn R1
Ibias
Cc Rc
Rc
Cc
M7
M8 M5
Figure 5
M6
M11
M12
The schematic of the four–input OPAMP.
the transponder is beginning to transform the data, the switch S1 is opened to set the cut-off frequency properly, so that the wanted signal can pass smoothly. In order to meet the transmit-to-receive turnaround requirements [10], the cut-off frequency of the HPF is set to 8, 16, 32 KHz respectively when the data rate of the signal from the transponder is 40, 80, 160 kbps. With the noise and area of the DCOC block taken into consideration, the resistance of R is chosen carefully; and the C uses sandwich metal capacitor to reduce the area of the circuit [11]. Since the DCOC block is followed by a PGA, the input resistance of the PGA should not affect the cut-off frequency of the DCOC. In general two OPAMPs are used to build a voltage buffer to provide high input impedance. But two OPAMPs need more power and die area. In our design, a novel high input impedance voltage amplifier based on a four–input operational amplifier is designed. As shown in Figure 5, where the M1–M4 are differential input pairs, M5 and M6 are the active load of the first stage, M7/M8 with M13/M14 makes up of the second stage, the error amplifier utilized in CMFB consists of M9–M12 with the Mtail5 providing the bias current and the R1 and C1 detecting the common voltage of the output. The Rc and Cc are compensatory components for keeping the circuit stable.
3.3
Analog baseband
In order to lower down the power consumption, only two resistor-feedbacking PGAs and a 4th-order continuous-time active-RC low pass filter are utilized. The PGAs are based on the general OPAMP of two-stage Miller-compensated and zero-nulling topology with low noise and small input DC offset. As shown in Figur 6(a), the PGAa is a resistor feedback closeloop amplifier. With the resistance regulation of the Rf, the voltage gain of PAGa is varied from 0 to 24 dB with 3 dB/step. To cover the Link-Frequency from 40–160 KHz, the 3 dB cut-off frequency of the 4th-order active-RC filter is tunable from 80 to 320 KHz. The topology of the low pass filter (LPF) is depicted in Figure 6(c). The resistor arrays are controlled by digital signals from an SPI. The LPF also acts as an anti-alias filter for the following sigma-delta ADC. Considering the voltage amplifier in DCOC block, the PGAa and the LPF are based on OPAMP, and they would generate DC offset voltage, a DCOC loop is made parallel with the PGAb to cancel the DC offset voltage. The schematic is depicted in Figure 6(b). The cut-off frequency can be expressed as fC−3dB =
1 Rf 1 · · . 2π R2 C R3
(5)
In order to meet the transmit-to-receive turn-around requirements, the cut-off frequency is let also to be time-varying. To make full use of the sigma-delta ADC, the voltage gain of the PGAb is also set to 0–24 dB with 3 dB/step to amplify the baseband signal to the optimal amplitude of the ADC.
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Rf
Rf
INP R1
INP R1 INN R1
OUTN OPAMP
INN R1
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Rf
OUTP R3
Rf
OUTN OUTP
R3 (a)
C
R2
C
R2
(b)
R_Array
OUTP
INP
OPAMP
OPAMP
OPAMP
OPAMP OUTN
INN
(c) Figure 6
(a) The topology of the PGAa; (b) the topology of the PGAb; (c) the topology of the LPF.
MIXER PLL
DCOC PGAa LPF DSP
TX
PGAb ΔΣ ADC
Figure 7
4
The die photo of the reader.
Figure 8
Measured P1dB point of the RF front-end.
Measurement results
The receiver is integrated in a mobile UHF RFID reader transceiver chip that also includes a transmitter and a frequency synthesizer. A die photo is shown in Figure 7. Including the ESD I/O pads, the chip is fabricated in a standard 0.18 μm CMOS process. The area is 3.2 mm×3.2 mm and the receiver occupies about 2.5 mm2 . To get good RF grounding and heat dissipation properties, it is housed in QFN package. Based on the FR4 PCB board for testing, the receiver is measured as follows. As the large leakage signal from the transmitter to the receiver is a block signal to the receiver, when measuring the P1dB of the receiver, the transmitter transmits carrier signal to provide the leakage signal. As shown in Figure 8, the input P1dB compression point of the receiver is −2 dBm. It is sufficient for the mobile UHF RFID reader because the output power of the transmitter is 12 dBm. The sensitivity is also measured under FM0 encoding of 80 kbps data rate. When the BER is set to 0.1%, the sensitivity of the receiver is −72 dBm in the presence of the large leakage signal from the transmitter.
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Figure 9
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The waveform of the input of the receiver.
Figure 11
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Figure 10
The voltage of the output of the ΣΔ ADC.
Some waveforms of the decoding part.
The time domain waveforms of the receiver are shown in Figures 9–11 when using the reader to communicate with transponders in a distance of 1 m. Figure 9 shows the receiver’s input signal in spectrum (upper part) and time domain (lower part); Figure 10 shows the output voltage of the sigmadelta ADC, where the large DC offset voltage is removed efficiently. Some waveforms of the decoding part are illustrated in Figure 11. The main performances are summarized in Table 1. The receiver in this work shows a performance comparable to that of several other integrated UHF RFID reader transceiver in CMOS process with a 1.8 V supply, especially in the power consumption and small die area.
5
Conclusion
A novel direct conversion receiver is implemented for mobile UHF RFID reader in a standard 0.18 μm CMOS process. Adopting a new on-chip DCOC topology, the DC offset voltage due to the large leakage
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Table 1
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Performance summary and comparison
Spec
Ref. [3]
Ref. [12]
Ref. [13]
This work
Technology
0.18 μm CMOS
0.18 μm SiGe
0.18 μm CMOS
0.18 μm CMOS
Sensitivity@jammer
−70dBm@−5dBm
−70 – −85dBm@0dBm
−70dBm@−5dBm
−72dBm@−5dBm
Input P1dB
−4 dBm
11 dBm
3.5 dBm
−2 dBm
Power
RX:90 mA
Total:1.5 W
RX:105.6 W
RX:21 mA
Die size
RX:6 mm2
Total:21 mm2
Total:18.3 mm2
RX:2.5 mm2∗
∗ Not include the DSP for RX
signal from the transmitter is cancelled efficiently. The whole receiver consumes 21 mA of current from a 1.8 V supply. With a sensitivity of −72 dBm in the presence of 12 dBm transmitter power and a P1dB of −2 dBm, the receiver makes the reader communicate with the transponder in a distance of 1 m conveniently.
Acknowledgements This work was supported by Hong Kong Innovation and Technology Fund (Grant No. ITP/034/08LP).
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