Proceedings of 2011 International Conference on Signal Processing, Communication, Computing and Networking Technologies (ICSCCN 2011)
A Novel Double Field-Plate Power High Electron Mobility Transistor based on AIGaN/GaN for Performance Improvement Morteza Fathipour3
Saba Rajabil, Ali A. Oroui, Hamid Amini Moghadam4, S. E. Jamali Mahabadi5
Device Modeling and Simulation Lab Electrical Engineering Department
Electrical Engineering Department
Tehran University
Semnan University, Semnan, Iran I Saba
[email protected] 2
[email protected]
Tehran, Iran
Abstract-In this paper, we have investigated the effectiveness of employing the drain field-plate technique to enhance the breakdown
vo ltage
of
single
source
field-plate
(SSFP)
high gate leakage are linked. Engineering low gate leakage while maintaining low dispersion is critical and conveniently
AIGaN/GaN power high electron mobility transi sto rs (HEMTs).
achieved by the field-plate technology. A field-plate is a metal
A systematic procedure is provided fo r designing this new double
electrode which offers an additional edge for the electrical
drain
and
source
field-plate
(DDSFP)
structure,
using
two
dimensional simulation to achieve the maximum improvement in the drain-source current (IDs) and breakdown vo ltage (BV). It is found that significantly higher BV and IDs can be achieved by just
optimizing
the thickness
of
the
passivation
layer Si3N4
beneath the field plates and the length of field plates connected to
field lines to terminate at higher drain bias and wider depletion region beneath the gate. Thus the electric field spreads more uniformly between gate and drain [7, 8, 9]. Hence the speed of the transistor is not trade off at the expense of breakdown voltage.
the source and drain. The effects of the substrate superjunction
In optimizing the performance of the power HEMTs based
layers thickness and the gate recess depth on the BV a re also
on AIGaN/GaN there are two important design parameters to
studied.
consider:
Keywords-AIGaN/GaN double field-plate HEMT,drain field plate, gate recess, field plate geometry,
passivation
layer
thickness, superjunction.
first is the field-plates expansion in the region
between gate and drain and second is the thickness of Si3N4 passivation layer beneath them. For t=O and t=oo all electric field lines are terminated on the gate edge, thus depletion width beneath the gate is small [5]. Hence the effect of field plate is eliminated and the peak of the electric field occurs at
I.
the drain side edge of the gate. The thickness of passivation
INTRODUCTION
The AIGaN/GaN Power High Electron Mobility Transistors are among the most promising devices envisioned for high power and high frequency applications. Since GaN is a wide band-gap material, HEMTs based on AIGaN/GaN are capable of sustaining high breakdown electric field (Ec�3MV/cm), nearly three times larger than that of Si or GaAs [1], [2]. This feature provides possibility of using GaN in high voltage and high frequency transistors. Factors that limit GaN transistor performance
are
primarily
dispersion
and
gate
layer will be optimized by allowing some of the electric field lines to be terminated on the field-plates edges and the rest on the gate. This leads to a more uniform spreading of electric field between gate and drain, and also widening of depletion region beneath the gate. In this paper, we present a new dual (source and drain) field-plate (DDSFP) structure, as shown in Fig. l(b), and investigate the effects of the thickness of passivation layer, the field-plate length, the thickness of the substrate superjunction
leakage.
layers and the gate recess depth on the breakdown voltage. By
Electrical field lines which concentrate at the drain-side edge
employing a DDSFP structure, three peaks appear in the
of the gate cause charge injection into the surface traps. This
electric field distribution, one at the drain-side edge of the gate
reduces the field concentration at the drain-edge side of the
and the second one beneath the edge of the source field-plate
gate, but leads to high-frequency gate dispersion, because the surface traps respond slowly
to gate bias. Dispersion is
eliminated by an effective surface passivation which leads to electric field concentrating at the drain-side edge of the gate [5]. Hence low dispersion and high field concentration and
and the third one beneath the edge of the drain field-plate. The p-n junction beneath the heterostructure causes depletion of the 2DEG layer and therefore the electric field will be reduced. The doping concentration is uniform and the electrostatic potential is laterally increasing
from gate to drain. Thus,
depletion near the drain is so stronger than that near the gate and the width of the depletion region near the gate is so
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272
Proceedings of 2011 International Conference on Signal Processing, Communication, Computing and Networking Technologies (ICSCCN 2011)
narrower than that near the drain. Hence, we employ two field
SFP
plates to redistribute the electrical field more uniform through the region between the gate and drain and to increase the breakdown voltage of the transistor. The source field plate with negative voltage enhances the depletion near the gate and the drain field plate applied positive voltage prevents the drain side from more depletion. The field plate connected to the source has an advantage over those connected to the gate. The charging and discharging
p-tvT;le GiN
of field plates to the drain capacitance can be faster if they are connected to the source [5]. The
device
structure
and
modeling
assumptions
are
(a): Sin Ie Source Field-Plate SSFP) structure.
discussed in section 2 and the simulation results are shown in
SFP
section 3. Finally in section 4 the conclusion is provided.
II.
DEVICE STRUCTURE AND MODELING ASSUMPTIONS
The structure for the SSFP AIGaN/GaN HEMT is shown in Fig. l(a). This structure consists of a GaN superjunction substrate layers formed of three oppositely doped p-n regions with total thickness of 4.8f.!m. In practice, to achieve the best performance in a superjunction structure, precisely charge balanced p and n voltage-sustaining columns must be formed by fabrication to have exactly the same doping concentration and the same column width [10]. Hence, we chose the doping 15 3 concentration of 1.7x10 cm- for each layer of the substrate. 15 An n-doped GaN layer with doping density equal to 1x10 cm3 and thickness of 1.6f.!m is deposited on the substrate. The AIGaN layer is assumed to be 40nm thick and comp osed of 3 1 30% Aluminum with a donor density equal to lx10 cm- • The doping concentration of AIGaN beneath the drain and source 18 3 electrods is lxl0 cm- • As we know, AIGaN/GaN HEMTs 2 typically have a high electron mobility (f.!=1500cm /V.s). To 2 achieve mobilities of f.!=2000cm /V.s, we have used two thin
(b): Double Drain and Source Field-Plate (DDSFP) structure. Fig.
semiconductor.
and 9.1 f.!m, respectively. The device structure for the novel DDSFP AIGaN/GaN HEMT is shown in Fig. l(b). For the
The
energy
and
current
fluxes
must
simulation
software
solves
the
three
basic
equations
and doping levels for both structures are chosen to be the To study the presented device structure and compare it with single source
field-plate structure, a
hole continuity equations. A Two Dimensional Electron Gas (2DEG) is formed at the interface of the heterojunction [1]. In this analysis the 2DEG charge density at the hetero interface 13 2 was assumed 1x10 cm- • Ill. SIMULATION RESULTS AND DISCUSSION
The
electric
field
distribution
along
the
2DEG channel
between source and drain is shown for the structure with single source field-plate in Fig. 2. 3
double field plate structure is 0.14 A/f.!m at BV=1070 V and for
[148
0
�
0.145 A/f.!m at
BV=690 V.
(a): The effect of the passivation layer underneath the source field plate on breakdown voltage.
0.16 0.14 0.12
�
0.10
3.,'
if
200
400
600 Vos
(V)
BOO
1000
950
�
000
9S11
4-.�----------"_�
W -_-:..;.
l :
-0-
0.02
1000
�
-%
r Single Source Field Plale Structure � L-0 - Double (Source & Drain) Field Plate Structure J
0.04
1100 1(00
120 128 129 130 132 135 140 145 200 300 Thiclrness of Passfi'OliiOll Layer beneath the Dr.!in Field Plate (nm)
1200
(b): The effect of the passivation layer underneath the drain field plate on Fig.
3. Comparison of the los for bothSSFP andDDSFP structures.
breakdown voltage.
First, consider the case where the Si3N4 passivation layer
0.16
thickness is increased. The area under the electric field curve and hence the breakdown voltage has increased. The result of
0.14
this
0.12
analysis
is
shown
in
Fig.
4(a).
The
effect
of
the
passivation layer thickness beneath the source field plate (t) on
0.10
the IDS-VDS characteristics for DDSFP HEMT has been shown
E
in Fig. 4(c). For DDSFP HEMT structure the IDS-V DS characteristics and
�
0.08
_�
0.06
_---
