A Novel Nine-Switch PWM Rectifier-Inverter Topology For Three-Phase UPS Applications Congwei Liu, Bin Wu, Navid Zargari* and David Xu RYERSON UNIVERSITY 350 Victoria Street Toronto, Canada Tel: (416) 979-5000 Email:
[email protected]
*ROCKWELL AUTOMATION CANADA 135 Dundas Street Cambridge, Canada Tel: (519) 740-4781 Email:
[email protected]
Keywords «Power converter», «Uninterruptible power supply», «Pulse width modulation», «Voltage source inverter», «Voltage source rectifier»
Abstract A novel three-phase PWM rectifier-inverter topology for UPS applications is proposed in this paper. The topology uses only nine IGBT devices for AC/AC conversion through a quasi dc link circuit. This converter topology features sinusoidal inputs and outputs, unity input power factor, and more importantly, low manufacturing cost. The operating principle of the converter is elaborated and a novel modulation scheme is presented. The performance of the proposed converter is verified by experiments on a 5kVA prototyping UPS system.
Introduction Uninterruptible power supply (UPS) is widely used to power equipment in critical applications. It can be generally classified into on-line, off-line, and line-interactive UPS [1–5]. A UPS should be able to produce a regulated sinusoidal output voltage for its critical load, to have seamless transition between normal operation and power failure modes, and to draw sinusoidal currents from the utility supply with unity power factor. Fig. 1a shows the simplified block diagram of an online UPS that satisfies the above requirements. It is mainly composed of a PWM rectifier, a PWM inverter, a battery and a static transfer switch. During the normal operation, the load is powered by the inverter through the rectifier and the utility supply. In case of power interruption, the battery provides power to the load. The rectifier normally operates with a unity power factor and low line current distortion while the inverter provides a high-quality regulated voltage source to the critical load. However, this configuration requires two power conversion stages, which increases the cost and reduces the energy efficiency as well. A number of designs have been proposed to reduce the cost of UPS systems, such as a singleconverter UPS with filtering capabilities [6], and a line-interactive UPS that can act as a voltage stabilizer [7]. But none of these UPS systems can control the line current, input power factor, and load voltage simultaneously. This paper proposes a novel nine-switch converter topology for online UPS applications. As shown in Fig. 1b, the proposed UPS system requires only one power conversion stage. Under the normal operation, the power is delivered to the critical load partially through the ac/ac conversion circuit and partially through the dc circuit. When the utility supply fails, the battery in the dc circuit delivers power to the load. Compared with the PWM back-to-back converter that employs 12 active switches, the proposed converter uses only nine switches, which reduces the manufacturing cost and increases the system efficiency. In addition, the proposed UPS system features regulated sinusoidal inputs and
outputs, unity input power factor, and seamless transition between the normal operation and power failure modes.
Fig. 1 Simplified block diagram of the conventional and proposed online UPS systems.
Nine-switch Converter Topology and Switching Scheme Fig. 2 shows the proposed three-phase nine-switch converter topology. This converter has three legs with three switches per leg. The novelty of this converter is that the middle switch in each of the converter legs is shared by the rectifier and inverter, thereby reducing the switch count by 33% in comparison to the PWM back-to-back converter shown in Fig. 1a. The utility power is delivered to the load partially through the middle switches (direct ac/ac conversion) and partially through a quasi dc link circuit. For the convenience of discussion, we can consider that the rectifier of the nine-switch converter is composed of top three and middle three switches whereas the inverter consists of middle three and bottom three switches.
S1
vas
Ls
vbs vcs
Cd
S2
vd ix
iy iz S3
Fig. 2 Proposed nine-switch converter for UPS applications.
vxo
The converter has two modes of operation: 1) constant frequency (CF) mode, where the inverter output frequency is constant and also the same as that of the utility supply, and 2) variable frequency (VF) mode, where both magnitude and frequency of the inverter output voltage are adjustable [8]. The CF mode of operation is particularly suitable for UPS applications whereas the VF mode can be used in adjustable-speed drives. In this paper, only the CF mode of operation is presented for UPS systems.
•
Switching Constraints
In the nine-switch topology, the converter input and output voltages can be independently controlled although the middle switch in each leg is shared by the rectifier and inverter. The proposed converter has only three valid switching states per phase as illustrated in Table I, where v AN and v XN are the voltage at nodes A and X with respect to the negative dc bus N , respectively. When switches S1 and S 2 in leg A of the converter are turned on and switch S 3 is turned off,
v AN = v XN = vd . With S1
turned off and the other two switches turned on, v AN = v XN = 0. If the middle switch S 2 is off and the other two are on, v AN =
vd
and v XN = 0. It can be observed from Table I that the main constraint for
switching scheme design is that the converter leg voltage vXN, cannot be higher than vAN, that is, v XN ≤ v AN . Table I: Switching states and converter leg voltages Switching State
S1
S2
S3
v AN
v XN
1
On
On
Off
Vd
Vd
2
Off
On
On
0
0
3
On
Off
On
Vd
0
To satisfy this constraint, a special carrier based modulation scheme is developed and its operating principle is given in Fig. 3a, where vmr and vmi are the rectifier and inverter modulating waves. The two voltages are arranged such that vmr is always higher than
vmi ,
that is, vmr ≥ vmi . These two
modulating waveforms are compared with a common triangular carrier vc . The PWM gate signals are generated by comparing the modulating waves with the carrier. The corresponding rectifier and inverter leg voltages, v AN and v XN , are also shown in the figure. This arrangement guarantees that
v XN will not be higher than v AN during the sampling period Ts . vmr vmi
v AN
Vd
vXN
vmr
vmi
vc
Vd
mi mi mi mi mi mi
= 1.0 = 0 .8 = 0.6 = 0.4 = 0.2 =0
0
120 °
Ts
Fig. 3
A novel carrier based modulation scheme for the nine-switch converter.
240 °
mr mr mr mr mr mr
360 °
=0 = 0 .2 = 0 .4 = 0 .6 = 0 .8 = 1.0
It should be pointed out that although vmi is always lower than vmr during the sampling period, this does not necessarily imply that the fundamental component of the inverter output voltage v XY should be lower than that of the rectifier input voltage v AB . In fact, the inverter output voltage can be higher than the rectifier input voltage due to the boost nature of the rectifier. Fig. 3b illustrates the proposed modulation scheme, where mr and mi are the rectifier and inverter modulation indices for dc voltage and inverter output voltage adjustments, respectively. It can be clearly seen that the modulation scheme satisfies the switching constraint for the nine-switch converter topology while the two modulation indices can be independently adjusted from zero to unity. Both rectifier and inverter modulating waves contain dc components. These dc components vary with the modulation index, but will not appear in the rectifier or inverter line-to-line voltages due to the threephase balanced system.
•
PWM Waveform and THD
To investigate the performance of the proposed converter topology and modulation scheme, computer simulation programs were developed. Fig. 4a shows the simulated waveform of the rectifier PWM voltage vAB and its harmonic spectrum when the converter operates with a supply voltage of 208V (line-to-line, 60Hz) and dc voltage of 320V. The switching frequency of the converter is 3240Hz, and the rectifier modulation index mr is 0.9. The harmonic spectrum shows that the rectifier input voltage contain little low-order harmonics, and the dominant harmonics are centered around converter switching frequency of 3240Hz. Fig. 4b shows the simulated waveform and spectrum of the inverter output voltage vXY with a fundamental frequency of 60Hz and mi of 0.9. It is interesting to note that the inverter output voltage waveform, its fundamental component, and THD are very close to those of the rectifier. v AB (V )
vXY (V )
Fig. 4 Rectifier input and inverter output voltage waveforms, spectra and THD.
Minimum dc Voltage of Proposed Converter Similar to the conversional PWM voltage source rectifier, the rectifier in the proposed nine-switch converter is a boost converter, where its average dc voltage Vd is inversely proportional to its modulation index mr . To reduce the voltage stress on the switching devices as well as the cost of the converter, the dc voltage should be minimized. The minimum dc voltage Vd min can be achieved when
mr is at its maximum value. Assuming that the rectifier and inverter modulating waves, vmr and vmi ,
are in phase as shown in Fig. 3, both mr and mi can reach unity, at which the minimum dc voltage is Vd min = 2 2 Vas
for
mr max = 1.0
(1)
where Vas is the rms value of the supply phase voltage. This minimum dc voltage, in fact, is the same as that of the conventional PWM rectifier controlled by carrier-based sinusoidal PWM scheme. Like any other UPS systems, the proposed nine-switch UPS requires a supply-side line inductance and a load-side LC filter for the reduction of line current and load voltage harmonic distortions. These filters may cause a small phase displacement between the load voltage v xo and supply voltage vas . Assuming that 1) both line inductance and load-side filter inductance are 0.1 per unit each, and 2) both input and output power factors are unity, the load voltage will lag the supply voltage by approximately 11.5° under the rated operating conditions. This small phase displacement may not have an impact on the operation of the rectifier or inverter, but it may cause load voltage transients when the load is switched from the UPS to the supply or vice versa during the regular maintenance of the UPS system. In applications where the load voltage must be in phase with the supply voltage, the phase displacement can be easily compensated by shifting the inverter modulating wave vmi by an angle θ with respect to the rectifier modulating wave vmr . This is a leading angle that compensates the lagging phase delay produced by the filters such that the load voltage can be in phase with the supply voltage. When the rectifier and inverter modulating waves are not in phase, mr and mi are unable to reach unity due to the switching constraint imposed by the nine-switch converter. Fig. 5 shows such a case where the inverter modulating wave leads the rectifier modulating wave by 15°. The maximum modulation index for the rectifier and inverter, mr max and mi max , in this case is reduced to 0.88, which will cause an increase in dc voltage and a reduction of inverter output voltage. However, the rated load voltage is still achievable due to the increase in the dc voltage. Therefore, it is desirable that the maximum rectifier and inverter modulation indices be kept the same, i.e., mr max = mi max . θ = 15°
mr = 0
vmi
vmr
mr mr mr mr
= 0.18 = 0.35 = 0.53 = 0.71
mr max = 0.88
mi max = 0.88 mi = 0.71
mi = 0.53
mi = 0.35 mi = 0.18
mi = 0
0
120 °
240 °
360 °
Fig. 5 Modulation scheme with a 15° phase displacement between vmr and vmi . The relationship between mr max and θ is depicted in Fig. 6, where the corresponding minimum dc voltage Vd min is also given. The minimum dc voltage can be calculated by Vd min = 1 + sin (θ / 2) per unit (2)
where the base value for the dc voltage is 2 2 Vas , which is the dc voltage of the rectifier operating at mr = 1 . To compensate the phase delay caused by the line- and load-side filters, the phase displacement angle θ is normally in the range of zero to 15°, which translates into an increase in dc voltage by up to 13% as shown in Fig. 6. θ = 0 ~ 15°
Vd min (pu)
Vd min = 1.13pu
mr max
120 °
240 °
θ
Fig. 6 Minimum dc voltage Vd min and maximum modulation index mr max versus phase angle θ . To reduce the dc voltage further, a modified space vector modulation (SVM) scheme is developed for the nine-switch converter. This scheme is based on the principle of the proposed sinusoidal modulation algorithm discussed earlier. The minimum dc voltage of the SVM rectifier is given by Vd min = 6 Vas for mr max = 1.0 (3) Compared with Vd min in (1), the dc voltage is further reduced by 15%. Therefore, the SVM scheme is employed for all the simulations and experiments presented in this paper.
Input Power Factor Control Assuming that the nine-switch converter is ideal and the total resistance between the supply and the rectifier is negligible, the performance of the rectifier in the dq-axis synchronous frame can be described by ⎡vds ⎤ d ⎡ids ⎤ ⎡v dr − ω s L iqs ⎤ (4) ⎢ ⎥ = Ls ⎢ ⎥ + ⎢ ⎥ dt ⎣iqs ⎦ ⎣v qr + ω s L ids ⎦ ⎣vqs ⎦ where vds and vqs are d- and q-axis supply voltages, ids and iqs are d- and q-axis supply currents,
vdr and vqr are d- and q-axis rectifier input voltages, and ω s is the supply angular frequency, respectively. Aligning the d-axis of the supply voltage with the d-axis of the synchronous reference frame, we have ⎧vds = Vs ⎨ ⎩vqs = 0
(5)
where Vs is the magnitude of the supply phase voltage. The active power and reactive power can then be calculated by 3 3 ⎧ ⎪⎪ P = 2 (v ds ids + vqs iqs ) = 2 Vs ids ⎨ ⎪Q = 3 (v i − v i ) = − 3 V i qs ds ds qs s qs 2 2 ⎩⎪
(6)
Equation (6) indicates that with a constant supply voltage Vs , the active power and reactive power of rectifier can be independently controlled by the active and reactive components, ids and iqs , of the supply current. Fig. 7 shows the power factor control scheme for the nine-switch converter, where vd* * is the dc voltage reference and iqs is the q-axis current reference for reactive power control. For unity * power factor operation, iqs should be set to zero.
vd*
* ids
* vds
vdr
* qs
* iqs
* vqs
vqr
i
* * vas , vbs
* vcs
ids
ias , ibs , ics
iqs vds + ωs Ls iqs vqs − ωs Ls ids
vd
θe
vds vqs
vas , vbs , vcs
Fig. 7 Power factor control scheme.
vas ias
vas ias
*
*
vas ias
*
Fig. 8 Simulated waveforms of the rectifier with leading, unity and lagging power factor. The operation of the proposed power factor control scheme is investigated by computer simulations. The rectifier operates with a supply voltage of 208V/60Hz, dc voltage of 320V, line inductance of * of 0.3pu, zero and 2.5mH, and switching frequency of 3240Hz. With the q-axis current reference iqs 0.3pu and the d-axis current ids of 0.7pu, the input power factor of the rectifier is 0.92 leading, unity and 0.92 lagging, respectively, as shown in Fig. 8.
Experimental Verification A 5kVA prototype UPS system was constructed and tested. The system parameters and test conditions are given in Table II. The switching frequency of the converter was 3240Hz. The UPS system was controlled by a DSP based controller. A number of tests were performed and analyzed. Table II: System parameters and testing conditions DC Voltage
208V (Line to Line, 60Hz)
2.5mH (0.11 pu)
320V
Load-side LC Filter DC Capacitance Capacitance Inductance 9400 µ
31 µ
F
Line Inductance
F
Supply Voltage
2.5mH (0.11 pu)
Load Resistance 8.2 Ω
As discussed earlier, the input power factor of the converter can be controlled by adjusting the * . Fig. 9 shows the measured waveforms of the supply phase reference of the reactive current iqs * voltage vas and current ias . With the reactive current iqs of 0.3pu and active current ids of 0.7pu, the * power factor angle is approximately 23° and the resultant power factor is 0.92 (leading). By setting iqs
to zero, the rectifier operates with unity power factor as illustrated in Fig. 9b.
vas
vas ias
* ( iqs = + 0.3pu )
ias
* ( iqs =0)
Fig. 9 Input power factor of the nine-switch converter ( ids = 0.7pu ). Fig. 10 shows the measured waveforms and spectrum of the rectifier input voltage vAB and inverter output voltage vXY with mr = mi = 0.9 . All the low-order harmonics are negligibly small and the dominant harmonics are centered around the switching frequency of 3240Hz. The THD of the rectifier and inverter waveforms is 67.2% and 67.7%, respectively. The measured results are in a good agreement with the simulated results given in Fig. 4. The measured supply and load phase voltage waveforms are shown in Fig. 11a. The laboratory supply voltage is slightly distorted, containing 5th and 7th harmonics with a THD of 4.73%, while the THD of the load voltage is 3.92%. The load voltage THD can be further attenuated by increasing the load-side filter size and reducing the dead time of the IGBT gating signals. The dead time was 8µ s for the laboratory prototyping converter, which accounts for 2.6% of the switching period. It can be observed that there is a small phase shift between the supply and load voltages due to the line inductance Ls and the load-side filter inductance. The phase displacement can be corrected by adjusting the phase angle θ of the modulating waves as discussed earlier.
vAB
VAB , n
vXY
V XY , n
Fig. 10 Measured rectifier and inverter voltage waveforms and their harmonic spectrum. Fig. 11b illustrates the measured load phase voltage and current waveforms (resistive load). With the inverter modulation index mi of 0.9, the load phase voltage is around 100V(rms) and its current is approximately 13.5A (rms). The prototyping UPS system delivers an active power of 4kW to the load.
vas
vxo
v xo
ix
Fig. 11 Measured voltage and current waveforms for the nine-switch converter. The transient response of the UPS system to the supply voltage fluctuations and power interruption is shown in Fig. 12. Due to the independent control of the rectifier and inverter, the load voltage is kept constant when the utility supply experiences a substantial amount of voltage sags or even has a threephase fault.
vas
v xo
Fig. 12 Transient response to the utility voltage sags and power interruption.
Conclusion A novel nine-switch PWM rectifier-inverter topology is proposed in this paper for three-phase online uninterruptible power supplies. The topology uses only nine IGBT devices for AC to AC voltage conversion through a quasi dc link circuit. Compared with the PWM back-to-back converter topology using 12 active switches, the component count of the proposed converter is reduced by 33% while the performance of the converter is on a par with its counterpart. The proposed converter features sinusoidal inputs and outputs, unity input power factor, and low manufacturing cost. It is particularly suitable for UPS applications, where the output voltage of the converter is usually kept in phase with the utility supply voltage. The operating principle of the converter is discussed and a novel carrier based modulation scheme is developed. The performance of the converter topology is verified through simulation and experiments on 5kVA prototyping UPS system.
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