A Parallel Discrete-Event Simulation of Wafer Fabrication Processes Chu-Cheow LIM∗ Sanjay JAIN∗
Yoke-Hean LOW∗ Wentong CAI+
Abstract Simulation modeling is an important tool for planning factory operations, to identify and eliminate possible bottlenecks and to maintain high machine utilization. The objective of our project is to apply parallel simulation techniques for virtual factory modeling in the electronics manufacturing sector. We have implemented a parallel wafer fabrication simulation model based on the Sematech data sets [13]. It uses a conservative synchronous protocol [7] modified from [1], and a static MULTIFIT-COM partitioning scheme [17] to allocate multiple machine sets to logical processes (LP’s). The model, though simplified, does contain certain realistic features found in commercial simulation packages (e.g. TestSim and ManSim [14].) This paper will give an overview description of our implementation, and show its performance numbers on a 4-CPU Sun Enterprise 3000 system. The preliminary timings demonstrate that, even when the simulated events are relatively fine-grained, it is possible to achieve speedup using a conservative synchronous protocol, with an appropriate partitioning scheme and judicious use of lookahead’s. Keywords: Parallel conservative simulation, wafer fabrication, virtual factory.
1. Introduction The background of this work is from an ongoing collaborative project between the Gintic Institute of Manufacturing Technology and the School of Applied Science in Nanyang Technological University, Singapore. The objective of our project is to study how parallel and distributed simulation techniques can ∗
Boon-Ping GAN* Wen Jing HSU+
Stephen J. Turner# Shell Ying HUANG+
be applied in a virtual factory simulation [6]. The simulations will be plant-wide, and include the modeling of manufacturing and business processes, and communications network. Such a simulation environment will allow one to model and analyze the effects of different system configurations and control policies on actual system performance. The initial focus is the electronics industry, because it is a major contributor to the manufacturing sector in Singapore. We therefore begin our study with a parallel discrete event simulation (PDES) of a wafer manufacturing plant (without considering the business process and communications aspect.) This paper is intended to give an overview of our PDES implementation of a wafer fabrication model which uses the Sematech data sets [13]. There are many aspects of any parallel discrete-event simulation that may impact on its performance (e.g. length of simulation period, performance of the runtime system etc.) More specifically, we will discuss three aspects which have rather significant impact on our program’s performance: (a) simulation protocol, (b) parallelism within the model, and (c) partitioning strategy. An important consideration when building a parallel simulation application, is the choice of the parallel simulation protocols (conservative vs. optimistic [5].) We choose to study the conservative protocols for our initial experiments because they are simpler than optimistic protocols, and therefore more straight-forward to debug and analyze when we need to identify any performance bottleneck. We started by using a synchronous protocol [1] in which all the logical processes (LP’s) proceed in super-steps. (During each super-step, an LP will execute all the events in its event-list until its SafeTime, because, as guaranteed by the protocol, future events will arrive at
Gintic Institute of Manufacturing, 71 Nanyang Drive, Singapore 639798. Emails: {cclim,yhlow,bpooi,sjain}@gintic.gov.sg # Visiting Researcher, from Department of Computer Science, University of Exeter, Exeter, EX4 4PT, U.K. Email:
[email protected] + Centre for Advanced Information Systems, School of Applied Science, Nanyang Technological University, Singapore 639798. Emails: {aswtcai,ashsu,assyhuang}@ntu.edu.sg
this LP only after its SafeTime.) We later modified the protocol in two ways by: (a) allowing for a more relaxed computation of the SafeTime of each LP at every super-step, and (b) incorporating a lookahead value to improve the value of the SafeTime. Section 2 briefly summarizes the protocol that we use. We have used the conservative protocol to build a simplified wafer fabrication model based on the Sematech data sets [13], to be executed on a sharedmemory multiprocessor. Each machine set in the model shares a common queue, and executes a set of rules to decide which wafer-lot should be scheduled next (if there is a free machine in the set.) An even more realistic model will contain various types of machine sets, e.g. some machines group multiple wafer lots into batches for processing, while other machines process wafer lots one at a time. For simplicity, our model treats all machines as lot-processing machines. Section 3 describes our model in more details. An important step in building a parallel simulation program, is to identify “processing elements” in the simulation model, which we then implement as LP’s in the simulation protocol. In our wafer fabrication model, it is natural to view a machine set as a “processing element”. One possible approach is to treat each machine set as an LP. But while an LP is a source for parallelism (and hence potentially better speedup), it also incurs extra execution overheads in the protocol. The best approach is to therefore map several machine sets into an LP, so that there are enough LP’s to provide parallelism, but not too many LP’s to keep overheads low. Section 4 describes how the MULTIFIT-COM static partitioning scheme [17] performs the machine-set-to-LP mapping in our simulation program. In Section 5, we provide performance figures which demonstrate that even when the simulated events are relatively fine-grained, it is possible to achieve speedup using a conservative, synchronous protocol, with an appropriate partitioning scheme, and judicious use of lookahead’s. We conclude this paper and outline the future directions of our project in Section 6.
2. Parallel Simulation Protocol There are many variations of the conservative protocol, including both asynchronous [3] and synchronous ones [2, 1]. This section describes a synchronous conservative parallel simulation protocol/algorithm that we currently use [7]. The algorithm was modified from the one first proposed in [1]. It is a conservative algorithm because at each super-step, an LP is allowed to process only the events
that are safe to be simulated and hence definitely will not cause any time-order violation. The gist of the algorithm is that at each super-step, each LP calculates its own SafeTime, so that it can process events whose time-stamp is smaller than or equal to SafeTime, in the current super-step, without violating any causality constraint. The algorithm is given in Figure 1. In this algorithm, communication links between LP’s can be implemented using buffers. To avoid the conflicts between the sender and receiver LP’s in accessing the same buffer, two buffers are therefore used alternately in each super-step for input and output, and pointers to these buffers are swapped in the main simulation loop at the start of each super-step. The first part of the algorithm initializes the links between the LP’s and generates the initial events. Each initial internal event1 is inserted into its corresponding LP’s event-list, while each initial external event goes to the input buffer of the appropriate receiver LP. The second part of the algorithm consists of a loop which is executed repeatedly by every LP, until the simulation terminates. In each loop iteration, LPi computes its SafeTime (2(A) in Figure 1) in two steps. • In the first step, LPi looks at all the LPk’s which have a directed link to LPi. For each LPk, it computes the value tk = LPk’s simulation time + LookAhead[k,i], where LookAhead[k,i] gives a minimum guarantee of the amount of simulation time taken by any event sent by LPk to LPi. The value tk is therefore a time-guarantee by LPk to LPi that the time-stamp of any event sent from LPk to LPi will be at least tk. LPi computes the minimum of all its tk values (let this be t’). • LPi then takes as its SafeTime, the maximum of t’ and the global simulation time (GST). GST is defined as the minimum of the timestamps of messages in the system that have not yet been processed. It is initialized as 0 at the start of simulation. At the end of a super-step (part (C) of the algorithm in Figure 1), each LPi computes the minimum of all the time-stamps of the events in its event-list, and those events that it generated in the current super-step. This minimum value is stored in the MinTime variable in the algorithm outline. After all the LP’s have computed their own MinTime, GST is updated using a global minreduction of all the MinTime’s. This GST value is
1
An internal event is one sent by an LP to itself.
// PART 1: Global initialization Initialize the links between LP’s and each LP’s state. GST = 0 /* Assume initial events arrive at time 0; GST = global simulation time */ for all InternalEvent ie caused by InitialState do OrderInsert(ie@OccurrenceTime(ie), lp[i].event_q); end for for all ExternalEvent ee caused by InitialState do OrderInsert(ee@OccurrenceTime(ee), NewBuff[i,j]) where ee is for LP j from LP i end for // PART 2: Executed by an LP, say LP i. while (GST
