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5: Testboard for 2nd edition voltage regulator, package power SO-20 slug-up. 20 GND .... voltage of 5V plus a sinus wave AC voltage with amplitude of 500 mV (354 mV rms). The frequency of the ... into terminal Vout_L takes place. It aims to ...
CERN European Organisation for Particle Physics EP-Division, Microelectronics 1211 Geneva Switzerland

Technical note for LHC users September 2000

A RADIATION HARDENED VOLTAGE REGULATOR FOR LHC AND SPACE APPLICATIONS N. Boetti, F. Faccio, P. Jarron

1.

INTRODUCTION .................................................................................................................................... 2

2.

THE STM RADIATION HARD TECHNOLOGY .................................................................................... 2

3.

DEVICE OUTLINE ................................................................................................................................. 4

4.

ELECTRICAL CHARACTERISATION OF THE REGULATOR POSITIVE VERSION........................ 5

4.1 MEASUREMENTS ON WAFER................................................................................................................. 6 4.2 MEASUREMENTS ON PACKAGE CHIPS ................................................................................................... 7 4.2.1 Load and line regulation ......................................................................................................... 8 4.2.2 Over-current limit ................................................................................................................... 9 4.2.3 Inhibit.................................................................................................................................... 10 4.2.4 Supply voltage ripple rejection ............................................................................................. 10 4.2.5 Noise...................................................................................................................................... 11 4.2.6 Remote sensing...................................................................................................................... 11 4.2.7 Two regulator in parallel mode ............................................................................................ 12 5.

THE RADIATION TEST ....................................................................................................................... 13

5.1 5.2 5.3 5.4 5.5 5.6 6.

X RAY ................................................................................................................................................ 14 60 CO IRRADIATION............................................................................................................................. 15 NEUTRON IRRADIATION ..................................................................................................................... 15 PROTON IRRADIATION ........................................................................................................................ 17 PION IRRADIATION ............................................................................................................................. 20 LATCH UP TEST .................................................................................................................................. 20

CONCLUSION ...................................................................................................................................... 21

1

1. Introduction LHC experiments at CERN, like for space applications, need Integrated Circuits tolerant to radiation, resistant to displacement damage, total dose effect (TID) and Single Events Effect (SEE). One key and generic component needed in most of the subdetector, such as trackers, calorimeters, muons system and in the in-cavern electronics, is a voltage regulator able to provide a local powering of the electronics boards and detectors modules in order to ensure clean and accurate low supply voltages. Because there is no commercially available radiation tolerant voltage regulator with low drop out voltage characteristics, a prototype voltage regulator, LHC4913 has been developed in collaboration with ST Microelectronics Catania in the framework of the RD 49 project. This product has been developed to fulfil both the LHC specifications and the space applications. The most important requirements that the voltage regulator must satisfied to be used in the harsh and confined environment of LHC experiments are the following: 1) High tolerance to radiation: in total dose up to 500 Krad and up to a neutron fluence of 2*1013 n/cm2 for 10 year of operation in the outer detector regions. Tracker regions with much higher level of radiation are foreseen to be remotely powered from outer regions. 2) Low power consumption. Detectors and readout electronics in fact, will be packed in a confined space where cooling is extremely difficult. 3) Possibility to monitor and remotely control static and dynamic overload conditions such as latch up of powered components caused by single event effects, considered that the regulator will be embedded in detector system where the access is extremely limited.

2. The STM radiation hard technology The technology choice for the developing of the voltage regulator has been driven by the radiation hardness specifications. A preliminary study carried out on standard power technology showed its insufficient level of radiation hardness, so it was decided to select a bipolar technology tolerant to radiation and suitable for the developing of the voltage regulator. The technology chosen, not conventional for a voltage regulator, is the RHBip1, based on the monolithic integration of complementary vertical high-speed NPN and PNP transistors as sketched in Fig. 1. The radiation hardness against total dose effect TID is related to Company know-how and is not made available.

2

N-epi

N well N+ buried P+ buried

P+ buried

N+ buried

Fig. 1: Complementary bipolar transistors of RHBip1

The RHBip1 [6] technology has a maximum operating voltage of 12 volts, a minimum emitter size of 5 microns, the current gain Hfe in the range of 100 before irradiation for both transistors, and a transition frequency of 5 GHz and 9 GHz for the vertical PNP and NPN respectively. The technology is a double metal level process, with double poly layer and additional high poly resistance and metal-poly capacitors. All elementary components of the RHBip1 technology (i.e. resistors, capacitors, and bipolar transistors) have been tested at least up to a total dose of 500 Krad, and to a neutron fluence up to 2*10 13 neutrons/cm2 . The low dose-rate enhancement effect has been also investigated on power devices, which are intrinsically more sensitive to this effect. Bipolar devices were irradiated with emitter, base and collector connected to ground. It has been verified that these connections corresponds to the worse case conditions. X-ray irradiations were performed at two dose rates, 100 rad/s and 10 rad/s. Gamma irradiation with a 60 Co source was performed with a dose rate of 4 rad/s. The low dose rate test has been performed at 0.02 rad/s with the 60Co facility of ESA-ESTEC. Results of the radiation test have shown a good robustness of the technology against the radiation damage of total dose, low dose rate and neutrons as requested for the design of the radiation tolerant voltage regulator. A summary of the radiation test on NPN and PNP transistors is shown in Fig. 2. Resistors have been also tested to total dose, and results show no significant degradation (after 500 krad < 3%).

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Fig. 2: Current gain degradation of NPN and PNP transistors. Results are shown for total doses up to 500 Krad and neutron fluences up to 1013 neutron/cm2.

3. Device outline The basic blocks of the voltage regulator are a reference voltage element, an error amplifier, and a series-pass element (ballast) [3]. The general architecture is basically similar to that of a conventional linear regulator, but with specific precautions. Smart features have been included in the design to enable the remote monitoring and control of voltage regulators embedded in detector systems. Features are a remote sensing control, a digital signal output to monitor an over-current condition (OCM), and an inhibit input signal to switch off the regulator for de-latching electronic circuits. To allow the precise tuning of the current protection limit to the expected maximum current of the application the user can adjust the current limit from 0.5 A to 4.5 A. Standard protection features such as an over-temperature protection circuit are implemented to turn off the device and avoid damage in case of excessive junction temperature. An another key feature is the sense wire that allows the regulator to function with an output load located far from it. The circuit design of the voltage regulator has been especially conceived to enable operation with the minimum possible drop out voltage in order to minimise the local

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power dissipation. The maximum drop out voltage specification is 0.5 and 1.5 Volt respectively for 1A and 3A load current in the whole range of temperature. To cover a large fraction of the sub detector needs, several fixed output voltage values have been foreseen (2.5, 3, 3.3, 5, 8 V) and also an adjustable version (output voltage from 1.25 V to 9 V). Following the request of several LHC users it has been decided to develop also a negative version of the regulator, the LHC7913. Specification of this negative version is the mirrored specification of the positive version, except for the over-current signal and the inhibit control for which the levels have been kept positive in order to allow a common control and monitoring with the positive versions.

4. Electrical characterisation of the regulator positive version The characterization has been performed both on wafer and on package chips. The goal of the measurements is to check the regulator conformity to the specification [13] and to test the features of the prototypes. Essentially the measurements that have been done are: • • • • • • • •

Load and Line Regulation Dropout Voltage Over-current Limit Noise Supply Voltage Ripple Rejection Inhibit Over-Current Monitor (OMC) Remote Sensing

The first regulator prototypes of the positive version have been delivered by STM in July 1999. Several tests have been performed on them and some problems have been revealed (dropout voltage too high, over current monitor oscillating, inhibit not working for 8 V version). In order to correct these bugs a second prototype has been designed and manufactured in January 2000. In addition some performance of the regulator have been improved: the regulator has been designed with a lower output noise and the radiation hardness of the bandgap reference voltage has been improved. Two new features have been implemented: an input over-voltage protection and a tunable over current threshold. In the following measurements results for 1st and 2nd chip edition will be presented. Concerning the negative version of the regulator the first prototype wafer delivery is scheduled end of 2000.

5

4.1 Measurements on wafer Each wafer contains all versions of the regulator. In Fig. 3 a magnification of an area of a second prototypes wafer is shown. In the scribe lines region are placed test structures for

3.3 V 5.0 V ADJ 3.3 V 8.0 V 2.5V

technology and hardness characterisation. Fig. 3: Magnification of a region of a 2nd prototype wafer. Each die has the dimensions of 2130 um x 3560 um.

To test the regulator directly on wafer an automatic probe station PA200-II from Karl Suss is used. A LabVIEW program [5] controls the station and allows measurements of load and line regulation. With this automatic system a high number of chips could be tested and so statistical measurements could be done. Fig. 4 shows a typical result of a statistical measurement for the adjustable version of a 1st edition wafer. H istogram W afer 1 / AD J / 371 chip s / Iload=100mA 90 80

ADJ version: 371 chips tested

70 amo u n t

60 50

Mean value: 5.228V (Setting 5.5V)

40 30 20 10

Standard deviation: σ=31m M o re

5.3

5.284

5.267

5.25

5.234

5.217

5.2

5.184

5.167

5.151

Le ss

0

Vlo ad (V)

Fig. 4: Histogram of measurements on first prototype wafer, chip version ADJ.

6

On this wafer all chip of 2.5 V, 8.0 V and ADJ version have been tested, for a total of 1100 chips. About 90% to 95% of the chips are working, most of the broken chips are located on the border. In Table 1 statistical parameter of this measurement are listed.

chip

load [mA] 0 100 0 100 0 100

2.5 2.5 8.0 8.0 ADJ ADJ

standard mean value deviation [V] [mV] 2.433 22.9 2.422 24.6 7.724 52.0 7.711 63.0 5.240 30.9 5.228 31.3

voltage spread [%] 0.94 1.02 0.67 0.82 0.59 0.60

Table 1: Statistical parameter for the output voltage of a first prototype wafer.

4.2 Measurements on package chips For the measurements on package chips small handmade circuit boards are used, suitable to different packages used for test samples. In Fig. 5 the testboard designed for 2nd edition prototypes in package SO-20 slug-up is reported.[13]

GND

R3 C2

1 uF

Vout jumper

GND 1

19 N.C.

N.C. 2

18 N.C.

N.C. 3

17 Vin

Vin 4

16 Vout1

Vout2 5

15 Vout1

Vout2 6

Vin

R1

J2

Vout_sense

14 Vout_sense

C1

R4 TP

20 GND

Inhibit

OCM 8

T

TP

R2 T

1 KOhm

12 INH jumper

Sh_ctrl 7

1 uF

13 ADJ

T

TP

N.C. 9

J1

11 GND

GND 10

Cin= 0.1 uF

Cout= 22 uF

Fig. 5: Testboard for 2nd edition voltage regulator, package power SO-20 slug-up. 7

This board has been designed to be suitable for all regulator versions, fixed and adjustable. To measure the adjustable version in fact, it’s enough to insert the resistors R3 and R4. The output voltage will be defined by the following formula:

Vout= Vref (1+ R4/R3)

with

Vref= 1.25V

Others components of this circuit board are: • R1: optional resistor to tune the over current limit • R2: to bias the over current monitor • Cin and Cout input and output capacitors • C1: to avoid instability problem in the adjustable version • C2: to test remote sense operation • J1: jumper that must be removed to enable the inhibit test • J2: jumper that must be removed to enable the remote sensing test 4.2.1

Load and line regulation

The main requirement of a voltage regulator is the capability to give a fixed voltage for different load and line conditions. To check this fundamental characteristic load and line regulation should be done. The load regulation is the plot of output voltage variation versus load current for different input voltage while the line regulation shows the output voltage variation versus input voltage for different load current. In Fig. 6 a typical example of these measurements result is reported for a first prototype chip (version 2.5 V).

Load R egulation / 2.5 V / 2.5-8 / before irradiation

L in e R eg u lation / 2.5 V / 2.5-8 / b efo re irradiatio n 1

0 0

0.5

1

1.5

2

2.5

3

3.5

4

2

3

4

5

6

7

0

-0.5

-0.2

V in= 3V V in= 4V V in= 5V

-1.5

Iloa d=0A De lta (V )

De lta (V )

-0.4 -1

-0.6

Iloa d=0.1A Iloa d=0.5A

-0.8

Iloa d=1A -1

-2 -1.2 -2.5

-1.4 Iloa d (A)

V in (V )

Fig. 6: Load (on the left) and line (on the right) regulation for a first edition chip, version 2.5 V.

8

In the load regulation it can be seen that the regulation works correctly up to a certain Iout: Vi (V) 3 4 5

Iout max (A) 0.7 2.2 3.2

Vd (V) 0.5 1.5 2.5

The specifications of a voltage drop (Vd) of 0.5 V per 1 A load were not reached in this prototype, this has been corrected in the second prototype. Note that above Iout=3.2 A the over-current protection stops the regulation and shut down the device. In the line regulation it can be easily seen that the regulation begins only from certain input voltages (for example for Iload = 1A an input voltage of 3.2 V is requested). 4.2.2

Over-current limit

With the OCM pin it is possible to detect when the device is in Over Current that is when a current higher than output current limit flow through the output. As long there is no over current, the signal stays equal to the input voltage otherwise on the OCM pin is present a voltage level of 0.38 V. [8] Due to a design error, the OCM signal wasn’t stable in the 1st edition (oscillation between high and low). This problem has been solved in the 2nd edition. One important features of this regulator is the possibility to adjust the maximum current limit within 30% of its typical value by putting a resistor between the input Vin and the short circuit control pins. This feature has been proofed with a 2nd edition chip (version 2.5 V). The result is reported in Fig. 7. Short circuit control operation 4 3.5

Ishort (A)

3 2.5 Limit values

2

Limit value without R

1.5 1 0.5 0 0

20

40

60

80

100

R (KOhm)

Fig. 7: Tuning of the maximum output current in a 2nd edition prototype regulator (version 2.5 V). 9

4.2.3

Inhibit

Switching off/on the regulator it’s possible by the inhibit pin. This feature can be used concurrently with the Over Current Monitor to reset the regulator and the supply board in case of latch-up of the chip. In the 1st edition of the voltage regulator the inhibit worked fine apart for the 8.0 V version. In Fig. 8 the result of a typical inhibit test is reported. Signal 1 is the output voltage (Vout) of the chip, while signal 2 is the inhibit input (Vinh). After Vinh=1.7 V, Vload switches from 2.47 V to 0.00 V in about 70 s which is 3 times the time constant of the load (R=24 Ohm, Co = 1F, t= R* Co= 24 us). Switching off Vinh, Vout switches back immediately with a small over-shoot of 10%.

Fig. 8: Inhibit test for a first edition voltage regulator, version 2.5V. Signal 1 is the output voltage of the chip. Signal 2 is the inhibit input.

4.2.4

Supply voltage ripple rejection

The supply voltage ripple rejection (SVR) is a parameter that gives the ratio between input and output ripple. It gives a measurement of the capability of the voltage regulator to regulate a non-stable input voltage. A SVR = 60 dB means that the output ripple is 1000 times smaller than the input ripple (i.e. input 500 mV; output 167 V). The measurement of the SVR (see Fig.9) was done putting in input of the regulator a DC voltage of 5V plus a sinus wave AC voltage with amplitude of 500 mV (354 mV rms). The frequency of the AC input was varied and for each step the output voltage rms was measured. Note that the input capacitor of the regulator was removed because it already reduces the input ripple (low-pass filter).

10

Ripple Rejection / 2.5V / 5mA load / Cout=3.3uF 70 60 50

dB

40 30 20 10 0 0.01

0.1

1

10

100

1000

kHz

Fig. 9: Supply voltage rejection of a first edition chip.

4.2.5

Noise

For this measurement the test-board was put in a metal box to reduce the external noise. Especially high frequency noise is not easy to suppress in a laboratory: every computer, air conditioning, light etc. can disturb the measurement. Additionally, a tantalum capacitor was added to the input of the board to reduce high frequency noise of the voltage source. The noise was measured using a RMS-voltmeter, in the frequency range of 10 Hz to 10 MHz. The measured noise of the 2.5 V version is about 300 V. 4.2.6

Remote sensing

Some users will use the regulator connected by long cables to a load placed far away from it. In this case there will be an important voltage drop over the line and the voltage that will arrive on the load terminals will be much lower than the nominal one. The STM regulator provides a solution for this problem. Connecting the regulator as shown in Fig. 10, it measures the voltage in point 2 and compares it with the output voltage in point 1. If V2 < V1 the regulator increases the output until the two voltages will be coincident. Note that the voltage in point 2 is the same of the sense pin because no current flows in this cable and so no voltage drop is present. The functionality has been proven with a small experiment in which instead of long cables, resistances of 5 Ohm were used. Note that if users want to use the regulator in local mode, it’s enough to connect together the sense and output pins.

11

Rwire

1

2

Vout

Vin

Remote Sensing

Vsource

Rload

Voltage Regulator GND

Rwire

Fig. 10: Remote sensing measurement configuration.

4.2.7

Two regulator in parallel mode

The maximum output current of the voltage regulator will be 4.5 A. If a higher current is needed, it would be necessary to put two or more regulator in parallel. The problem is that if one regulator has a slight different output voltage than the other, an unbalanced current can be generated. According to STM there should be no risk for the regulator. Let’s consider the case of two devices whose output voltages with no load, Vout_H and Vout_L, differ from each other by an amount dV and whose output terminals are linked to a common point through a resistor R (see Fig. 11). Vin

Vout

Voltage Regulator Gnd

Vsource

Rload Vin

Vout

Voltage Regulator Gnd

Fig. 11: Parallel mode measurement configuration.

12

Three limit cases have to be distinguished: 1. The current required is lower than dV/R. In this case this current is provided only by the regulator having the highest output voltage, Vout_H. In addition a current injection into terminal Vout_L takes place. It aims to compensate the different output levels. 2. The current equals dV/R. Even in this case this is provided by the regulator getting Vout_H, but now the parasitic current injection is not present. 3. The current exceeds dV/R. In this case both regulators feed the load. Their currents are different for an amount dV/R. To proof the possibility to work in parallel mode, two regulators were put in parallel and the usual load and line regulation was measured (Fig. 12). The over current limit was expected at 6.4 A (double of a single chip limit that is 3.2 A in this edition) but it was limited by the voltage source of the test bench at 5 A. Line Regulation / two in parallel / 2.5 V

lo ad re g ulatio n / tw o in p aralle l / 2.5 V 0

1

2

3

4

2.0 0.0

5

0

3.0

3.5

4.0

4.5

5.0

5.5

6.0

-0.5

-0.5

De lta (V )

2.5

V in = 3V

-1

V in = 3.5V V in = 4V

-1.5

V in = 4.5V

-2

Iload= 0 A

De -1.0 lta (V)

Iload= 2 A Iload= 4 A

-1.5

Iload= 4.8 A

-2.0

-2.5

-2.5 Ilo ad (A)

Vin (V)

Fig. 12: Load and line regulation of two chips (1st edition) in parallel.

5. The radiation test The radiation tolerance level that the voltage regulator must exhibit was decided in common by ST and CERN resulting on one hand from the need of LHC experiments and on the other hand from the measurements of the radiation hardness of STM bipolar technology. The regulator must sustain a neutron fluence of 2*1013 n/cm2 and 500 Krad cumulated. Latch-up test result with heavy ions must exhibit a threshold LET above 25 MeV cm2 mg-1. [7] Several radiation tests have been performed to evaluate the radiation resistance of the voltage regulator to TID and displacement damage (see Table 2). Single effect Latch-up tests have been performed on first prototypes at the Cyclotron CYCLONE in Louvain-la-Neuve in October 1999 with protons up to a fluence of 3*1011 p/cm2 and heavy ions up to a fluence of 106 ion/cm2.

13

Irradiation Dose/Fluence X-Rays

3 .9 M ra d

Co60

1 .3 M ra d

Proton

1 *1 0

13

5 *1 0

13

3 *1 0

14

1 .8 *1 0 Neutron

1 *1 0

8 .5 *1 0

p/c m

2

p/c m

2

p/c m

2

14

13

Date

p/c m

n/c m

13

2

n/c m

(0 .2  1 .2 )*1 0 n/c m 2 .0 *1 0 1 4 p/c m 2 14

Pion

2 .5 V

firs t

Aug-9 9

E S A-E S TE C

AD J

firs t

C E R N P S E a s t Ha ll 2 .5 V, AD J

firs t

Aug-9 9 C E R N P S E a s t Ha ll 8 .0 V, AD J

firs t

No v -9 9 C E R N P S E a s t Ha ll

2 .5 V

firs t

Apr-0 0 C E R N P S E a s t Ha ll

8 V,w a fe r

s e c o nd

C E R N P S E a s t Ha ll 2 .5 V, AD J

No v -9 9 C E R N P S E a s t Ha ll 2 .5 V, w a fe r 2

Prototype

C E R N-M IC

J ul-9 9 2

Chips

J ul-9 9 J ul-9 9

2

Place

F e b-0 0 J ul-0 0

C E R I O rle a ns P S I W illige n

w a fe r 5V

firs t firs t s e c o nd s e c o nd

Table 2: Irradiation tests performed on voltage regulator prototypes.

5.1 X ray The X-ray irradiation has been made in the MIC Group facility at CERN. This facility consists of an X-ray machine from Seifert Gmbh installed above the automatic prober. This system can perform irradiation of un-lidded packaged samples and wafers. A Labview programs allows the control of the X-ray machine, the temperature of wafer chuck (-15ºC to 125ºC), the positioning of the wafer probe and the operation of the test and measurements instruments. The irradiation was performed on a first prototype package sample with Vout = 2.5 V. The measurements performed after a dose of 3.9 Mrad doesn’t show any degradation. In Fig. 13 a line regulation after the X-ray irradiation is reported.

Delta V (V)

Line Regulation; ST25-1; 3.9 Mrad of X-ray 1 0.5 0 -0.5 -1 -1.5 -2 -2.5 -3

Iload=0.00A Iload=0.50A

2

4

6

8

10

Vin (V) Fig.13: Line regulation after a dose of 3.9 Mrad of X-ray. 14

5.2

60

CO irradiation

A first prototype voltage regulator (version adjustable) has been irradiated using ESTEC’s 60CO source. During the irradiation the chip has been biased at 2 V above its nominal output voltage and no load current has been drawn from it during this time. First, the chip has been irradiated up to 278.8 krad(SiO2) with a dose rate of 296 rad(SiO2)/min. Then it has been measured but no signs of degradation have been revealed. Next, the chip has been irradiated over a weekend up to approximately 1.3 Mrad. During this time, the current drawn by the chip has been monitored, so that if a chip stopped working over the weekend, fluctuations in the current drawn would indicate the time of its demise. No such current fluctuations occurred, and at the end of the irradiation, the chip still functioned. It has been measured immediately after irradiation and the line regulation graphs were almost exactly the same before radiation.

5.3 Neutron irradiation An entire wafer of first prototype voltage regulators has been exposed to 5*1013 n/cm2 and no degradation of the regulator performance has been observed. These good results have been also confirmed by the measurements of individual NPN and PNP transistors, which are placed on the same wafer as test structures in the scribe line. The current gain decrease is less than 20% after 5*1013 n/cm2. Another test with neutron has been performed on a second prototype wafer. Regulator chips and test structures of the wafer have been probed and tested, ant then irradiated to a neutron fluence varying from 1.20*1014 n/cm2 (center of the wafer) to 1.76*1013 n/cm2 (wafer periphery). From the fluence values registered by dosimeters put in different position on the wafer box, a mapping of the wafer has been done. It has been divided in 10 bands and for each band the fluence received has been calculating in order to correlate chips radiation damage with fluence. Because of the big number of irradiated chips, statistical measurements could be done. For all the three chip versions measured (output voltage 2.5, 3.3, 8 V) we observed a slight increase in the mean value of the output voltage distribution with fluence, an increase of the order of 0.7% for a fluence of 1.2*1014 n/cm2. In Fig. 14 statistical measurements results for the regulator with Vout = 3.3 V are reported. The measurements of load and line regulation for all the chips irradiated have shown no particular degradation in the regulator performance, also in the case of highest fluence. The Fig. 15 shows an example of load and line regulation for a chip (version 3.3 V) positioned in the center of the wafer and so in the worst case of damage. The voltage drop visible in the load regulation is not due to radiation damage but to the resistance between the chip on the wafer and the voltmeter (built-in in the HP load) that is about 100 mOhm and so not negligible.

15

Vo u t d istrib u tio n afte r irrad iation with d iffe r e n t flu e n ce s 70

60

% of total

50

40

prerad 1.76 E13 n/cm2 1.93 E13 n/cm2

30

2.89 E13 n/cm2 7.34 E13 n/cm2 20

10

0 3.2

3.21

3.22

3.23

3.24

3.25

3.26

3.27

3.28

Vout [V]

Fig.14: Chip (Vout = 3.3 V) output voltage distribution before and after irradiation with neutron with different fluences values.

lo ad regulatio n / 3.3 V / 1.2 10 14 n eu tro n/cm 2

line reg ulatio n / 3.3V / 1.2 10 14 n eu tron /cm 2 0 2 .5

3 .5

4 .5

5 .5

0 .2

0 .4

0 .6

0 .8

1

0

0 -0 .1

-0 .2

-0 .2

Delta (V)

-0 .4

Ilo ad =0.2 A

-0 .5

Ilo ad =0 .4A

-0 .6

Ilo ad =0 .6A

Delta (V)

Ilo ad = 0 A

-0 .3

-0 .4 Vin = 3 V

-0 .6

Vin = 3.3 V Vin = 4.3 V

-0 .8

Vin = 5.3 V

-0 .7 -1

-0 .8 -0 .9

-1 .2 V in(V )

Ilo ad (A)

Fig.15: Load and line regulation of a wafer chip after irradiation with neutron up to 1.20*1014 n/cm2.

In order to study more in detail the radiation damage caused by neutron, we have measured elementary devices, i.e. NPN and PNP bipolar transistors and resistors, contained in wafer test structures. The extraordinary homogeneity of the results before irradiation for a same kind of transistors, allows to compare the damage of different transistors positioned in different sector of the wafer and consequently irradiated with different fluences. In Fig.16 the measurement results for NPN and PNP transistors are reported. It can be seen that effect of displacement damage caused by neutron is a decreasing of current gain with fluence, especially at low injection level. Concerning the measurements of the resistors any degradation could be observed. 16

120

120

100

100

p rerad 1.1 9 E 13 n /c m 2

60

beta

b eta

pre rad

80

80

1.19 E 13 n/cm2 4.63 E 13 n/cm2

60

8.41 E 13 n/cm2

4.6 3 E 13 n /c m 2 8.4 1 E 13 n /c m 2 40

1.20 E 14 n/cm2 40

1.2 0 E 14 n /c m 2

20

20

0 0

Lo g (Ic) [A]

L og (Ic) [A]

90 80 70 60

beta

pre rad 50

2.60 E 13 n/cm2 3.48 E 13 n/cm2

40

6.42 E 13 n/cm2 1.20 E 14 n/cm2

30

Fig.16: Current gain degradation for NPN transistors of small (top left) and big (top right) emitter surface area and for PNP transistors (bottom) after irradiation with neutron up to different fluence values.

20 10 0

Lo g (Ic) [A]

5.4 Proton irradiation Several proton irradiations have been made at CERN PS East Hall with a proton beam of 23 GeV. By using a shuttle that brings the devices directly in the beam [12] [13], it’s possible to irradiate either package chips, either wafers than can be fixed by their plastic box to a support. The test performed on first prototypes package chips showed that the regulator can stand a proton irradiation up to a fluence of 1.7*1013 p/cm2. Another proton irradiation test has been performed on second prototype chips. In this case a portion of wafer (of the dimensions of proton beam 4x4cm2) and a package chip have been irradiated. Load and line regulations of wafer chips before and after irradiation were measured by probing them on wafer. From this measurements no particular degradation of the regulator performance has been observed, as it can be seen in the example reported in Fig. 16.

17

load regula tion / 2.5 V 0

0.2

0.4

0.6

line reg ulation / 2.5 V 0.8

2.5

0

0

-0.1

-0.1

3.5

4

4.5

-0.2

-0.2 -0.3

Vin = 2.5 V Vin = 3 V

-0.4

Vin = 3.5 V Vin = 4 V

-0.3

Delta (V)

D elta (V )

3

Iload=0 A

-0.4

Iload=0.3 A

-0.5

Iload=0.6 A

-0.5

-0.6

-0.6

-0.7

Iload=0.9 A

-0.8

-0.7

-0.9

Iload (A )

Vin(V)

Fig.17: Load and line regulation of a wafer chip after irradiation with proton up to 1.84 1014 p/cm2.

Because of the big number of irradiated chips (~190), statistical measurements have been done. In Fig. 17 the result of a statistical measurement on 61 wafer chips of 8 V version is reported. From this kind of measurements it can be seen that there’s a slight increase of the output voltage with the fluence, an increase of ~3% of the average output voltage after a fluence of 1.84*1014 p/cm2. Vout distribution pre and post irradiation 45 40 35

% of total

30 25 20

prerad

15

postrad

10 5 0 7.57 7.6 7.63 7.66 7.69 7.72 7.75 7.78 7.81 7.84 7.87 7.9

Vout [V]

Fig.19: Statistical measurements of the chips (version 8V) output voltage before and after irradiation with proton up to 1.84 1014 p/cm2.

Also singles devices, NPN and PNP transistors, placed on the same wafer as test structures in the scribe line were measured pre and post irradiation. The Fig.18 shows the current gain degradation for a couple of NPN transistor of small (4x4 m2) and big (50x50 m2) emitter surface area.

18

100 120

90 80

100

70

be ta

60

60

p rera d

50

pre rad 40

1.84 E 14 p/cm2

1.84 E 14 p /c m 2 30

40

20 20

10 0

0

Log (Ic) [A]

Log (Ic) [A]

Fig.19: Current gain degradation for NPN transistors of small (left) and big (right) emitter surface area after irradiation with proton up to 1.84 1014 p/cm2.

The package chip has been maintained biased during all the irradiation and its voltage output has been monitored by a custom Labview program in order to follow the radiation damage effects during the beam exposure. Fig. 19 shows the measurements result. During the irradiation time the voltage output progressively increases and reaches a value 0.5% higher than the initial one (Vout = 7.993 V). After the irradiation, with the bias conditions unchanged, Vout starts to decrease and, in ten hours, reaches a value 0.4% less than the initial one of the annealing time (Vout = 8.032 V). This online measurement has confirmed again the high tolerance of the regulator to proton irradiation, showing an almost insignificant change in the output voltage. 8.05

8.03

8.01

Vout (V)

be ta

80

7.99

7.97

annealing

irradiation 7.95 0

5000

10000 15000

20000 25000

30000 35000

40000

45000 50000

55000 60000

TIME (s)

Fig.20: Online monitoring of the voltage output of a package chip during proton irradiation up to 1.76 1014 p/cm2.

19

5.5 Pion irradiation A second prototype package chip (Vout = 5V) has been irradiated with a pion beam with a momentum of 300 MeV/c. Online monitoring of the chip voltage output has been performed during beam expositions. Fig.19 shows the measurements result. Before irradiation the regulator had in average Vout = 4.97 V with fluctuations of 0.02 V peak to peak. After a fluence of L 4*1013 pion/cm2 the fluctuations became bigger, around 0.06 V peak to peak. Apart from the fluctuations, it can be seen that Vout increased with the fluence, although the increasing was really small, of the order of 0.5%. After the irradiation, with the bias conditions unchanged, Vout didn’t decrease as in the case of proton irradiation, but stayed constant. The only change was that after an annealing time of L38 hours the oscillations became again small as in the prerad condition. This measurement has shown a good tolerance of the regulator to pion irradiation. 5.08 5.06 5.04

V o u t (V )

5.02 5 4.98 4.96 4.94 4.92

irradiation

annealing

4.9 4.88 0

50000

100000

150000

200000

250000

300000

350000

T im e (s)

Fig.21: Online monitoring of the voltage output of a package chip during pion irradiation up to 2.0 1014 p/cm2.

5.6 Latch up test Two first prototypes voltage regulators (Vout= 2.5 V and Vout=8 V) were irradiated with a monoenergetic proton beam (60MeV). The test was run at a proton flux of about 108p/(cm2s), up to a fluence of 3·1011 p/cm2. No latchup was observed. This doesn’t exclude the presence of latchup, but sets an upper limit to the SEL cross-section of the measured device. This limit is 1/fluence = 3.3·10-12 cm2 Only the 8 V Voltage Regulator was irradiated with heavy ions. The conditions were the same as for the proton irradiation, and the following ion species were used.

20

Ion

Tilt o

Argon

0

Argon

60

Krypton

0

Krypton

60

o

o o

Fluence

LETeff

SEL

limit cross-section

2

0

10 cm

2

0

10 cm

2

0

10 cm

2

0

10 cm

6

-2

14.1 MeVcm /mg

6

-2

28.2 MeVcm /mg

6

-2

34 MeVcm /mg

6

-2

68 MeVcm /mg

10 cm 10 cm 10 cm 10 cm

-6

2

-6

2

-6

2

-6

2

As shown, no SEL was measured during the test. After the irradiation, the chip was still functional as before, showing that no undetected destructive event (as SEB) happened during any irradiation. The LETeff is referred at the surface of the chip. To have a more precise value for the LET one should know precisely the thickness of all the layers (passivation, metallization, oxides) on top of the active silicon of the device.

6. Conclusion The first prototype voltage regulator, tested in summer 1999, showed some technology and design bugs although the functionality was sufficient to assess the level of radiation hardness. In order to correct these bugs a second prototype has been designed and manufactured in January 2000. In addition some performance of the regulator have been improved: the regulator has been designed with a lower output noise and the radiation hardness of the bandgap reference voltage has been improved. Two new features have been implemented: an input over-voltage protection and a tunable short circuit current. All the electrical measurements performed on this prototype have indicated that it is working and is in conformity with the specification, except for the following parameters: • The maximum short circuit current: 3.1 A measured, 4.5 A in the specification. • Input over-voltage protection: designed 14 V, measured 18 V, which is too close to the junction breakdown voltage of 20 V of the technology. • The regulation is unstable when its dropout voltage is minimum (0.45V/A), for 100 mV above the regulation knee, afterwards it is O.K. • The adjustable version runs unstable whatever the operating mode is, but the osculations are shut off by a capacitor of at least 40 pF put between Adj and Sense pins. • All the output voltages are 2% lower than their typical target value. All these imperfections are well understood by ST and will be corrected in the preproduction run scheduled in November 2000. Concerning the radiation tolerance, several radiation tests have been performed on the first and second prototype. It turns out that the radiation tolerance of the regulator is much higher than the level guarantied by ST (2*1013 neutron/cm2 and 500 Krad). These good results have been also confirmed by the measurement of individual NPN and PNP transistors, which are placed on the same wafer as test structures in the scribe line. It can be seen that the hardening of NPN bipolar transistors to displacement damage is actually quite similar to high-speed bipolar technology or radiation hardened bipolar technology presently used for LHC ASIC projects. 21

References: [1] RD49 1st Status Report , CERN/LHCC 97-63, 12 December 1997 [2] RD49 2nd Status Report , CERN/LHCC 99-8, 8 March 1999 [3] RD49 3rd Status Report , CERN/LHCC 2000-003, 13 January 2000 [4] A. Bigga, “Report about my training period at CERN”, 27 March 2000 [5] A. Bigga et al. “Using the automatic probe and the X-ray machine with the Buslab Program”, CERN Internal Note, February 2000 [6] S. Leonardi et al. “RHBIP1 technology evaluation to total dose, low dose rate and neutrons, for LHC experiments and space applications”. Proceedings of the Fourth Workshop of electronics for LHC Experiments. Rome, September 1998. (431-434) [7] Technical specification for the development of a radiation tolerant voltage regulator prototype for LHC experiments, ref: PJ151098EPMIC, 29 October 1998 [8] G. Bonna et al. “ a radiation-hardened low dropout voltage regulator for LHC and space applications”, 5th Workshop on electronic for LHC experiments Snowmass Colorado, September 1999 [9] B. Roberts et al. “Test of the radiation tolerance of the STM voltage regulator for the LHC experiments”, CERN Internal Note, October 1999 [10] Holmes, Siedle “Handbook of radiation effects” Oxford Science Press, 1993 [11] P. Horowitz “ The art of electronics” Cambridge University press, 1980 [12] M. Glaser et al. “New irradiation zones at the CERN-PS” Rose Collaboration. Nucl. Instrum. Methods Phys. Res., A: 426 (1999) no.1, pp72-77 [13] RD49 Homepage, http://www.cern.ch/RD49

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