A Soft Error Study on Trigate based FinFET and ...
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A Soft Error Study on Trigate based FinFET and ...
Dec 7, 2016 - 12/24/2016 A Soft Error Study on Trigate based FinFET and JunctionlessFinFET 6T SRAM Cell â A Comparison | Chitra | TELKOMNIKA ...
12/24/2016 A Soft Error Study on Trigate based FinFET and JunctionlessFinFET 6T SRAM Cell – A Comparison | Chitra | TELKOMNIKA (Telecommunicati…
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Home > Vol 14, No 4 > Chitra
A Soft Error Study on Trigate based FinFET and JunctionlessFinFET 6T SRAM Cell – A Comparison P Chitra, S Ravi, V N Ramakrishnan
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J OU R N A L M E TR I C S CiteScore 2015 : 0.36 SJR 2015 : 0.211 SNIP 2015 : 0.483 CiteScoreTracker 2016 : 0.42 (Last updated on 7 Dec, 2016)
U SER
When junction based semiconductor devices are scaled down to extreme lower dimensions, the formation of ultra sharp junctions between source/drain and channel becomes complex since the doping concentration has to vary by several orders of magnitudes over a distance of a few nanometers. In addition, As CMOS device is scaling down significantly, the sensitivity of Integrated Circuits (ICs) to Single Event Upset (SEU) radiation increases. As soft errors emerge as reliability threat there is a significant interest lies both at device and circuit level for SEU hardness in memories. The critical dose observed in FinFET and JunctionlessFinFET (JLT) based 6TSRAM is given by LET = 1.4 and 0.1 pC/µm. The simulation result analyzes electrical and SEU radiation parameters of FinFET and JLT based 6T SRAM memory circuit.
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