parallel (ISOP), load sharing, modular converter, voltage sharing. I. INTRODUCTION. AFULLY ...... (a) Converter input voltages (400 mV/div, 5 A/div, and 10 ms/div). .... [Online]. Available: http://www.synqor.com/pdf/appnt_System_Instability.pdf.
1462
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 19, NO. 6, NOVEMBER 2004
Active Input–Voltage and Load–Current Sharing in Input-Series and Output-Parallel Connected Modular DC–DC Converters Using Dynamic Input-Voltage Reference Scheme Raja Ayyanar, Member, IEEE, Ramesh Giri, and Ned Mohan, Fellow, IEEE
Abstract—This paper explores a new configuration for modular dc–dc converters, namely, series connection at the input, and parallel connection at the output, such that the converters share the input voltage and load current equally. This is an important step toward realizing a truly modular power system architecture, where low-power, low-voltage, building block modules can be connected in any series/parallel combination at input or at output, to realize any given system specifications. A three-loop control scheme, consisting of a common output voltage loop, individual inner current loops, and individual input voltage loops, is proposed to achieve input voltage and load current sharing. The output voltage loop provides the basic reference for inner current loops, which is modified by the respective input voltage loops. The average of converter input voltages, which is dynamically varying, is chosen as the reference for input voltage loops. This choice of reference eliminates interaction among different control loops. The input-series and output-parallel (ISOP) configuration is analyzed using the incremental negative resistance model of dc–dc converters. Based on the analysis, design methods for input voltage controller are developed. Analysis and proposed design methods are verified through simulation, and experimentally, on an ISOP system consisting of two forward converters. Index Terms—Input-series connection, input-series and outputparallel (ISOP), load sharing, modular converter, voltage sharing.
I. INTRODUCTION
A
FULLY modular power system architecture is envisioned for dc–dc power conversion. In such an architecture, lowpower, low-voltage (input and output) building block dc–dc converters can be connected in any combination, series or parallel, both at the output as well as at the input sides, to realize any input–output specifications. Fig. 1 illustrates an example of a 5-kW power supply system operating from a 1000-V dc source and delivering a well regulated output voltage of 50 V at a maximum load current of 100 A. This system is implemented using a total of 20 250-W power supplies, each with an input voltage
Manuscript received August 26, 2003; revised February 4, 2004. This work was supported by the Office of Naval Research (ONR) under Award N00014-00-1-0928 and Award N00014-03-1-0802. Recommended by Associate Editor P. M. Barbosa. R. Ayyanar is with the Department of Electrical Engineering, Arizona State University, Tempe, AZ 85287–5706 USA. R. Giri is with Maxim Integrated Products, Sunnyvale, CA 94086 USA. N. Mohan is with the University of Minnesota, Minneapolis, MN 55455 USA. Digital Object Identifier 10.1109/TPEL.2004.836671
Fig. 1. Example of a fully modular power system architecture.
rating of 100 V, and providing a regulated 25-V output at a maximum current of 10 A. (Though not shown in the figure, required level of redundancy may also be included.) The main advantages of the modular approach include: significant improvement in reliability by introducing desired level of redundancy [1]–[5]; standardization of components leading to reduction in manufacturing cost and time; power systems can be easily reconfigured to support varying input-output specifications; and possibly higher efficiency and power density of the overall system, especially with interleaving. A. Input–Parallel Connections Fig. 2 shows the four possible combinations of input-output connections. Among these combinations, the input-parallel and
0885-8993/04$20.00 © 2004 IEEE
AYYANAR et al.: ACTIVE INPUT-VOLTAGE AND LOAD–CURRENT SHARING
Fig. 2. Four possible combinations of input–output connections. (a) Input parallel and output series. (b) Input parallel and output parallel. (c) Input series and output parallel. (d) Input series and output series.
output-series (IPOS) connection is well known and is presently used in many applications requiring high output voltages. Standard dc–dc converters, with independent output voltage controllers, can be connected in series at the output achieving equal sharing of output voltage and input current. However, in order to obtain the advantages of modularity such as redundancy, a common output voltage loop or an output-voltage share bus is required. A scheme based on common output voltage loop and individual inner current loops is discussed in [5]. The input-parallel and output-parallel (IPOP) connection has been the subject of vigorous research recently, fueled by the requirement of low voltage and very high current outputs. The challenge here is to ensure equal sharing of load current (hence, input currents also) among the modular converters, in spite of small differences in the power stage and control parameters of the different converters, and finite differences in the impedances of interconnections. Several control schemes, such as many droop schemes [6]–[8], master–slave scheme [9], [10], democratic current share scheme [11]–[13], and frequency based current share scheme [4], have been proposed to ensure active load current sharing among the parallel converters. Paralleling techniques that do not require direct interconnection of control circuits of the various modules have also been investigated [14]. An excellent review and comparison of different methods for IPOP connection are given in [15]. B. Input-Series Connections The ability to connect converters in parallel or series only at the output does not result in complete modularity. Given the wide variety of input sources possible, such as rectified utility voltage, batteries and fuel cells, the input voltage to a system can also vary widely for different applications. Hence, it is essential to develop converters that can be connected in series at the input [Fig. 2(c) and (d)] also, with dynamic input-voltage sharing capability. Apart from considerations of modularity, the input-series connection has many other advantages such as the following. 1) Enables use of metal oxide semiconductor field effect transistors (MOSFETs) with low voltage rating, which , leading to higher efare optimized for very low of a MOSFET ficiency. At higher voltages, the
1463
depends mainly on the drift region resistance, which is , where is the roughly proportional to break down voltage of the MOSFET [16]. Hence, “ ” MOSFETs each with a voltage rating of , which is significantly lower have a combined of a single MOSFET with a voltage than the . rating of 2) MOSFETs can be used instead of insulated gate bipolar transistors (IGBTs) for high input-voltage applications. Hence, switching frequency, and therefore, power density of such systems can be increased. 3) Input-series and output-parallel connection leads to smaller conversion ratios for the individual converters, especially for the popular low output voltage applications. This leads to more efficient power conversion [5]. 4) Possibility of interleaving to reduce filter ratings and improve transient performance (similar to input-parallel converters) However, in spite of several advantages of input-series connection, not much research has been reported on this configuration. In [17], input-series and output-parallel (ISOP) connection has been implemented for a two-converter system, using a charge control scheme with input voltage feed forward. In [18] a three-loop control scheme, including an input voltage loop, for ISOP connection, is presented. This paper improves upon the earlier work by the authors [18], by proposing a new reference scheme for input voltage loop that minimizes interactions among the control loops, and by providing detailed analysis and design methods based on incremental negative resistance model. An advantage of the proposed scheme is that standard converters using popular current mode control (peak or average) can be used, without the need for explicit average input current control or charge control, as in [17]. Direct series connection of devices such as MOSFETs and IGBTs for high input voltage applications has also been investigated [19]. However, the advantages of modularity such as scaling and reconfiguration, as well as interleaving to reduce filter requirement, are easily achieved in series connected converter modules, than in series power devices. II. ISOP SYSTEMS This paper investigates the ISOP connection, which is well suited for applications with high input voltages and high load currents. A main trend in switch mode power supplies is the requirement of very low output voltages with very high currents. With the proposed ISOP connection for such applications, the conversion ratio for each converter, and therefore, the turns-ratio of the power transformer, is much smaller. This can result in smaller leakage inductances and other parasitic components, thus improving efficiency. The feasibility of ISOP connection, even with finite differences in various converter parameters, can be verified by considering power balance in individual converters, under steady-state. Fig. 3 shows a numerical example of how input voltage as well as output current can be shared equally, in the presence of parameter mismatches such as different turns-ratios for the power transformers. Under steady state, the input currents of the two
1464
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 19, NO. 6, NOVEMBER 2004
Fig. 3. Feasibility of input voltage and output current sharing with mismatched transformer turns-ratio.
converters are equal due to the series connection. If the input voltages are also maintained equal by control, then the input powers of the two converters are equal. Therefore, by power balance (neglecting losses), the output powers of the two converters are equal. Since, the parallel connection at the output ensures that the output voltages are equal, the output currents are also automatically made equal. If the parameters of the two converters are identical, the duty ratios will be equal; for any mismatch in the parameters such as turns-ratio of the transformer, the duty ratios will differ to correct for the mismatch, as illustrated in Fig. 3. It should be noted, however, that the above discussion assumes that the converters operate stably in steady state. The necessary condition for stable operation is discussed in the following sections. A. Need for Input Voltage Controller It is easy to appreciate that standard converters, without any special input voltage or load current sharing controllers, when connected in ISOP combination, will not result in stable operation. This is similar to the case of the widely used IPOP connection, where, in the absence of a load current sharing controller, even a small mismatch in parameters can lead to wide variations in the individual output currents of the converters. For the ISOP connection, it is important to note that even with load current sharing controllers, similar to those used in IPOP connection, stable operation is not achieved. For example, consider again the ISOP connection shown in Fig. 3, and assume that the system has an output current sharing controller. If the input voltage of converter 1, for example, increases slightly due to a disturbance, the output current sharing controller reduces the duty ratio of this converter, in order to maintain its current equal to that of the converter 2. This reduces the average input current drawn by converter 1, leading to further increase in its input voltage. This process leads to a runaway condition, resulting in large voltage stress across converter 1, eventually destroying it. Fig. 4 shows the simulated waveforms corresponding to an ISOP connection with a load-current-share mechanism, but without an input-voltage controller. The two series connected converters use current mode control, with a common output voltage loop providing the current reference to both converters. As seen in Fig. 4, in spite of the common current reference, the input voltages diverge. Hence, a dedicated input voltage control loop, which adjusts the duty ratios of the
Fig. 4. Divergence of input voltages in an ISOP system without input voltage control.
individual converters depending on the error in input voltage sharing, is required. It may be noted that input voltage sharing automatically ensures output load current sharing, without the need for a dedicated load current share controller. III. PROPOSED CONTROL SCHEME WITH DYNAMIC INPUT VOLTAGE REFERENCE Fig. 5 shows the proposed control scheme for ISOP connection of forward converters (the reset windings for the transformers are not shown, for clarity). The proposed scheme and the analysis that follows are valid for any buck derived isolated dc–dc converter. As seen, the scheme consists of three control loops to ensure equal input voltage and load current sharing. A single output voltage loop, which is common to all the conto all the inverters, provides the initial current reference, dividual, inner current loops. The compensator for the output . Each converter also has an indivoltage loop is denoted as vidual input voltage loop, which adjusts the above current reference to its inner current loop, based on the error between the reference input voltage and the actual input voltage of the particular converter. The inner current loop can be of either peak current mode or average current mode with a compensator as shown in Fig. 5. The inner current loop controls the duty ratio of the converter such that the output inductor current equals the . adjusted current reference, referred to as The input voltage reference is chosen to be the average of all the converter input voltages, as given in (1). Note that the converter input voltage is defined as the voltage across the input capacitor of the corresponding converter. It takes into account the resonance due to the input LC filter. In particular, the sum of the converter input voltages (capacitor voltages) is not dynamically equal to the total system input voltage,
(1) Other possible references for the input voltage loop are and a constant reference. As will be explained in Section V, the main advantages of the dynamic input voltage reference proposed in this paper are that it minimizes the interaction among the different control loops and results in better transient performance.
AYYANAR et al.: ACTIVE INPUT-VOLTAGE AND LOAD–CURRENT SHARING
1465
Fig. 6. Equivalent circuit based on negative resistance model for an ISOP converters. system with
N
Fig. 5. Proposed three-loop control scheme with dynamic input voltage reference for ISOP connection of “ ” modular converters.
N
IV. ANALYSIS BASED ON NEGATIVE RESISTANCE MODEL OF DC–DC CONVERTER For the purpose of analyzing the stability and performance of the input voltage loop, each converter can be modeled as an equivalent incremental negative resistance as seen from the terminals of the input capacitor. The incremental negative resistance model of a dc–dc converter is discussed in detail, especially in the context of designing input filters and understanding their effects on the stability of the overall system, in [20] and [21]. Regardless of whether current-mode control or voltagemode control is employed, the input terminals of the converter exhibit negative resistance characteristics, since a positive incremental change in input voltage results in a proportionate, but negative incremental change in the input current. In the case of voltage-mode controlled converters, the negative resistance model is accurate for frequencies up to the bandwidth of the output voltage loop. For current-mode controlled converters, the frequency range extends up to the bandwidth of the inner current loop. A more accurate model for the converter is a negative resistance in parallel with a capacitance C that depends on the above bandwidths [20]. However, since the bandwidth of the current loop is much higher than that of the input voltage loop here, the parallel capacitance is neglected.
Fig. 6 shows the equivalent circuit used to analyze the converter ISOP system. Each converter is modeled as an , connected to an input LC equivalent negative resistance, filter. In the actual system, the input voltage loop adjusts the reference to the output inductor current. The inductor current follows the reference with a small but finite response time, which together with the change in duty ratio translates into a change in the input current. The dynamics of the input current depend on the bandwidth of the inductor current loop and dynamic changes in the duty-ratio, . In the equivalent circuit of Fig. 6, the correction mechanism is modeled as an ideal current , connected directly across source, the input capacitor of each converter. After the scaling factors due to transformer turns-ratio and the steady-state duty ratio, , are taken into account, this is a valid, close approximation at frequencies less than the bandwidth of the inner current loop, and when the magnitude of the correction currents at the input is relatively small. The validity of the equivalent circuit is confirmed by the excellent matching of simulation results obtained using the above equivalent circuit representation and those corresponding to the full circuit model as discussed in detail in Section IV.B. of The value of the incremental negative resistance, the converter depends on the operating load and input voltage. While analyzing the stability of the system with input voltage control, the worst-case condition is the maximum load current and minimum input voltage. Hence, the value of the negative resistance used in the model of Fig. 6 is as given in
(2) is the minimum specified input voltage to an inwhere, is the maximum output power of dividual converter, and an individual converter.
1466
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 19, NO. 6, NOVEMBER 2004
A. Derivation of Stabilizing Controller Gain, K
should have the same sign For stable operation, . Therefore, the condition for stability is given as by
Referring to Fig. 6, let us define the following: (3a)
(8)
(3b)
This condition for the minimum gain for the proportional input voltage controller is independent of the capacitance or ESR values of the input capacitors, and is strictly valid even if the impedances of the input capacitors of different converters are ensures significantly different. It may be noted that while stability, higher values of result in faster correction in input voltages after a disturbance. However, this faster response is at the expense of increased switch currents. For the dynamic input is limited mainly voltage reference scheme, the value of is discussed in by the switch ratings. Selection of suitable Section IV-C. As mentioned earlier, in the actual system input voltage differences are corrected by adjusting the output inductor currents of individual converters. The output inductor current and the actual correction current at the input are related by the turns-ratio of the power transformer, and the operating duty ratio. Considering these two scaling factors, the value of minimum gain, for stability of the actual system is given by
(3c) where is the constant gain of the input voltage controller. The objective is to maintain the input voltages, as seen at the input capacitor terminals, of all the converters equal to each . The necessary condition other, and therefore, equal to for stability of the system shown in Fig. 6, is that for an increase , relative to the in any converter input voltage, for example, , the input current drawn by the average input voltage, converter, (which is the sum of the current through the negative resistance model and the correction current) should increase, relative to the average of the input currents drawn by all , which is equal to . This enthe converters, sures that the higher input current discharges appropriately . to reduce In terms of ac perturbation quantities, the condition is that should be in phase with . Note that for ac analysis (4) where, has a negative value given in (2). Also, the equivalent incremental negative resistance of each converter is assumed equal. From Fig. 6
(9) where is the turns-ratio of the power transformer, and is the steady state duty-ratio of the converter at the given operating condition. It may be noted that though the paper has presented a scheme with current mode control, it is possible to apply these principles to voltage mode controlled converters as well. In this case, the input voltage loop, instead of adjusting the current references, will directly adjust the duty ratio of the individual converters. B. Validation Through Simulation of a Two Converter System
(5) Adding the expressions in (5)
(6) From (5) and (6)
(7)
Though (9) is valid for the general case of converters, for simplicity, further analysis, simulation and experimental results in this paper are restricted to a two-converter ISOP system. The two-converter system is simulated using both the negative resistance model, as well as the full large-signal average model, in PSpice. The results match very closely, validating the analysis based on the simpler negative resistance model. The PSpice schematic of the negative resistance model, similar to that of Fig. 6, is shown in Fig. 7. The incremental negative resistance is implemented by a controlled current source whose magnitude is inversely proportional to the converter input voltage. The input capacitors are purposely made dissimilar in order to study the performance of the proposed controller. The schematic of the detailed, large signal average model is shown in Fig. 8. The average model is obtained by replacing the PWM switch of each converter by its ideal transformer model, and . The turns-ratios of these ideal transformers are dynamically varying and are equal to the instantaneous dutyand , respectively, [22]. and are the power ratios, transformers of the two converters with fixed turns-ratios. There
AYYANAR et al.: ACTIVE INPUT-VOLTAGE AND LOAD–CURRENT SHARING
1467
Fig. 9.
Open loop gain for the input voltage loop.
For both the simulation models, the specifications of the system and individual converters, and the values of components used for power stage and controllers are the same as those of the hardware prototype, which are detailed in Section VI. For the two converter system
(10)
Fig. 7. PSpice schematic for a two-converter ISOP system based on negative resistance model.
(11a)
(11b) For frequency domain simulation, in order to obtain a convenient point for signal injection, the error voltage , , is considered as the variable to be controlled, referred to as with the control reference being zero. By perturbing this reference, the frequency response plots of the two-converter system can be obtained. This scheme is illustrated in the two schematics shown in Figs. 7 and 8. In both the schematics, the open loop transfer function for the input voltage control loop is given by (12) (12)
Fig. 8. PSpice schematic for a two-converter ISOP system based on full average model including the different control loops.
is a common output voltage loop, individual average current mode inner current loops, whose references are adjusted by individual input voltage loops. The output voltage loop compensator is designed to achieve a bandwidth of 5 kHz and the two inner average current loops are designed for a bandwidth of approximately 50 kHz. The structure of the compensators and the values used are also shown in Fig. 8.
Fig. 9 shows the Bode plots of open loop gain , obtained from both negative resistance model as well as full average model. The two models match very closely for frequencies up to 10 kHz. As seen from the plots, the open loop gain has an unstable pole (right half plane) at around 70 Hz. This pole frequency is determined by the value of input capacitance and the magnitude of the incremental negative resistance of the converter. The gain, of the input voltage controller should be defined in (13) is chosen such that the closed loop gain stable (13) Fig. 10 shows the Bode plots of closed loop gain, different values of . As seen from Fig. 10, for
for ,
1468
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 19, NO. 6, NOVEMBER 2004
Fig. 10.
Closed loop Bode plots for the input voltage loop corresponding to stable and unstable values for gain, K .
Fig. 11.
Bode plots corresponding to (v
(S ))=(v
(S )) at different values of gain,
the system is unstable, since the closed loop transfer function has an unstable pole (at around 20 Hz for this particular value dB/decade of , where the magnitude drops at a rate of , the system is stable, while the phase increases). For as seen from Fig. 10 (darker plots), thus validating the stability conditions given in (8) and (9). The input voltage control loop has to correct for unbalances in the individual converter input voltages caused by disturbances such as a step change in total input voltage. Hence, a main transfer function of interest for the input voltage control loop is , i.e., the response in the individual input voltages due to changes in the total system input voltage. This as transfer function is obtained by keeping the reference to zero, and perturbing the total input voltage. The corresponding Bode plots obtained using negative resistance model and full average model are shown in Fig. 11, for three different values of . As seen, for , there is an unstable pole, which is eliminated at higher values of . Since, this is a response to disturbance input, the gain of the transfer function should be low for better disturbance rejection, which is achieved by increasing . Also, note that at 120 Hz the gain of the disturbance transfer dB), which implies that the proposed function is low (
K.
scheme will work well when the input dc voltage to the system is obtained by rectifying ac mains voltage. Fig. 12 shows the time domain response in the individual input voltages when a step change of 20 V is applied to the total system input voltage. Plots corresponding to both the negative resistance model and the full average model are shown. , the system is unstable, As seen in Fig. 12(a), for with the two converter input voltages diverging, resulting in a greater than, but close to , the run-away mode. For system is stable, but it takes a long time for the correction in con, verter input voltages, as shown in Fig. 12(b). For the two converter input voltages converge quickly as seen from Fig. 12(c). The oscillations in the individual input voltages in Fig. 12 are due to the resonance in the input LC filters, and do not reflect on the stability margins of the input voltage controller. The objective of the input voltage controller is not to reduce these oscillations, but only to ensure that the total voltage is shared equally between the two converters. It may be observed that even in a single converter system the input voltage oscillations occur for a step change in input voltage. Though in most applications the converters will be designed to share the input voltage equally, it is possible to design the
AYYANAR et al.: ACTIVE INPUT-VOLTAGE AND LOAD–CURRENT SHARING
1469
0
Fig. 13. Response in converter input voltages when the reference for v changes from 0–10 V. Note that the commanded unequal sharing of input voltages results in corresponding unequal load current sharing. v
with higher values of . As discussed in Section V, the dynamic does not inreference scheme ensures that higher value of terfere with output voltage loop. However, higher results in larger switch currents momentarily, during input voltage disturbances. Since, in most designs, MOSFETs are usually chosen with a significantly higher current rating than required (in order ), it is possible to choose high values of . to reduce depends on the expected tolerances in The actual choice of the input capacitor values, the characteristic impedance of the input LC filter and the magnitude of disturbance expected in the total input voltage. The equivalent circuit of Fig. 6 will be useful in selecting appropriate value for . V. EFFECT OF INPUT VOLTAGE LOOP ON THE OUTPUT VOLTAGE CONTROL
Fig. 12. Response in the individual converter input voltages to a step change of 20 V in total input voltage. (a) K = 0:8K . (b) K = 1:25K . (c) K = 12K .
input voltage loop such that the converters share the input voltage at any other desired ratios too. By power balance, the converter designed for lower input voltage will also provide lower output current. Fig. 13 shows the response in input is changed from zero voltages when the reference to used for this simulation is . The to 10 V. The gain, response time obtained corresponds well with the bandwidth of the closed loop Bode plots, similar to that shown in Fig. 10. Fig. 13 also shows the output inductor currents (average model) corresponding to the above command. As seen, the converters share the load currents in the same ratio as that of input voltage. C. Selection of From the above discussion, it is clear that should be at least , and higher values of result in faster corhigher than rection in the input voltages after a disturbance. Comparing the plots Fig. 12 with different gains , the peak overshoot in the input voltage ( for the example considered) also decreases
The main advantage of the dynamic reference scheme is that the input voltage loop does not interfere with the dynamics of output voltage control. The output voltage depends on the sum of the individual output inductor currents. In the dynamic reference scheme, the sum of the adjustment currents is zero, i.e., . In particular, for the two-converter system, . Since the contribution to the total output current from the input voltage control loop is zero, the output voltage is not affected by the input voltage correction. Hence, the output voltage controller can be designed without considering the input voltage loop, and the design procedure is similar to that of a single converter system. Fig. 14 shows the final output voltage and individual output inductor currents, corresponding to a step change in the system input voltage. These simulation results correspond to the full average model shown in Fig. 8. As seen, the individual inductor currents are adjusted to correct for the differences in the input voltage, but in such a way that their sum is not affected. As a result, the change in output voltage is negligible (about 0.02%), and is similar to the response of a single converter system to a step change in input voltage. VI. EXPERIMENTAL RESULTS The proposed control scheme is validated on a hardware prototype comprising of two forward converters connected in ISOP configuration. The specifications for the full system are: 1) input voltage: 160–200 V dc (to be shared equally by the two converters);
1470
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 19, NO. 6, NOVEMBER 2004
Fig. 14. Output voltage and output currents corresponding to step change in total input voltage.
Fig. 15. Experimental waveforms: converter input voltages and output inductor currents under steady state. (40 V/div, 2 A/div, and 10 s/div).
2) output voltage: 48 V dc; 3) maximum output current: 8 A (to be shared equally by the two converters); 4) switching frequency: 170 kHz (each converter). The values of the power stage components as well as the compensators for the various control loops are same as those shown in Fig. 8. Note that to verify the reliable operation and effectiveness of the proposed control scheme in the presence of mismatches in the converter parameters, the input filter capacitors of the two converters are purposely chosen to be very different (33 and 66 F, respectively). The turns-ratios of the two power transformers are also not identical. Peak current mode control using UC2844 is employed for the individual inner current loops. The two control integrated circuits (ICs) are synchronized, though this is not an essential requirement for the proposed control scheme. Fig. 15 shows the individual input voltages and the inductor currents of the two converters respectively, under steady state. As seen, the input voltage as well as the load current is shared perfectly equal by the two converters. Fig. 16 shows the response in the converter input voltages to a step change of 20 V in the total input voltage of the system, corresponding to two different values of gain, . As seen, higher gain results in quicker correction in the converter input voltages. The results match very closely with the simulation results shown in Fig. 12. Fig. 17 shows the response at the output side to the above
Fig. 16. Response in individual input voltages for a step change of 20 V in the total input voltage. (5 V/div and 0.5 ms/div). (a) K = 8K . (b) K = 12K .
step change in system input voltage. Fig. 17(a) shows the output voltage in expanded (ac) mode, and as expected for the dynamic reference scheme, the output is almost unaffected, with the peak deviation less than 200 mV or 0.5%. The output inductor currents corresponding to the above input change is is compensated shown in Fig. 17(b). As seen, the increase in . by decrease in Fig. 18 shows the response to step change of 2 A in the load current. Fig. 18(a) shows that the change in individual input voltages corresponding to the step load change is small (less than 200 mV or 0.2%). The converters continue to stably share the voltages after the disturbance. Fig. 18(b) shows the output voltage corresponding to the above step change in load. The peak deviation is less than 0.5% and the output voltage recovers within about 4 ms with an exponential response. The performance is similar to that of a single converter system with cur-
AYYANAR et al.: ACTIVE INPUT-VOLTAGE AND LOAD–CURRENT SHARING
Fig. 17. Response to 20-V step change in total input voltage. (a) Output 40 V/div, V 100 mV/div with ac coupling and 5 ms/div). voltage (V (b) Individual input voltages and individual inductor currents ( 10 V/div, iL 2 A/div, and 0.5 ms/div). in both cases is 8 .
0
0
0
K
K
V 0
1471
Fig. 18. Response to a step change of 2 A in the load current. (a) Converter input voltages (400 mV/div, 5 A/div, and 10 ms/div). (b) Output voltage (200 mV/div in ac mode and 5 ms/div).
VII. DISCUSSION rent mode control. Hence, the presence of input voltage loop with dynamic input voltage reference scheme, does not affect the performance of the output voltage control loop. Fig. 19 shows the individual input voltages and the individual output currents during start-up of the system. Until the total input voltage reaches the minimum specified value of 160 V, the two converters do not regulate and operate at the maximum duty ratio of 0.5. During this period, there is a slight mismatch in the two individual input voltages, due to mismatch in the transformer turns-ratio of the two converters. After the total input voltage increases above 160 V, the converters begin to regulate, and as seen, the input voltage control is able to ensure equal input voltage sharing.
As discussed in Section I, input-series connection has several advantages in many applications. However, just as was done for its dual configuration—IPOP connection, concerted research efforts are needed before the use of this configuration becomes widespread. This paper has only established the feasibility of the ISOP connection, and proposed a simple control scheme to ensure input voltage sharing. Some of the main topics for future research in this area are outlined below. True Modularity: The control scheme proposed in this paper has an output voltage loop that is common to all the converters. Therefore, the individual converter modules are not self-contained, and are not identical. The presence of a single, central controller may compromise the reliability of the overall
1472
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 19, NO. 6, NOVEMBER 2004
rection currents is zero, and hence the input voltage correction has no effect on the dynamics of output voltage control. This allows the different control loops to be designed independently, and also makes it possible to use large gains for input voltage loop. The stability analysis, controller performance and the suggested design methods have been verified through numerical simulation, both in frequency domain and in time domain. The proposed scheme is also validated experimentally on an ISOP system comprising of two forward converters and the results have been presented extensively. More, concerted research efforts are needed before the use of input-series and output-parallel configuration becomes widespread. REFERENCES
Fig. 19. Individual input voltages and individual output currents during startup of the converters (40 V/div, 2 A/div, and 10 ms/div).
system. Hence, research is presently being done to develop self-contained, identical modules that have individual output voltage loops whose reference is adjusted by their respective input voltage controller. Protection Issues: In case of failure of a converter, it needs to be isolated from the rest of the system. At the output side, the protection is similar to that employed in IPOP configuration. However, at the input side, if the switch fails open, then the converter needs to be shorted, so that the rest of the system shares the total input voltage. Research is also needed to achieve hot-swapping capability for the converter modules. Another important issue is the isolation requirements for the power transformers, and for sensing the different converter input voltages. Interleaving: Similar to IPOP connection, interleaving the converters can result in significant reduction in the output capacitor current as well as the ripple in the input current of the system. VIII. CONCLUSION Ability to connect isolated dc–dc converters in series at the input, with dynamic voltage sharing, is an essential step toward realizing truly modular power system architecture. The input series connection has other significant advantages such as the possibility of using MOSFETs efficiently for high input-voltage applications, and smaller conversion ratios for low output voltage applications. This paper has demonstrated input voltage and load current sharing in converters connected in input-series and output-parallel configuration. The proposed control scheme has an input voltage loop adjusting the current reference provided by a common output voltage loop to the inner current loops. A simple proportional controller is sufficient for the input voltage loop. The minimum value of the gain for stability is determined by the incremental negative resistance of the individual converters. The choice of dynamic input voltage reference, equal to the average of the individual converter input voltages, ensures that the sum of cor-
[1] T. F. Wu, K. Siri, and C. Q. Lee, “Reliability improvement in parallel connected converter systems,” in Proc. IEEE Industrial Electronics, Control Instrumentation Conf. (IECON’91), vol. 1, 1991, pp. 429–434. [2] L. Thorsell and P. Lindman, “Reliability analysis of a direct parallel connected redundant power system based on high reliable dc/dc modules,” in Proc. IEEE Int. Telecommunications Energy Conf. (INTELEC’88), 1988, pp. 551–556. [3] K. Siri, C. Q. Lee, and T. F. Wu, “Current distribution control for parallel connected converters—Part I,” IEEE Trans. Aerosp. Electron. Syst., vol. 28, pp. 829–840, July 1992. [4] D. J. Perreault, R. L. Selders, and J. G. Kassakian, “Frequency-based current-sharing techniques for paralleled power converters,” IEEE Trans. Power Electron., vol. 13, pp. 626–634, July 1998. [5] S. N. Manias and G. Kostakis, “Modular DC–DC convertor for highoutput voltage applications,” Proc. Inst. Elect. Eng., vol. 140, no. 2, pp. 97–102, Mar. 1993. [6] B. T. Irving and M. M. Jovanovic, “Analysis, design and performance evaluation of droop current sharing methods,” in Proc. IEEE Applied Power Electronics Conf. (APEC’00), 2000, pp. 235–241. [7] J. W. Kim, H. S. Choi, and B. H. Cho, “A novel droop method for converter parallel operation,” IEEE Trans. Power Electron., vol. 17, pp. 25–32, Jan. 2002. [8] J. S. Glaser and A. F. Witulski, “Output plane analysis of load-sharing in multiple-module converter systems,” IEEE Trans. Power Electron., vol. 9, pp. 43–50, Jan. 1994. [9] Y. Panov, J. Rajagopalan, and F. C. Lee, “Analysis and design of parallel DC–DC converters with master–slave current control,” in Proc. IEEE Applied Power Electronics Conf. (APEC’97), vol. 1, 1997, pp. 436–442. [10] M. Jordan, UC3907 load share IC simplifies parallel power supply design, in Unitrode Applicat. Note U-129, 2004. [11] K. T. Small, “Single wire current share paralleling of power supply,” U.S. Patent 4 717 833, Jan. 1988. [12] V. J. Thottuvelil and G. C. Verghese, “Analysis and control design of paralleled DC/DC converters with current sharing,” IEEE Trans. Power Electron., vol. 13, pp. 635–644, July 1998. [13] M. M. Jovanovic, “A novel, low-cost implementation of ‘democratic’ load current sharing of parallel converter modules,” IEEE Trans. Power Electron., vol. 11, pp. 604–611, July 1996. [14] D. J. Perreault, K. Sato, R. L. Selders, and J. G. Kassakian, “Switching-ripple-based current sharing of paralleled power converters,” IEEE Trans. Circuits Syst. I, vol. 46, pp. 1264–1274, Oct. 1999. [15] S. Luo, Z. Ye, R. L. Lin, and F. C. Lee, “A classification and evaluation of paralleling methods for power supply modules,” in Proc. IEEE Power Electronics Specialists Conf. (PESC’99), 1999, pp. 901–908. [16] N. Mohan, T. M. Undeland, and W. P. Robbins, Power Electronics: Converters, Applications, and Design, 3rd ed. New York: Wiley, 2003, p. 589. [17] J. W. Kim, J. S. You, and B. H. Cho, “Modeling, control, and design of input-series–output-parallel-connected converter for high-speed-train power system,” IEEE Trans. Ind. Electron., vol. 48, pp. 536–544, June 2001. [18] A. Bhinge, N. Mohan, R. Giri, and R. Ayyanar, “Series-parallel connection of DC–DC converter modules with active sharing of input voltage and load current,” in Proc. IEEE Applied Power Electronics Conf. (APEC’02), vol. 2, 2002, pp. 648–653.
n+1
N
AYYANAR et al.: ACTIVE INPUT-VOLTAGE AND LOAD–CURRENT SHARING
1473
[19] C. Gerster, “Fast high-power/high-voltage switch using series-connected IGBTs with active gate-controlled voltage balancing,” in Proc. IEEE Applied Power Electronics Conf. (APEC’94), 1994, pp. 469–472. [20] M. F. Schlecht. (2004) Input System Instability. SynQor Application Note: PQ-00-05-1. [Online]. Available: http://www.synqor.com/pdf/appnt_System_Instability.pdf [21] R. D. Middlebrook, “Input filter considerations in design and application of switching regulators,” in Proc. IEEE Industry Applications Soc. (IAS) Meeting, 1976, pp. 366–382. [22] V. Vorperian, “Simplified analysis of PWM converters using the model of the PWM switch: Part I—Continuous conduction mode,” IEEE Trans. Aerosp. Electron. Syst., vol. 26, pp. 490–496, May 1990.
Ramesh Giri received the B.S. degree from the P.S.G College of Technology, Coimbatore, India, and the M.S. degree from the Arizona State University, Tempe. He has been a Switched Mode Power Supply Design Engineer in the industry for over 15 years. He is currently a Corporate Applications Engineer with Maxim Integrated Products, Sunnyvale, CA, and is responsible for defining power management integrated circuits.
Raja Ayyanar (S’97–M’00) received the M.S. degree from the Indian Institute of Science, Bangalore, India, and the Ph.D. degree from the University of Minnesota, Minneapolis. He has been an Assistant Professor with Arizona State University, Tempe, since August 2000. He has many years of industrial experience designing switch mode power supplies. His current research interests include topologies and control techniques for modern dc–dc converters, new pulse—width modulation techniques for drives, and power electronics applications in power systems.
Ned Mohan (S’68–M’73–SM’91–F’96) is Oscar A. Schott Professor of Power Electronics at the University of Minnesota, Minneapolis, where he has been since 1976. He has many patents and publications in the field of power electronics. He coauthored Power Electronics: Converters, Applications and Design and authored Electric Drives: An Integrative Approach and Advanced Electric Drives Analysis, Control and Modeling Using Simulink. Dr. Mohan received the Distinguished Teaching Award from the Institute of Technology, University of Minnesota.