An Active Low-Frequency Ripple Control Method Based ... - IEEE Xplore

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 4, APRIL 2014

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An Active Low-Frequency Ripple Control Method Based on the Virtual Capacitor Concept for BIPV Systems Wen Cai, Student Member, IEEE, Bangyin Liu, Member, IEEE, Shanxu Duan, and Ling Jiang, Student Member, IEEE

Abstract—This paper proposes an active low-frequency ripple control device (ALFRCD) based on virtual capacitor concept for building-integrated photovoltaic (BIPV) systems. With this method, the power quality of the BIPV system can be enhanced, and the lifetime and reliability are superior by reducing electrolytic capacitors. The low-frequency ripple current caused by the single-phase inverter can be compensated promptly by introducing a current integrator instead of unit feedback in the control strategy of the ALFRCD. With this current integrator, the device is unable to output dc current, which is similar to the function of a capacitor. Compared with the conventional method with highpass filter, the presented method can achieve better compensation efficiency at most of the low frequencies and the response speed is superior as well. In addition, only one more integrator is needed in the control loop, which indicates the conciseness of the method. The performance is analyzed and the design algorithm is introduced in detail. Simulations and experimental results verified the proposed method’s reliability and superiority in comparison with the method with high-pass filter and a proportional–integral controller. Index Terms—Low-frequency ripple control, power quality, single-phase inverter, virtual capacitor. Fig. 1.

I. INTRODUCTION ICROGRID [1], which is desired to coexist with the existing grid can improve its capacity, reliability, and functionalities [2]. However, considerations on high-efficiency renewable energy applications and critical/sensitive loads demand are calling for high-quality electricity [3]–[5]. The photovoltaic dc building module (PV-DCBM) based building-integrated photovoltaic (BIPV) system [6], which is shown in Fig. 1, is a typical configuration of dc microgrid. It is an efficient and cost-effective power configuration for building integrated application due to some significant advantages over conventional power configurations, such as individual MPPT for every PV module, inherent

M

Manuscript received January 28, 2013; revised April 3, 2013 and June 5, 2013; accepted June 10, 2013. Date of current version October 15, 2013. This work was supported in part by the National Natural Science Foundation of China under Project 50907027, in part by the Fundamental Research Funds for the Central Universities under Project 2012QN203, and in part by the National Basic Research Program (973 Program) of China under Project 2010CB227206. Recommended for publication by Associate Editor K. Ngo. The authors are with the College of Electrical and Electronic Engineering, Huazhong University of Science and Technology (HUST), Wuhan 430074, China (e-mail: [email protected]; [email protected]; [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TPEL.2013.2271247

PV-DCBM-based BIPV system.

and low cost data monitor and excellent expandability. Meanwhile, the BIPV system will become much more complex and many power quality problems such as voltage rise and protection problem may be introduced with such many photovoltaic units [7]–[9]. Among these problems and crises, the ripple in the dc bus caused by the single-phase inverters is desired to be kept to a minimum. This desire comes from both the inverter and the photovoltaic modules supplying the dc power. However, the IEEE standards such as [10], [11] reveal that the grid-connected current is anticipated sinusoidal with less than 5% harmonics and in synchronization with the utility grid voltage so as to achieve only active power transmission. In this case, the instantaneous power is fluctuant with bias, which would cause ripple current and ripple voltage with double grid frequency in the dc bus consequentially. In order to restrain this ripple power and decouple the single-phase inverter’s input and output power, the dc bus capacitor could be available, which acts as a buffer and delivers or receives the difference in instantaneous power. Unfortunately, it is also well known that the dc bus capacitance needs to be relatively large (typically ca. 0.5 mF/kW of output power). Unfortunately, the theoretical lifetime of electrolytic capacitances is only about 30 000 h (at high operating temperature) [12]. This is much shorter than the lifetime of photovoltaic modules and semiconductors. Thus, the electrolytic capacitor is an obstacle to the overall long-term reliability of the photovoltaic power generations [12], [13].

0885-8993 © 2013 IEEE

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Recently, many researches have been conducted by either the passive or active compensation approaches to cancel the undesirable voltage and current ripple instead of electrolytic capacitors. An LC series-resonance circuit, whose resonance frequency equals twice the utility frequency, is utilized in [14]. Despite its ripple reduction and convenience, the increase in size and cost of the passive device limits its practical applicability [15]. Furthermore, as reported in [16], the equivalent series resistor in the passive devices may contribute to more power dissipation resulting in a temperature rises and a shortened lifetime of the system. According to the factors mentioned earlier, the active compensation technique gradually takes the place of the passive approach as a better ripple-control method. In general, there are several active low-frequency ripple compensation approaches, which can be classified into two methods. One is the power converter self-controlling method (SCM) [17]–[21], and the other is the current ripple injecting method (CRIM) [15], [22]–[25]. The SCM is taking using of the power converter itself to supply the pulsating power and put the ripple down. In these methods, no extra devices are needful. Thus, the efficiency is guaranteed and the cost is attractive. In spite of the aforementioned advantages, these SCMs are limited by the system framework, which makes them out of common use. When applied to a power system with different topology, the controller needs to be redesigned. Moreover, both the offline tuning of control parameters and the replacement of passive devices make them inconvenient in ripple control. Unlike the SCMs, the CRIMs are using an additional device to afford the pulsating power so as to reduce the ripple. Even though there are several additional devices in the CRIMs that increase cost, the CRIMs are still praised for its mobility and reliability in various applications, since the ripple reduction is executed by the auxiliary equipment. The literatures [22] applied several topologies, such as full-bridge inverter, bidirectional dc–dc converter and bidirectional converter with coupled inductor, to serve as the active low-frequency ripple control device’s (ALFRCD) main circuit and inject harmonic current into the dc bus. Besides the topology, the control method is relative to the performance of ALFRCD, which is also very important for CRIM. As introduced in [24], [25], the performance can help to reach better steady-state control and decrease the ripple voltage and current in the dc bus or the output of PV modules. Consequently, the capacitance requirement could be minimized and thus the system efficiency could be increased. In addition, the dynamic performance is able to improve the system robustness and insensitivity in response to parameter variations and uncertainties [12], [26]. Taking the voltage limit of capacitor in CRIM into account, the capacitance would minimize with better dynamic performance. In consideration of all above, the performance with suitable control method is worthy of discussion for CRIM. The conventional control method for CRIM is to employ a high-pass filter to obtain the ripple component and proportional– integral (PI) controller to inject compensation current [24]. However, the compensation effectiveness and convergent speed are limited by each other. Therefore, a large capacitance is also essential to keep the system steady in the control method that converges slowly. An active power conditioner with neural filter


and slide controller instead of the high-pass filter and PI controller, respectively, is proposed in [15]. The simulations and experiments show that 91% of ripple component of the inverterside current had been reduced within 0.02 s, which verified the superior compensation effectiveness and convergent speed, compared with the conventional method. Unfortunately, the neural filter is complex to accomplish. This paper presents a modified active low-frequency ripple control method based on virtual capacitor. This proposed method is only to join an output current integrator into the current control loop for injecting ripple current into the dc bus. Even though the modified method is simple and practicable, the dc component of the reference can be intercepted directly [26]. With such a virtual capacitor, the filter that limits the performance of the device is not necessary any more and the inverter input current can be treated as the reference of the ALFRCD straightway. The stability, the steady and dynamic performance is evaluated and clarified based on time-domain simulation in the MATLAB/SIMULINK environment and experiments. Experimental results show, the device with virtual capacitor can maintain stability all along despite of disturbance. By designing parameters legitimately, 95% of the dual grid-frequency ripple current can be reduced within approximately 0.01 s, which is much better than the high-pass filter along with PI controller. In addition, the other low-frequency ripple current can also become suppressed with such control method. This paper is organized into five sections. Following the introduction, the low-frequency voltage ripple and current ripple phenomenon in the BIPV system is explained in Section II. In Section III, an active low-frequency ripple control method with virtual capacitor concept is proposed, and the dynamic and steady analyses are presented. In addition, the parameters design is described in detail. Section IV presents the simulations and experimental results with the performance comparisons between the proposed method and conventional methods such as a high-pass filter with PI controller and a PR controller. Finally, certain conclusions are drawn in Section V. II. LOW-FREQUENCY RIPPLE PROPAGATION CHARACTERISTIC In order to transmit power between photovoltaic dc-modulebased BIPV system with the utility grid, a power conversion system is required to generate a 50/60-Hz 120/240-Vrm s ac voltage for stand-alone or grid-connected power uses. Inside this power system, a dc/ac inverter is necessary to produce a desired ac output for the load or the grid, as shown in Fig. 2. While the inverter transmits alternative power, there is a current ripple at twice the ac output frequency appearing on the dc bus, as shown as the inverter input current ii and the dc-bus current ibus in Fig. 2. Considering the line impedance and the equivalent impedance of other devices connected in the dc bus, such current ripple will further react to the dc-bus voltage. Thus, there is 100/120-Hz voltage ripple in the dc-bus voltage as well, as shown in Fig. 2. A. Low-Frequency Ripple Analysis In order to analyze the voltage-ripple and current-ripple phenomenon in the dc bus easily, it is worth consideration to

CAI et al.: AN ACTIVE LOW-FREQUENCY RIPPLE CONTROL METHOD BASED ON THE VIRTUAL CAPACITOR CONCEPT FOR BIPV SYSTEMS

Fig. 2.

Centralized grid-connected inverter in PV-DCBM-based BIPV system.

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is the equivalent impedance of the BIPV system that includes the line impedance and the equivalent impedance of other devices. Since most of the switching ripple current is eliminated by the film capacitor or ceramic capacitor in dc bus whose feature are wonderful and lifetime is much longer than electrolytic capacitor, the switching ripple in the dc bus is not sharp. Therefore, the bus voltage and the inverter input current are mainly dc and 100/120-Hz ripple components. Consequently, the dc-bus voltage can be defined as vbus = V1 + V2 sin (2ωt + ϕ1 ), in which V1 is the dc value and V2 is the 100/120-Hz ripple peak value. The bus current is defined as ibus = I1 + I2 sin (2ωt + ϕ2 ), in which I1 is the dc value and I2 is the 100/120-Hz ripple peak value. The current of the capacitor C is verified as ic = C

dvbus = 2CV2 ω cos (2ωt + ϕ1 ) dt

(2)

where ic is the dc-bus capacitor current and V2 is the100/120-Hz ripple peak value of the dc-bus voltage. The bus current equals the addition of the inverter interface current and the capacitor current, represented as follows: Fig. 3. Simplified circuit of PV-DCBM based BIPV system without highfrequency harmonic.

simplify the BIPV system. On one hand, the dc bus of the BIPV system is kept at certain voltage under normal conditions. Taking the line impedance into account, the solar sources and other devices are represented by an independent voltage source Vin in series with an impedance Zs [27]. On the other hand, in consideration of that the low-frequency ripple is the focal point, the switching ripple caused by the inverter could be ignored because just film capacitor is able to provide the switching ripple power. Assuming the grid voltage is Vg sin(ωt) and the gridconnected current is Ig sin(ωt), thus the output current of the grid-connected inverter is sine wave synchronous with the grid voltage. The instantaneous power flowing through the inverter is Pinv = Vg sin (ωt) × Ig sin (ωt) = = vbus × ibus

Vg Ig [1 − cos (2ωt)] 2 (1)

where Pinv is the instantaneous power of the inverter, ω is the angular frequency of the grid, vbus is the dc-bus voltage, and ibus is the inverter input current. From (1), the output power contains two parts, dc component and 100/120-Hz ripple components. Since the ripple voltage of the dc bus is so small as to be neglected when compared with the dc component(vbus ≈ constant), the input current of the inverter is alternating with bias, and the ripple frequency is double grid frequency from (1). Hence, a 100/120-Hz sinusoidal current source with bias is substituted for the inverter, like Im [1 − sin(2ωt)]. Based on the aforementioned analysis, a simplified circuit for the BIPV system with single-phase inverter is delineated in Fig. 3. In the following sections, the analysis and control of the current ripple are proceeding based on this simplified circuit. In Fig. 3, ibus represents the dc-bus current, vbus is the dc-bus voltage, ii is the inverter input current, C denotes the capacitor used at the dc port of inverter, and ic is the capacitor current. Zs

ibus = I1 + I2 sin (2ωt + ϕ2 ) = ii + ic = Im − Im sin(2ωt) + 2CV2 ω cos(2ωt + ϕ1 ).

(3)

Since (3) is always correct, the dc and ripple components in the left side and those in the other side have to be equal, respectively, written as follows: I1 = Im . I2 sin (2ωt + ϕ2 ) = 2CV2 ω cos(2ωt+ϕ1 )−Im sin(2ωt) (4) Since the grid-connected inverter output current and the grid voltage are both sinusoidal and in-phase, the inverter power Pinv can be reckoned as Pinv = Pm + Pm sin (2ωt) = V1 Im [1 − sin (2ωt)]

(5)

where Pm is the average power the inverter transmits. Based on (3) and (4), the 100/120-Hz ripple components of the bus voltage and current are calculated as ⎧ Pm ⎪ V2 = ⎪ ⎪ ⎪ ⎪ ⎪ V1 1 |Zs |2 + 4C 2 ω 2 ⎨ . (6) ⎪ ⎪ P ⎪ m ⎪ ⎪ I = ⎪ ⎩ 2 V1 1 + 4 |Zs |2 C 2 ω 2 The computing result (6) shows, the ripple components of the bus voltage and current are relevant to the ripple part of the output power, the equivalent series impedance and the capacitor. To restrain the ripple and decouple the inverter and the photovoltaic modules, the conventional passive low-frequency ripple reduction technique is only to increase the capacitor of the bus. The relation between voltage ripple and the capacitor is obtained and shown in Fig. 4 (the solid line). The voltage ripple is manifested by the percentage of the dc-bus voltage ripple with certain capacitor to that without capacitor in dc bus. In order to reduce the ripple, the capacitor has to extend exponentially.

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can fall to 500 V. Therefore, the capacitor inside the ALFRCD should be much smaller than the passive decoupling capacitor Eripple =

Fig. 4. Relationship of the capacitor value and the compensation ratio (the solid line) and the relationship of the current compensation ratio and that of the voltage (the dotted line).

In comparison to the passive power decoupling scheme, the ALFRCD focuses on decreasing the ripple power. Utilizing the compensation circuit to inject the ripple current to the dc bus, the ripple power would be restrained. The relation between the ripple and the compensation effectiveness is linear, which is shown in Fig. 4 (the dotted line). The current ripple is manifested by the percentage of the dc-bus current ripple with ALFRCD to that without ALFRCD in dc bus. Thus, in order to counterbalance the ripple power, the compensation effectiveness of the ALFRCD, which has relation to the counteraction strategy and the controller, is the important target for optimization. The derivation result, like (6), shows that if the grid frequency is 50 Hz, the 100-Hz ripple in dc bus is relative to the 100Hz ripple power that is generated by the 50-Hz ripple current injected into the grid. In a similar way, when there is harmonic current in the grid-connected current, it would refract other lowfrequency ripple in dc bus. For example, the 300-Hz ripple power is occasional when the 250-Hz current (fifth harmonic) and the 350-Hz current (seventh harmonic), which are the result of the deadtime effect [28], [29] is injected into the grid. Subsequently, the dc bus is interfered with 300-Hz ripple. However, comparing with the fundamental current, the harmonic current is little since the total harmonic distortion (THD) is limited to be less than 5%. Hence, the other low-frequency ripple is much less than 100-Hz ripple that is also verified in the literature [15]. B. Capacitor Minimum Method of the ALFRCD No matter where the capacitors are, most of the ripple power has to been expanded by those capacitors in the bus or the ALFRCD. The relation between the capacitor voltage, the ripple power and the capacitor value can be expressed as (7). Without the ALFRCD, the ripple power generated by the inverter is provided by the capacitor in the bus like C. The ripple voltage ought to be limited tiny, so the capacitor has to be large enough. With the ALFRCD, the ripple power is almost provided by the capacitor inside the device, and the energy storage capacitor voltage is able to fluctuate at a wide range (such as 500–800 V), despite that the energy storage capacitor voltage must be larger than the dc-bus voltage so that the high-bridge circuit can work well. The maximum voltage is limited by the capacitor material. In general, the maximum voltage of capacitor can come to 1200 V. The minimum voltage is limited to keep the circuit work normally. If the topology is half-bridge converter, the voltage

1 1 CV 2 − CV 2 = C V¯ ΔV. 2 m ax 2 m in

(7)

From (7), the conclusion can be drawn that the capacitor voltage range expands to minimize the capacitance the ALFRCD needs. However, the dynamic performance is an important element to set the capacitor voltage range. As manifested in (8), in the dynamic process, when the ALFRCD’s convergent time is long, the response time is long if the device’s dynamic performance is not ascendant. Because of this, the energy storage capacitor has to provide or absorb much quantity of electric charge. Thus, the energy storage capacitor voltage rises to a high voltage or falls to a low voltage. In order to limit the capacitor voltage and keep the system steady, the capacitor voltage must to be chosen in a narrow range. Otherwise, less capacitor needs to be employed in the active conditioner whose dynamic performance is superior. Therefore, to improve the ALFRCD’s performance is a predominant method to reduce the capacitor used in the dc bus of the PV-DCBM-based BIPV system

Q = CΔV =

ic dt.

(8)

III. ACTIVE LOW-FREQUENCY RIPPLE CONTROL BASED ON THE VIRTUAL CAPACITOR METHOD In this paper, the ALFRCD constituted with a buck-boost converter and an energy-storage capacitor, is designed to provide an adequate counteraction current into the dc bus to ensure a constant current offered by the PV modules. In Fig. 5, the ALFRCD is connected with the dc bus of the inverter. C is the capacitor on the dc bus and Cs is the energy storage capacitor. Vbus is the dc-bus voltage, and Vc is the dc voltage across the energy storage capacitor that is maintained at a predetermined level higher than the value of the bus voltage via a voltage control loop. Both the switching ripples in Vc and Vbus are ignored. As analyzed in Section II, in the implementation of the ALFRCD for BIPV systems, the stability, the steady performance, and the dynamic performance are all worthy of concerning. In order to keep the system stable, the ALFRCD has to operate smoothly. That device’s steady performance is the major criterion because this feature determines the compensation effectiveness of ripple power. The less the current ripple remains, the lower the bus voltage fluctuates. Meanwhile, the dynamic performance of the ALFRCD is also very important to keep the dc bus stable during the dynamic process such as inverter power mutation or photovoltaic power change. Moreover, the ALFRCD’s dynamic performance makes contribution to capacitor minimum, which is introduced in the previous section. Considering the three criterions mentioned earlier, a novel controller with virtual capacitor is proposed to achieve superior performance, which is able to discard the high-pass or neural filter. The control principle, the stability and the performance are researched in this section.


Fig. 5.

Circuit diagram of BIPV system with the ALFRCD.

Fig. 6.

Circuit diagram of the ALFRCD with cascaded capacitor.

Fig. 7.

Control diagram of the ALFRCD with cascaded capacitor.

Fig. 8.

Control diagram of the ALFRCD based on virtual capacitor.

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A. Control Principle The ALFRCD aims to counteract the ripple part of the inverter input current. In the conventional method, the inverter input current ought to be detected. After removing the dc component by high-pass filter or neural filter, the command of the ALFRCD output current iout is obtained. Unfortunately, even though the high-pass filter is easy to implement, the response speed is unsatisfactory. Contrasting with that, the neural filter could give consideration to both the filtering effectiveness and the response speed, but it is very complex to accomplish. Since the dc component of the inverter input current is undesirable and the filter is difficult to design, the cascaded capacitor in the branch connecting the ALFRCD with the dc bus is an effective and immediate method. Although the current command contains dc component without filter, the ALFRCD with cascaded capacitor is not able to export the dc current. The circuit diagram is shown in Fig. 6. Besides the dc current limitation, from the connection type of the capacitor and the inductor, it can also be concluded that they would conduct resonance at certain frequency domain and provide the resonant current into the dc bus. Therefore, the ripple compensation effect of this method can be as good as that of resonant controller. Since both the dc current suppression and ripple current generation are what the ALFRCD deserves, the method is suitable for this application. The control diagram of ALFRCD with cascaded capacitor is shown in Fig. 7. ii is the inverter input current, iout is the output current of ALFRCD. The blue block represents the controlled plant that includes the half bridge, the inductor, and the actual cascaded capacitor. K means the gain of the half bridge that equals the filter capacitor voltage value Vc , Vbus is the dc-bus voltage, 1/Ls + R indicates the filter inductor with the equivalent

series resistance (ESR). The gray block stands for the actual cascaded capacitor. G(s) is the controller to make the output current iout to follow the reference ii . Although the cascaded capacitor can remove dc current, it has several shortcomings. First, the cascaded capacitor is charged and discharged continually; its lifetime makes it incapable. Second, the capacitor’s characteristic is not ideal and its ESR cannot be overlooked. When the actual capacitor is cascaded in the branch, its power losses reduce the efficiency of the whole system. In addition, the voltage of the capacitor is limited by the material. Therefore, more capacitors are needful if the operating voltage is higher than the maximum voltage of single one. On this condition, draw a current integral loop into the control diagram to replace the cascaded capacitor, which is so called virtual capacitor. The paper [30] applied virtual capacitor to dc–dc converter with LCL output filter for restraining the dc component of the error current. Just like this literature introduced, virtual capacitor is accomplished in control arithmetic and its effect equals ideal capacitor. The control diagram of ALFRCD based on virtual capacitor is shown in Fig. 8. The controlled plant in the blue block contains only the half bridge and the inductor. The capacitor is replaced by an integrator in the control loop, thus no actual capacitor is cascaded in the circuit any more. The gray block stands for the virtual capacitor. Compared with the

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actual capacitor, the virtual capacitor has several advantages: 1) its character is ideal and it does not have ESR that makes contribution to improving the efficiency; 2) its capacitance can be set as arbitrary value, thus it can be suitable for different applications such as 50- and 60-Hz utility grid; and 3) it does not have limit of operating voltage that is of benefit to the system reliability. Even though PI and resonant controller can generate ripple current effectively, it could not remove the dc current. Compared with that, the proposed method can achieve these two functions at the same time by introducing the virtual cascaded capacitor. Furthermore, as shown in Fig. 8, by utilizing the filter inductor for resonance, only one integrator in the control loop is needful to achieve resonant effect. This method can be implemented much easier than resonant controller. In addition, the calculating complexity of this presented method decreases as well, which means control chip at lower cost can be used such as SCM. Ignoring the disturbance Vbus , the open transfer function of the ALFRCD based on virtual capacitor is Iout (s) =

KG(s)Cs Ii (s) LCs2 + RCs + 1

(9)

where Ii is the output current reference of the ALFRCD, which follows the track of the inverter input current, and Iout is the output current of the ALFRCD. There are two parameters to be chosen, which are the value of virtual capacitor and the controller. If choosing PI controller, the control system is not able to absolutely restrain the dc component of the current command. The literature [26] takes use of resonant control along with proportional controller to suppress the disturbance of the utility grid and achieve superior steadystate performance. In the devices such as active power filter and STATCOM, multiple high order harmonic current is in view for power quality optimization [31], [32]. Under these conditions, it would be a good method to apply P and resonant controller since the virtual capacitor and the inductor can only resonant at one frequency domain. However, in the BIPV systems, the ALFRCD is connected in the dc bus whose main component is dc, therefore, its disturbance is inconspicuous. Moreover, most of the ripple current the ALFRCD provides is 100 Hz; hence, proportional controller is selected in the control scheme. Assuming that G(s) = Kp , the closed transfer function is obtained as follows: Iout (s) =

LCs2

KKp Cs Ii (s). + (RC + KKp C) s + 1

(10)

The amplitude response of the closed-loop control system at dc is calculated as Iout (jω) KKp Cjω = = 0. Ii (jω) ω =0 1 − LCω 2 + (RC + KKp C) jω ω =0 (11) From the computation formula mentioned earlier, the conclusion is that the dc component of the current command will be weakened. Since then, the input current of the inverter can be the reference signal and does not need to get through any filter, which makes the ALFRCD easier to implement.

Fig. 9.

Root locus of the ALFRCD with virtual capacitor.

With the virtual capacitor in the control framework, there are two poles and one zero in the transfer function that is displayed in (9). The root locus of the closed transfer function is shown in Fig. 9. Taking a zero at coordinate origin, the system keeps stable no matter how the controller Kp slides. The reliability of ALFRCD is obviously improved. By taking a current integrator into the control loop, which is easy to implement, the ALFRCD can always work smoothly following the power of the inverter no matter what the photovoltaic condition is. Considering the two advantages mentioned earlier, the briefness and nice stability, such method is superior for BIPV applications. B. Steady Analyses The system control diagram is shown in Section III-A. In order to analyze the ALFRCD based on the virtual capacitor, the following assumptions are made in this paper: 1) the conduction and switching losses are as tiny as to be ignored; 2) the control signal and voltages are taken as constant values since the switching frequency is much higher than the system dynamic frequency. In order to achieve the best counteraction, the output current of the ALFRCD based on the virtual capacitor should be synchronous with the ripple component of the input current of the inverter. As analyzed in Section I, the main ripple component of that is 100 Hz. The amplitude response at 100 Hz of the closed-loop control system is KKp Cjω Io (jω) = Io∗ (jω) ω =2π f 1 0 0 1 − LCω 2 + (RC + KKp C) jω

− (RC + KKp C) ω + 1 − LCω 2 j . (12) = KKp Cω (1 − LCω 2 )2 + (RC + KKp C)2 ω 2 From (12), when 1 − LCω 2 = 0 (ω = 628.4 rad/s), the injected current by the ALFRCD and the ripple component of the inverter input current are synchronized. With the designed


Fig. 12.

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ALFRCD based on virtual capacitor: step response time versus K p .

Fig. 10. ALFRCD with virtual capacitor: current compensation effectiveness versus K p .

C. Dynamic Analyses

Fig. 11. Bode diagram with virtual capacitor in the control system of the ALFRCD.

value of the virtual capacitor, the amplitude response of the closed-loop transfer function is Io (jω) C) ω − (RC + KK p KK = Cω p 2 2 I ∗ (jω) (RC + KKp C) ω o ω =2π f 1 0 0 =

KKp . R + KKp

(13)

From (13), the compensation efficacy is relative to the energy storage capacitor voltage K, the parameter of the controller Kp and the equivalent series resistor of the inductor R. Even though (13) shows that the amplitude response must always be smaller than 1, fortunately, the value of the energy capacitor voltage is large while the equivalent series resistor is small, therefore, the amplitude response is close to 1. Assuming that K = 600 and R = 0.2 Ω, the perimeter of Proportional controller varies from 0.0025 to 0.05. The amplitude response is shown in Fig. 10. From this figure, when Kp is larger than 0.01, the ALFRCD is able to counteract 97% at least of the 100-Hz ripple component of the inverter input current. Under the condition that Kp = 0.05, the bode diagram of the closed-loop system is shown in Fig. 11. From Fig. 11, the phase gain is 0◦ at 100 Hz, which means that the ALFRCD with virtual capacitor can achieve zero phase-shift track to 100 Hz. Besides that, the amplitude gain of the closed-loop system at other low frequencies such as 200 Hz, 300 Hz, etc., approaches 1, and the phase shift is small as well. Hence, these low-frequency components can also be tracked and compensated by the ALFRCD with the proposed control method.

The dynamic performance of the ALFRCD is an important factor to preserve the bus stable. The output power of cleanenergy sources goes after the environment condition. When the irradiance increases or the temperature decreases, photovoltaic modules generate more power. Besides that, the fault and switching of loads hanging at the dc bus would deteriorate the stability of the system as well. The ALFRCD, whose dynamic feature is noticeable, is able to restrain the fluctuate power in the dynamic proceed and conduce to the amelioration of the system capacity against disturbance. Assuming that the inverter input current steps at certain time, the response of the ALFRCD based on virtual capacitor in frequency domain is G (s) =

KKp Cs 1 × s LCs2 + (RC + KKp C)s + 1

KKp C + (RC + KKp C)s + 1 1 KKp C 1 = − s − s1 s − s2 (RC + KKp C)2 − 4LC

=

LCs2

(14) where s1 and s2 are the pole points of the closed-loop transfer function. The time-domain response is g (t) =

KKp C (RC + KKp C)2 − 4LC

es 1 t − es 2 t .

(15)

The settling time (limit specified as ±5%) is

2

ln 0.05 + 0.5 ln RC + KKp C − 4LC − ln KKp C . t=

− RC + KKp C + (RC + KKp C)2 − 4LC /2LC

(16) Under the condition that K = 600, R = 0.2 Ω and the parameter of P controller varies from 0.0025 to 0.05. The response time is shown in Fig. 12, which shows that the relation between convergent time and the parameter of controller is approximately linear. If Kp is smaller than 0.05, the convergent time is shorter than 0.12 s. The proposed method leaves the filter, such as high-pass filter, neural filter, out and removes the dc component by a modified controller with virtual capacitor; therefore, the response speed is not limited by filter. Furthermore, the transfer function of the

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Fig. 13. Parameter range of ALFRCD based on virtual capacitor: the gray dashed area.

method based on virtual capacitor contains an additional closedloop zero point that enhances the response speed, as shown in Fig. 9. Hence, with virtual capacitor, the steady performance and dynamic performance of the ALFRCD can be optimized at same time. D. Parameters Design The value of the output filter inductor L is chosen based on two major considerations. The first concern is the regulation of the switching ripple component of the compensation current. As a general rule, the switching ripple ought to be less than 5% of the whole current through the inductor. The other concern is the ESR that causes power loss. Furthermore, as analyzed at Section III-B, when an inductor whose ESR is smaller is used, a better effectiveness can be obtained. Based on these aforementioned considerations, the value of the output filter inductor is chosen as 2 mH in the simulations and experiments. The ESR of the inductor is given 0.2 Ω. As analyzed at Section III-B, in order to make the injected current by the ALFRCD and the ripple component of the inverter input current synchronized, it is reasonable to choose the value of the virtual capacitor C to make 1 − LCω 2 = 0 when ω = 628.4 rad/s. Under this condition, the ALFRCD can achieve best counteraction. Since the output filter inductor L is 2 mH, the value of the virtual capacitor can be obtained as follows: (17) C = 1 Lω 2 = 1.3 mF. As analyzed in Section III-B, the steady effectiveness is relevant to the ESR, the value of the capacitor voltage and the parameter of P controller. Considering that only when the dc-bus voltage is larger than 350 can the dc/ac inverter work regularly, in this paper, the dc-bus voltage is set as 400 V. In order to keep the ALFRCD working well, the energy storage capacitor voltage has to be higher than the bus voltage. Setting the average value of the capacitor voltage as 600 V is reasonable. Based on the aforementioned parameters, the relationship between P controller and the system performance can be confirmed. In order to meet the requirement of steady error and response time, the parameter of P controller Kp has to be kept in a range, the shadow region in Fig. 13. As shown in Fig. 13, the parameter of P controller Kp must be larger than 0.007 to keep the steady error smaller than 0.05. Meanwhile, in order to shorten the response time to 0.06 s,


Kp has to smaller than 0.025. In this paper, the value of the parameter is chosen as 0.01 to give consideration to both steady and dynamic effectiveness. When the value is chosen as 0.01, the steady error is 3.2% and the response time is 0.021 s. According to the basic criterions of 100-Hz ripple current compensation efficiency and response time, the primary parameters of the ALFRCD based on the virtual capacitor can be designed synthetically. Furthermore, the parameters can also be regulated in time for various applications. For example, by adjusting the capacitance of the virtual capacitor, the proposed ALFRCD can adapt to the utility grid frequency variation and keep the performance well persistently. Besides that, as shown in Fig. 13, the control parameter Kp can also be adjusted in accordance with the specificity of different conditions.

IV. SIMULATIONS AND EXPERIMENTAL RESULTS In order to verify the performance of the proposed ALFRCD based on virtual capacitor for BIPV system applications, comparative simulations and experiments with the conventional method are carried out. The parameters in different methods are designed, respectively, for combination property including the steady performance and dynamic performance. The conventional method is employing a high-pass filter to remove the dc component of the inverter input current and taking a PI current controller to inject additional current into the dc bus, which is introduced in [24]. The high-pass filter is chosen based on two major considerations. One is whether most of the 100Hz ripple component of the inverter input current can be remained. The other is the filter’s time constant that limits the ALFRCD’s response speed. Therefore, the cutoff frequency of ωhp = 62.8 rad/s, which is equal to 10 Hz, is chosen via a trialand-error process to achieve an acceptable filter performance. The proposed method based on virtual capacitor that is designed as stated in Section III. The control parameter Kp = 0.01 and the virtual capacitor C = 1.3 mF are chosen to achieve better performance. Moreover, the ripple compensation at 100, 200, 300 and 400-Hz are concerned. The energy storage capacitor Cs is an important unit to maintain the ALFRCD stabilized. As analyzed in Section III, this capacitor is relevant to the compensation current and the range of the energy storage capacitor voltage Vc . The dc-bus voltage ranges from 350 to 450 V. Considering the margin and the maximum voltage of the capacitor Cs , the voltage Vc is set from 500 to 700 V. Furthermore, the nominal power of the inverter is 2.0 kW. The inverter-input current fluctuates from 0 to 10 A, which means that the compensation current varies from −5 to 5 A. According to the ranges of the capacitor voltage and the compensation current, the value of the energy storage capacitor Cs can be determined to be larger than 50 μF. This capacitor is chosen as 100 μF in the simulations and experiments. In the actual prototype, two electrolytic capacitors and several noninductive capacitors are used in the ALFRCD to counteract both the low-frequency and switching-frequency ripple. In addition, 3 μF noninductive capacitors are taken in the dc bus for switching ripple reduction.


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Fig. 14. Simulation of ALFRCD based on virtual capacitor at 2000-W output power: (a) steady-state waveform of inverter input current, dc-bus current, and ALFRCD current; (b) frequency distribution.

A. Simulations All simulations are carried out via MATLAB software to examine the feasibility and effectiveness of the proposed active low-frequency ripple-control method. Fig. 14 shows the simulation results of the inverter input current, dc-bus current and ALFRCD current at 2.0-kW output power. The inverter-side current contains 4.9 A dc component and 3.5 A 100-Hz ripple component. However, a 0.008 A dc component and 3.3 A 100-Hz ripple component are remained in the compensation current for the proposed method. In real operation, the ripple pollution on the bus becomes worse as the output demand of the power generator increases. Therefore, one should control the low-frequency ripple counteraction in an acceptance level even under the situation of load variation. In the following simulation, the ALFRCD is injected at the beginning, and a varied inverter-side current is injected at 0.1 s. Fig. 15 shows the simulation result of the ALFRCD with high-pass filter, that with PIR controller and bandpass filter, and that based on virtual capacitor under load variations. From Fig. 15(a), the high-pass filter alleviates the dc component and produces the compensation current command output with only the low-frequency component when the grid-connected inverter undergoes a load variation from 400 to 2400 W. The low-frequency ripple component of the converter-side current in Fig. 15(a) is controlled under 1 A (peak-to-peak value). Meanwhile, the convergent time of ALFRCD with high-pass filter is more than 0.06 s. Fig. 15(b) shows the dc-bus current with ALFRCD that employs the PIR controller and bandpass filter. The response time is less than 0.02 s, and the ripple is limited

Fig. 15. Comparison of dc bus current with ALFRCD under load variation from 400 to 2400 W in simulation:(a) high-pass filter and PI controller; (b) PIR controller and bandpass filter; (c) virtual capacitor.

under 0.8 A (peak-to-peak value). Comparing with the former methods, the ALFRCD with P controller and virtual capacitor undergoes the same load variation from Fig. 15(c). The lowfrequency ripple component is controlled under 0.5 A (peak-topeak value). The convergent time of ALFRCD based on virtual capacitor is as short as nearly 0.01 s. The comparison of the bus current utilizing the three methods shows that the proposed method can achieve much superior performance. The steady ripple of the proposed method is less than that of the conventional method; meanwhile, the response speed of the proposed method is much higher than the conventional one. B. Experiments Results In order to verify the property of the ALFRCD with the proposed method for BIPV systems and to realize the practical performance in reducing the dc-bus voltage-ripple and currentripple component, a buck–boost converter comprising two IGBTs (IKW15N120) and a 2 mH output filter inductor are built to be the ALFRCD. Two current sensors are taken to detect the inverter input current ii and the ALFRCD output current iout . In the proposed method, ii is used to be the reference of the

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TABLE I PARAMETERS OF THE GRID-CONNECTED INVERTER AND THE ALFRCD

ALFRCD output current iout directly since no filter is necessary. A grid-connected inverter is utilized as a test bed. The parameters of both the centralized grid-connected inverter and the ALFRCD are listed in Table I. In the experiment, the proposed ALFRCD is used to suppress the low-frequency current ripple on the 400 V high-voltage bus and to alleviate the ripple pollution for the input photovoltaic source. The proposed control framework is implemented via a 16-bit microcontroller XE162FN with 55 μs sampling time. The 18-kHz pulsewidth-modulated (PWM) driving signals for the ALFRCD are generated by the microcontroller. Fig. 16 shows the experimental results of the inverter-side current, the compensation current and the dc-bus current at 2.0 kW output power. From Fig. 16(a), the compensation current remains stable and the 100-Hz ripple current is almost synchronized with the 100-Hz ripple component of the inverter-side current (less than 0.5◦ ). The inverter input current and the dcbus current is shown in Fig. 16(b). Comparing with the inverter input current, the dc-bus current approximately keeps constant and there are only a little harmonics. The dc-bus current, the compensation current and the inverter input current in the frequency domain are displayed in Fig. 16(c), including dc, 100, 200, and 300 Hz. The compensation current possesses an accuracy of 94.3% to the 100-Hz ripple component of the inverter input current, and only a 0.2% dc component is remained. The dc-bus current contains 4.9 A dc component and 0.2 A 100-Hz ripple component. In addition, the 200 and 300Hz ripple components are all decreased as well. This experiment demonstrates the superiority of the proposed method based on virtual capacitor in low-frequency ripple current compensation efficiency. In order to investigate the stability of the ALFRCD based on virtual capacitor, two kinds of disturbance is released in the system. One is power variation of the single-phase inverter, and the other is dc-bus voltage variation. The experimental results are displayed in Fig. 17. On one side, when the power of the inverter increases fleetly from 1 to 2 kW, the input current of the inverter changes with it. Under this condition, the ALFRCD

Fig. 16. Experiment results of ALFRCD based on virtual capacitor:(a) inverter input current and ALFRCD output current; (b) inverter input current and dc bus current; (c) frequency distribution.

maintains stable and follows to inject more ripple current for ripple compensation as shown in Fig. 17(a). On the other side, during the dynamic process of dc-bus voltage augment from 360 to 420 V, the ALFRCD sustains working and still provides the low-frequency ripple current. After 10 ms, the ALFRCD completes the dynamic adjustment and reaches the steady state as before. Fig. 18 shows the experiment results of the ALFRCD with high-pass filter, that with PR controller, and that based on virtual capacitor under load variations. On one hand, as can be seen from Fig. 18(a), with the conventional ALFRCD, the lowfrequency ripple component of the dc bus current is controlled under 1 A (peak-to-peak value) when the inverter undergoes a load variation from 400 to 2400 W. But the convergent time of this ALFRCD with high-pass filter is more than 0.05 s. On the other hand, from Fig. 18(c), the ALFRCD with proportional controller and virtual capacitor undergoes the same load variation. The low-frequency ripple component is controlled under 0.5 A (peak-to-peak value). The convergent time of ALFRCD based on virtual capacitor is as short as nearly 0.02 s. Thus,


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Fig. 17. Stability test of the ALFRCD based on virtual capacitor with disturbance: (a) power variation of the single-phase inverter; (b) dc-bus voltage variation in the BIPV system.

the dynamic performance of the proposed ALFRCD is much more advantageous than the conventional one. Moreover, comparing the results of ALFRCD with PR controller in Fig. 18(b) and that based on virtual capacitor, their dynamic response with load variation is similar. The low-frequency ripple component is controlled under 1 A (peak-to-peak value) with PIR controller and bandpass filter (low cutoff frequency is 10-Hz, high cutoff frequency is 1000-Hz). Even though the theoretical analysis in Section III manifests the similarity of these two methods, the steady compensation effectiveness with PIR controller is limited by the computing performance of the low-cost SCM. In short, the experiment results and performance index manifests the advancement of the proposed method. The experiment results agree with the simulation. Ninety-five percent of the lowfrequency ripple component of the inverter input current can be reduced within 0.02 s by the proposed ALFRCD. V. CONCLUSION This paper has successfully developed an active lowfrequency ripple control method based on the virtual capacitor concept. The ALFRCD is an effective and feasible method for reducing the low-frequency voltage and current ripple in the dc bus and improving the lifetime and reliability of the PV-DCBM-based BIPV system. The analysis of low-frequency voltage-ripple and current-ripple phenomenon in BIPV system demonstrates that the voltage ripple suppression and the requisite capacitor are relevant to ALFRCD’s steady performance and dynamic performance. ALFRCD with virtual capacitor concept

Fig. 18. Experimental waveform of dc bus current with ALFRCD under load variation from 400 to 2400 W: (a) high-pass filter and PI controller; (b) PIR controller and bandpass filter; (c) virtual capacitor.

is to introduce an integrator into the control loop to inject the ripple current into the dc bus and restrain the dc component of the current reference. With virtual capacitor, filter in the detection process is not essential any more. The stability, steady, and dynamic performances have been analyzed, respectively, in detail. Comparing with the conventional method, the proposed method can achieve the ripple control at wide range of low frequency so that its compensation efficacy is better. Furthermore, the outstanding dynamic performance contributes to the minimization of electrolytic capacitors. In addition, the parameters are designed considering both the steady and dynamic requirements. At last, the superior performance of the proposed method over the conventional one with high-pass filter and PI controller is verified by performance indexes through simulations and experimental results. According to the measured figures and data, the proposed method based on virtual capacitor can always keep working despite of the power disturbance and voltage disturbance. The device with the proposed method is able to reduce

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95% of the 100-Hz low-frequency ripple current and the response time is less than 0.02 s.

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[22] W. Rong-Jong and L. Chun-Yu, “Development of active low-frequency current ripple control for clean-energy power conditioner,” in Proc. 5th IEEE Conf. Ind. Electron. Appl., 2010, pp. 695–700. [23] A. C. Kyritsis, N. P. Papanicolaou, and E. C. Tatakis, “A novel parallel active filter for current pulsation smoothing on single stage grid-connected AC-PV modules,” in Proc. Eur. Conf. Power Electron. Appl., 2007, pp. 1– 10. [24] L. Palma, “An active power filter for low frequency ripple current reduction in fuel cell applications,” in Proc. Int. Symp. Power Electron. Electr. Drives Autom. Motion, 2010, pp. 1308–1313. [25] S. K. Mazumder, R. K. Burra, and K. Acharya, “A Ripple-Mitigating and energy-efficient fuel cell power-conditioning system,” IEEE Trans. Power Electron., vol. 22, no. 4, pp. 1437–1452, Jul. 2007. [26] X. Guo, W. Wu, H. Gu, and G. San, “DC injection control for gridconnected inverters based on virtual capacitor concept,” in Proc. Int. Conf. Electr. Machines Syst. (ICEMS), 2008, pp. 2327–2330. [27] T. Ghanbari and E. Farjah, “Unidirectional fault current limiter: An efficient interface between the microgrid and main network,” IEEE Trans. Power Syst., vol. PP, no. 99, pp. 1–1, May 2012. [28] A. Khaligh, J. R. Wells, P. L. Chapman, and P. T. Krein, “Dead-Time distortion in generalized selective harmonic control,” IEEE Trans. Power Electron., vol. 23, no. 3, pp. 1511–1517, May 2008. [29] M. A. Herran, J. R. Fischer, S. A. Gonzalez, M. G. Judewicz, and D. O. Carrica, “Adaptive dead-time compensation for grid-connected PWM inverters of single-stage PV systems,” IEEE Trans. Power Electron., vol. 28, no. 6, pp. 2816–2825, Jun. 2013. [30] P. A. Dahono, “A control method for DC-DC converter that has an LCL output filter based on new virtual capacitor and resistor concepts,” in Proc. IEEE 35th Annu. Power Electron. Spec. Conf. (PESC 2004), vol. 1, pp. 36–42. [31] R. L. de Araujo Ribeiro, C. C. de Azevedo, and R. M. de Sousa, “A robust adaptive control strategy of active power filters for power factor correction, harmonic compensation, and balancing of nonlinear loads,” IEEE Trans. Power Electron., vol. 27, no. 2, pp. 718–730, Feb. 2012. [32] B. Singh and S. R. Arya, “Adaptive theory-based improved linear sinusoidal tracer control algorithm for DSTATCOM,” IEEE Trans. Power Electron., vol. 28, no. 8, pp. 3768–3778, Aug. 2013.

Wen Cai (S’12) received the B.S. and M.S. degrees in electrical engineering from the Huazhong University of Science and Technology (HUST), Wuhan, China, in 2010 and 2013, respectively. He will start pursuing the Ph.D. degree at the University of Texas at Dallas, USA, in the fall of 2013. In 2009, he joined in Infineon Joint Training Lab, HUST. His research interests include renewable energy applications, multiport converter, and power quality optimization of dc microgrid.

Bangyin Liu (M’10) received the B.S., M.S., and Ph.D. degrees in electrical engineering from the Huazhong University of Science and Technology, Wuhan, China, in 2001, 2004, and 2008, respectively. From 2008 to 2010, he was a Postdoctoral Research Fellow with the Department of Control Science and Engineering, HUST, where he is currently an Assistant Professor with the School of Electrical and Electronics Engineering. His current research interests include renewable energy applications, softswitching converters, and power electronics applied to power system.


Shanxu Duan received the B.Eng., M. Eng., and Ph.D. degrees in electrical engineering from the Huazhong University of Science and Technology, Wuhan, China, in 1991, 1994, and 1999, respectively. Since 1991, he has been a Faculty Member in the College of Electrical and Electronics Engineering, Huazhong University of Science and Technology, where he is currently a Professor. His current research interests include stabilization, nonlinear control with application to power electronic circuits and systems, fully digitalized control techniques for power electronics apparatus and systems, and optimal control theory and corresponding application techniques for high-frequency pulsewidth-modulation power converters. Dr. Duan is a Senior Member of the Chinese Society of Electrical Engineering and a Council Member of the Chinese Power Electronics Society. He was chosen as one of the New Century Excellent Talents by the Ministry of Education of China, in 2007, and received the honor of “Delta Scholar” in 2009.

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Ling Jiang (S’13) was born in Hunan Province, China, on March 10, 1989. She received the B.S. degree in electrical engineering in 2011 from the Huazhong University of Science and Technology, Wuhan, China, where she has been working toward the Master’s degree. Her current research interests include renewable energy applications, multiport converter, and microgrid operation and control.