An Improved Coordinated Control Strategy for PV System ... - MDPI

energies Article

An Improved Coordinated Control Strategy for PV System Integration with VSC-MVDC Technology Yanbo Che 1, *, Wenxun Li 1 , Xialin Li 1 , Jinhuan Zhou 1 , Shengnan Li 2 and Xinze Xi 2 1 2

*

Key Laboratory of Smart Grid of Ministry of Education, Tianjin University, Tianjin 300072, China; [email protected] (W.L.); [email protected] (X.L.); [email protected] (J.Z.) Electric Power Research Institute of Yunnan Power Grid Co. Ltd., Kunming 650217, China; [email protected] (S.L.); [email protected] (X.X.) Correspondence: [email protected]; Tel.: +86-138-2067-2692

Academic Editor: Tapas Mallick Received: 14 September 2017; Accepted: 18 October 2017; Published: 22 October 2017

Abstract: The rapid development of renewable energy calls for feasible and reliable technologies to transmit and integrate power into grids. Voltage Source Converter (VSC)- Direct Current (DC) technology is considered as a promising solution for its independent control of active and reactive power. Modeling and coordinated control of a large-scale concentrating photovoltaic integration system with VSC-MVDC (Voltage Source Converter-Medium Voltage Direct Current) technology have been investigated in this paper. The average controlled-source model of PhotoVoltaic (PV) integration system is firstly established. Then, a novel control strategy without fast communication is proposed to improve the reliability of the coordinated control system. An extra voltage loop is added to the basic control block, which is able to assure stable operation of the PV system in various conditions. Finally, the proposed control strategy is verified with simulation results. Keywords: coordinated control strategy; MVDC (Medium Voltage Direct Current); PV (PhotoVoltaic); VSC (Voltage Source Converter)

1. Introduction The combination of Voltage Source Converter (VSC) and Direct Current (DC) transmission technology has attracted the interests of researchers and power grid operators recently. DC transmission system has lower loss and higher capacity than the Alternating Current (AC) system. Although the investment cost of converter station in DC transmission system is much higher than in an AC transmission system, the advantages of the DC transmission system are superior to AC transmission system when the transmission distance is long enough [1]. As the majority of equipment in existing power grids is AC generators and AC loads, converters are needed among AC and DC system. Another role of converters in DC system is to connect and transmit power between different DC voltage levels, just like transformers in AC system. Current Source Converter (CSC) and VSC are two basic types of converters widely used in AC/DC systems. Thyristor-valves are usually used in CSC, which relies on AC system to achieve commutation. It is also known as Line Commutated Converter (LCC). VSC adopts fully controlled power electronic devices as basic switches, which shows superiority in rapid and independent control of active and reactive power and ability to feed weak AC system with less risk of commutation failures over LCC [2,3]. Given the advantages, VSC-DC technology is regarded as a solution to bulk power transmission over long distances and offshore renewable energy integration. Many VSC-DC based projects have been built around the world in order to integrate offshore wind energy [4], connect asynchronous AC systems, and power offshore platforms [5].

Energies 2017, 10, 1670; doi:10.3390/en10101670

www.mdpi.com/journal/energies

Energies 2017, 10, 1670

2 of 14

Solar energy is one kind of clean and renewable energy, which has been significantly developed in the past decades. There are two patterns of PV generations. The first pattern is dispersed installation with Low Voltage (LV) integration and local consumption, and the second one is large-scale centralized installation with Medium/High Voltage (MV/HV) integration and remote consumption [6]. Because of the fluctuations of solar energy, VSC-MVDC/HVDC system with rapid power flow control characteristic is usually employed when large-scale PV system is integrating into grids. This paper investigates a large-scale concentrating PV system integrated into a power grid with VSC-MVDC (Medium Voltage DC) technology. The power generated by PV arrays is allocated by DC/DC converter, transmitted to load center with MVDC bus, and integrated to AC system with DC/AC converter. There are lots of power electronic devices in VSC-MVDC system. Time domain simulation is very time consuming with the detailed device-level model. Average modeling is an effective method to simplify model complexity so as to accelerate simulation [7]. Simulation time can be significantly reduced while keeping the same controller structure. It is time-efficient to use the average model when a system-level control is under investigation, in which the dynamic behavior of equipment is not the priority. DC voltage is an important indicator of system stability in DC networks. As there are multiple DC voltage buses in the PV-MVDC system, voltages at different DC buses should be controlled coordinately to assure stable and safe operation of the system. An improved coordinated control scheme with a higher system reliability is proposed in this paper, which can keep DC voltages stable under normal operation and power limit conditions without reliance on the fast communication system. The average controlled-source models of converters in PV system are employed to investigate the effectiveness of this control scheme. Time domain simulation results in MATLAB/Simulink indicate the superiority of the proposed control scheme by comparison with the basic conventional control scheme. 2. System Topology and Model Figure 1 shows the system configuration of a PV integration system. A number of PV panels are connected in series and parallel into a PV array to generate the desired voltage and current. An isolated DC/DC converter is used to step up the voltage. To achieve Maximum Power Point Tracking (MPPT), a boost converter is connected between PV array and isolated DC/DC converter. The MVDC bus allocates the solar power and transmits it to a DC/AC converter to feed AC power system. When two more converters are connected to an MVDC bus, a Multi-Terminal DC (MTDC) system is formed. In Figure 1, the number of full-bridge isolated DC/DC converters connected to MVDC bus is M, and the number of boost converters connected to isolated DC/DC converter bus is N. The DC voltage at MVDC bus is Udc0 , the DC voltage and current at primary side of ith full-bridge isolated DC/DC converter is Udci and Idci , and the DC voltage and current at primary side of ijth boost converter is Udcij and Idcij . In the following contents, a subsystem composed of the ijth PV array, the ijth boost converter, the ith full-bridge isolated DC/DC converter, the DC/AC converter, and the AC system is selected for analysis and explanations (i = 1, . . . , M, j = 1, . . . , N). 2.1. PV Panel and Boost Converter Figure 2 shows the characteristics of PV array and its widely used single diode equivalent circuit model, a combination of an ideal current source sensitive to sunlight, a diode in parallel connection, a parallel resistance Rp , and a series resistance Rs [8]. The relationship between output voltage (Upv ) and current (Ipv ) of PV panel is shown as follows.  I pv = I ph − I0

  q(U pv + Rs · I pv ) U pv + Rs · I pv exp −1 − Ns · k · T · A Rp 

(1)

where Iph is the PV current, I0 is saturation current, q is the electron charge (1.60217646 × 10−19 C), Ns is the number of PV cells in series, k is the Boltzmann constant (1.3806503 × 10−23 J/K), T (in Kelvin) is the temperature, and A is the diode ideality constant.

PV Array iN

AC

...

...

UdciN

Boost Converter iN

...

UdcM1 PV1670 Energies 2017, Energies 2017, 10, 10, 1670

3 of 14 3 of 15

Boost Converter M1

Array M1

UdcM

...

...

UdcMj

Udc11 Boost

PV Array MjPV

Isolated DCDC M

Converter Mj Boost

...

Converter 11

PV PV Array MN

Udc1

...

Udc1j

...

...

Array U11dcMN

Boost Boost Converter MN

Array 1j

Isolated DCDC 1

Converter 1j

...

...

Udc1N

Boost Figure 1. PhotoVoltaic (PV) integration system with VSC-MVDC technology. Converter 1N

...

PV Array 1N

Udci1

2.1. PV Panel and Boost PV Converter Boost Array i1

MMC Converter

Converter i1

Udc0

AC system

...

...

Udcij Udci Figure 2 shows the characteristics of PV array and its widely MVDC DC used single diode equivalent circuit PV Boost Isolated bus Array of ij an ideal Converter current ij DCDC i model, a combination source sensitive to sunlight, a diode~in parallel connection, AC UdciN a parallel resistance R p, and a series resistance Rs [8]. The relationship between output voltage (Upv) PV Boost Array iN iN and current (Ipv) of PV panel Converter is shown as follows.

...

...

...

UdcM1 PV Array M1

(1)

...

...

  q(U pv  Rs  I pv )    U pv  Rs  I pv Boost  I pv Converter  I ph M1  I 0 exp    1  Rp UdcMj U dcM  N s  k  T  A   

PV Array Mj

Boost Converter Mj

...

...

Isolated DCDC M

−19 C), Ns is where Iph is the PV current, UdcMNI0 is saturation current, q is the electron charge (1.60217646 × 10 PV in series, Boost k is the Boltzmann constant (1.3806503 × 10−23 J/K), T (in Kelvin) is the number of PV cells Array MN Converter MN the temperature, and A is the diode ideality constant.

Figure 1. PhotoVoltaic(PV) (PV)integration integration system technology. Figure 1. PhotoVoltaic systemwith withVSC-MVDC VSC-MVDC technology.

PPV and Boost Converter 2.1. PV Panel IPV

IPV PPV

Rs

Ipv

Figure 2 shows the characteristics of PV array and its widely used single diode equivalent circuit + Iph model, a combination of an ideal current source sensitive to sunlight, a diode in parallel connection, a parallel resistance Rp, and a series resistance Rs [8]. The relationship between (Upv) Upv Rp output voltage and current (Ipv) of PV panel is shown as follows. I d

I pv  I ph (a)

  q(U pv  Rs  I pv )    U pv  Rs  I pv   I 0 exp  UPV   1  Rp   Ns  k  T  A    

-

(1)

(b)

where Iph is the PV current, I0 is saturation current, q is the electron charge (1.60217646 × 10−19 C), Ns is Figure 2. (a) PV array characteristic; (b) PV array model. the number of PV cells in series, k is the Boltzmann constant (1.3806503 × 10−23 J/K), T (in Kelvin) is Figure 2. (a) PV array characteristic; (b) PV array model. the temperature, and A is the diode ideality constant.

As shown in Figure 2a, there is a Maximum Power Point (MPP) in the power-voltage curve of PV panel. To improve the efficiency of PV panel, a boost converter is used to achieve MPPT. Boost As shown in Figure 2a, there is a Maximum Power Point (MPP) in the power-voltage curve of converterPPV acts as an impedance adjuster by changing duty-cycle of the control signal to match PV IPV panel, a boost converter isRused Ipv achieve MPPT. Boost s PV panel. To improve the efficiency of PV to panel andIPVload impedance under different PPV atmospheric conditions. So far, several MPPT algorithms converter acts asproposed an impedance adjuster bythey changing duty-cycle ofgroups, the control signal to match PV have been in the literature, and are categorized into five including tracking + Iph techniques with constant parameters, withatmospheric measurement and comparison, and error, withalgorithms panel and load impedance under different conditions. Sowith far,trial several MPPT mathematical calculation, and with intelligent prediction [9]. U R p have been proposed in the literature, and they are categorized into five groups,pv including tracking Incremental conductance method is used in [10]. MPP is Ireached when dPpv /dUpv equals to d zero, which can be located by comparing the instantaneous conductance (Ipv /Upv ) to the incremental UPV conductance (∆Ipv /∆Upv ), i.e., (a)

(b)

dPpv d(U pv · I pv ) dI pv = = I pv + U pv dU pv dU pv dU pv Figure 2. (a) PV array characteristic; (b) PV array model.

(2)

As shown in Figure 2a, there is a Maximum Power Point (MPP) in the power-voltage curve of PV panel. To improve the efficiency of PV panel, a boost converter is used to achieve MPPT. Boost converter acts as an impedance adjuster by changing duty-cycle of the control signal to match PV panel and load impedance under different atmospheric conditions. So far, several MPPT algorithms

mathematical calculation, and with intelligent prediction [9]. Incremental conductance method is used in [10]. MPP is reached when dPpv/dUpv equals to zero, which can be located by comparing the instantaneous conductance (Ipv/Upv) to the incremental conductance (∆Ipv/∆Upv), i.e., dPpv

Energies 2017, 10, 1670

dU pv



d (U pv  I pv ) dU pv

 I pv  U pv

dI pv

4 of 14

(2)

dU pv

The The average average model model of of the the boost boost converter converter is is shown shown in in Figure Figure 3b, 3b, in in which which aa controlled controlled current current source and a controlled voltage source are used to replace the complex semiconductor source and a controlled voltage source are used to replace the complex semiconductor switches. switches. The The voltage ) satisfies satisfies voltage across across semiconductor semiconductor switch switch SS (U (Uao ao) 
 T·s Ts 0 0 t t∈ 00,, DD ij ij   = U ao   UboU bo t t∈ D ij · Ts , (1 − Dij ) · Ts Dij  Ts , (1  Dij )  Ts  (

Uao

(3) (3)

where Dijij is is the the duty duty cycle, cycle, and and TTssisisthe theperiod periodof ofthe thecarrier. carrier. where U Ubo bo is the output voltage, D b

b +

+ Idcij

Idcij

L

a

+ Udcij

S

+ Udcij

Uao -

-

-

a

Ib Ia + Uao -

Ubo

+ C

L

C

-

Ubo

o

o

(a)

(b)

PWM Udcij Idcij

MPPT

Udcij_ref +

Idcij_ref

PI

+

D

PI

(c)

Figure topology; (b)(b) Average model of boost converter; and, (c) Controller design Figure 3.3.(a) (a)Boost Boostconverter converter topology; Average model of boost converter; and, (c) Controller of boostofconverter. design boost converter.

boost converter. converter. So the Power balance formula is the tie of the input side and output side of a boost current of of the the controlled controlled current current source source (I(Ibb) is expressed expressed as as current

U ao · IIa U ao a IbI b= U bo Ubo

(4) (4)

where IIa is the current of the controlled voltage source. The reference direction of these measurements where a is the current of the controlled voltage source. The reference direction of these measurements is shown in Figure 3b. 3b. is shown in Figure The controller controller of of the the boost boost converter converter is is shown shown in Figure 3c. 3c. The The in Figure The reference reference voltage voltage of of PV PV array, array, U dcij_ref, is offered by MPPT controller. The outer voltage controller generates reference current (Idcij_ref) Udcij_ref , is offered by MPPT controller. The outer voltage controller generates reference current (Idcij_ref ) for the the inner inner current current controller, controller, and and the the inner inner current current controller controller produces produces duty duty cycle cycle of of the the control control for signal (D (Dij)) for for the the semiconductor semiconductor switches. switches. For model, the duty cycle cycle D Dij needs needs to to be be signal For the the detailed detailed model, the duty ij ij transformed into trigger pulses by PWM (Pulse Width Modulation) block. For the average model, U transformed into trigger pulses by PWM (Pulse Width Modulation) block. For the average model, Uaoao is controlled controlled by by D Dij according according to to function function (3). (3). is ij 2.2. Full-Bridge Full-Bridge Isolated Isolated DC/DC DC/DC Converter Converter 2.2. Full-bridgeisolated isolatedDC/DC DC/DC converter converter is is used used to to step step up up voltage voltage so so as as to to match match MVDC MVDC bus bus [11,12]. [11,12]. Full-bridge The fully-controlled H-bridge is used to invert DC voltage to AC voltage, the high-frequency The fully-controlled H-bridge is used to invert DC voltage to AC voltage, the high-frequency transformer is used to provide galvanic isolation and step up voltage, and uncontrolled H-bridge is used to rectify AC voltage to DC voltage, as shown in Figure 4. Semiconductor switches S1 and S4 are controlled by identical gating signal, so do S2 and S3. A pair of gating signal shifted by 180◦ in phase with the duty-cycle greater than 50% is sent to S1 (S4) and S2 (S3). There is an overlap of gating signals of S1 (S4) and S2 (S3), as shown in Figure 5 (t1~t2 and t3~t4). During this interval, all four switches are inducted

transformer is used to provide galvanic isolation and step up voltage, and uncontrolled H-bridge is transformer is used to provide galvanic isolation andin step up voltage, and uncontrolled H-bridge is used to rectify AC voltage to DC voltage, as shown Figure 4. Semiconductor switches S1 and S4 used to rectify by ACidentical voltage to DC voltage, asdo shown in Figure 4. Semiconductor are controlled gating signal, so S2 and S3. A pair of gating signalswitches shifted S1 by and 180°S4 in are controlled by identical gating signal, so do S2 and S3. A pair of gating signal shifted by 180° in phase with the duty-cycle greater than 50% is sent to S1 (S4) and S2 (S3). There is an overlap of gating Energies 2017, 10, 5 of 14 phase the1670 duty-cycle 50% sent to5S1 (S4) and (S3). During There isthis an overlap gating signalswith of S1 (S4) and S2 greater (S3), as than shown inisFigure (t1~t2 and S2 t3~t4). interval,ofall four signals of S1 (S4) and S2 (S3), as shown in Figure 5 (t1~t2 and t3~t4). During this interval, all four switches are inducted on, and energy is stored in inductor L. During t0~t1 (or t2~t3), S2, and S3 (or switches areare inducted on, and and the energy is stored in inductor L. of During t0~t1 (or t2~t3), S2, and S3 (or S1 and turned voltage at the primary side (u cd) is boosted. on, and S4) energy is storedoff, in inductor L. During t0~t1 (or t2~t3), S2, transformer and S3 (or S1Tand S4) are turned off, S1 and S4) are turned off, and the voltage at the primary side of transformer T (ucd) is boosted. and the voltage at the primary side of transformer T (ucd ) is boosted. Idci L Idci L +

a aS1

S3

S1

S3

T

c

+ Udci

T

c

Udci -

Co

d

S2

S4 d

S2 b

S4

Idci

L

+ Idci

L

U+dci

Co

Udci -

T c Ia ic c + T + ucd IaUabic + + ucd U-ab db d b a

a

Co Co

b

(a) (a)

(b) (b)

PWM PWM Idci Idci

Udci Udci-

Idci_ref PI Idci_ref+-

Udci_ref Udci_ref -+

PI

+

+

PI PI

D D

(c) (c)

Figure 4. (a) Full-bridge isolated Direct Current (DC)/DC converter topology; (b) Average model of Figure 4. (a) Full-bridge isolated Direct Current (DC)/DC converter topology; (b) Average Figure 4. (a)isolated Full-bridge isolated Direct Current converter (b) Average of full-bridge DC/DC converter; and, (c)(DC)/DC Controller design topology; of full-bridge isolatedmodel DC/DC model of full-bridge isolated DC/DC converter; and, (c) Controller design of full-bridge isolated full-bridge converter. isolated DC/DC converter; and, (c) Controller design of full-bridge isolated DC/DC DC/DC converter. converter. Ts Ts Gate Signal Gate Gate Signal Signal S2、S3 Gate Signal S2、S3

DTs DTs

S1、S4

S1、S4

S1、S4

S1、S4 S2、S3 S2、S3

Uab Uab Ia Ia ucd ucd ic ic

t0 t0

t1 t1

t2 t2

t3 t3

t4 t4

Figure 5. Steady-state operating waveforms of full-bridge isolated DC/DC converter. Figure 5. Steady-state operating waveforms of full-bridge isolated DC/DC converter. Figure 5. Steady-state operating waveforms of full-bridge isolated DC/DC converter.

The Thecurrent currentof oftransformer transformerTTatatprimary primaryside side(i(ic )c)isisgiven givenby by The current  of transformer T at primary side (ic) is given by t1,) t2or or[t3, t3,t4t4] (t3  t2) = (t1  t0) = (1- Di )Ts t 0∈ [t1t,t2  0  t  t1, t2  or t3, t4 (t3  (t2) t3 − t2)= − t0 = (1 − Di ) Ts 0  = (t1 t0)(t1 = (1D)i1)T s ic = (5) Ia ic  t I∈ t0,) t1 (5) a [t0t,t1  ( t2 − t1 ) = ( t4 − t3 ) = ( Di − 21 ) Ts (t2  t1) = (t4  t3) = ( D  − I ic  tI∈ t  t0, t1 i 1 )Ts   (5) a  I [t2, t3 ) a (t2  t1) = (t4  t3) = ( Di - 2)Ts  I a t  t2, t3  2  a t  t2, t3  where whereIaIa isisthe thecurrent currentof ofthe thecontrolled controlledvoltage voltagesource sourceand andDDi iisisthe theduty dutycycle. cycle. where Ia is the current ofaathe controlled source and Di isaccording the duty cycle. The voltage across and b,b,UUabab,, is expressed as to The voltage across and isvoltage expressed as follows, follows, according to the the principle principle of of power power The voltage across a and b, U ab , is expressed as follows, according to the principle of power conservation. conservation.The Thereference referencedirection directionof ofthese thesemeasurements measurementsisisshown shownininFigure Figure4b. 4b. conservation. The reference direction of these measurements is shown in Figure 4b. u · ic Uab = cd (6) Ia The controller of full-bridge isolated DC/DC converter is shown in Figure 4c, which is similar to the controller of the boost converter in Figure 3c.

ab

Ia

The controller of full-bridge isolated DC/DC converter is shown in Figure 4c, which is similar to the controller of the boost converter in Figure 3c. Energies 2017, 10, 1670

6 of 14

2.3. DC/AC Converter 2.3. DC/AC Converter Converter (MMC) is preferred in high power applications for its small Modular Multilevel Modular high Multilevel Converter is preferred in high power applications small converter footprint, ac-side current(MMC) quality, and robustness through the use for of its redundant subconverter footprint, high ac-side current quality, and robustness through the use of redundant modules [13]. Neglecting the complex process of semiconductor switches, the average model of MMC sub-modules [13]. Neglecting the complex process of semiconductor switches, the average model of is established, as shown in Figure 6b. MMC is established, as shown in Figure 6b. d

L

L

L

L

L

L

SM1

SM1

ua ub uc

+

a

Ude

-

d

b

Ude

c

-

Id

ia

L/2

ib

L/2

+

SMN

+

SMN

+

SMN

-

SM1

-

SM1

-

SM1

+

ic L/2

a

SM1

b c

e SMN

e

SMN

SMN

(a)

(b)

PWM P P* + Udc Udc* +

PI

Id

PI

I q* +

+

PI

+

L

-

Iq

Q Q* +

Ud

I d* +

L

-

Vd

- Vq

PI

dq

ua,ub,uc abc

Uq +

(c) Figure 6. (a) DC/Alternating Current (AC) topology; (b) Average model of DC/AC; and, (c) Controller

Figure 6.design (a) DC/Alternating Current (AC) topology; (b) Average model of DC/AC; and, (c) Controller of DC/AC converter. design of DC/AC converter. The controlled voltage source voltage uj (j = a, b, c) is given by

The controlled voltage source voltage uj (j = a, b, c) is given by u j = u j_ref

j = a, b, c

u j  u j _ ref j  a,b,c

(7)

where uj_ref is the reference voltage offered by the inner current controller. at DC side (I as follows, also according to the principle of where uj_ref isThe thecurrent reference voltage offered by the inner current controller. d ) is expressed power conservation. The current at DC side (Id) is expressed as follows, also according to ∑ uj · ij Id = j = a, b, c (8) principle of power conservation. Ude

(7) the



where Ude is the voltage of MMC at DC side. u j  i j I d is shown inj Figure  a,b,c6c. To facilitate controller design, the (8) The controller of DC/AC converter U de three-phase voltage and current at Point of Common Coupling (PCC) are transformed into dq frame. selecting different outer controller, DC/AC can operate in Udc -Q mode or P-Q mode. The inner where UBy de is the voltage of MMC at DC side. current controller adopts PI controller with current decoupled compensation and voltage feed-forward The controller of DC/AC converter is shown in Figure 6c. To facilitate controller design, the compensation to compute the reference voltage at converter-side.

three-phase voltage and current at Point of Common Coupling (PCC) are transformed into dq frame. By selecting different outer controller, DC/AC can operate in Udc-Q mode or P-Q mode. The inner current controller adopts PI controller with current decoupled compensation and voltage feedforward compensation to compute the reference voltage at converter-side.

Energies 2017, 10, 1670 Energies 2017, 10, 1670

7 of 14 7 of 15

Energies 2017, 10, 1670

7 of 15

2.4. AC System 2.4. AC System 2.4. AC System AC system simplified ideal three phase voltage source with specified Short Circuit AC system is is simplified as as anan ideal three phase voltage source with thethe specified Short Circuit Level (SCL), ,isas shown Figure N defined as AC system simplified as an ideal phaseas voltage source with the specified Short Circuit Level (SCL), SNS,Nas shown inin Figure 7. 7. SNSthree isisdefined Level (SCL), SN, as shown in Figure 7. SN is defined as 2 U S  U2 s SN =N U2s2s f  L (9)(9) S N  2π f · L (9) 2 f  L where Us and f are the Root Mean Square (RMS) voltage and frequency of three-phase voltage source where Us and f are the Root Mean Square (RMS) voltage and frequency of three-phase voltage source where s andLf is arethe theinductance Root Meanof Square (RMS) voltage and frequency of three-phase voltage source at PCC,Uand the internal impedance. at PCC, and L is the inductance of the internal impedance. at PCC, and L is the inductance of the internal impedance. -

usb

-

usc

-

+

usa

+

usb

+

a

usa

+ -

L a L

usc

a

a

b L

b

+ -

L

b b

c

c (a)

c L

(a)

L

(b)

+-

c

(b)

Figure 7. (a) AC grid; (b) Equivalent model of AC grid. Figure7.7. AC grid; Equivalent model of grid. AC grid. Figure (a)(a) AC grid; (b)(b) Equivalent model of AC

3. 3. Coordinated Strategy of PV Integration System Coordinated Control Strategy PV Integration System 3. CoordinatedControl Control Strategy ofof PV Integration System 3.1. Conventional Control Scheme of PV Integration System 3.1. Conventional Conventional Control Integration System 3.1. ControlScheme SchemeofofPVPV Integration System In In system-level control with the conventional method (blue(blue line inline Figure 8), the 8), master converter, system-level method in Figure system-level control controlwith withthe theconventional conventional method (blue line in Figurethe 8), master the master namely DC/AC converter, operates in U -Q mode and is responsible for controlling the stability dc converter, namely DC/AC converter, operates in U dc -Q mode and is responsible for controlling the the converter, namely DC/AC converter, operates in Udc-Q mode and is responsible for controlling of stability MVDC bus voltage (U ). The ith full-bridge isolated DC/DC converter controls the voltage dc0 dc0dc0 ). ).The ithith full-bridge isolated DC/DC converter controls the atthe stability of of MVDC MVDC bus busvoltage voltage(U(U The full-bridge isolated DC/DC converter controls itsvoltage lower side (U ). The ijth boost converter controls the voltage at solar panels (U ) to achieve dci side (Udci). The ijth boost converter controls the voltage at solar panels dcij (Udcij) to voltage at at its its lower lower side (Udci). The ijth boost converter controls the voltage at solar panels (Udcij) to MPPT. This method ensures DC buses voltage stability in normal states. However, thethe MVDC bus achieve MPPT. This method ensures DC buses voltage stability in normal states. However, achieve MPPT. This method ensures DC buses voltage stability in normal states. However,MVDC the MVDC voltage is controlled only by thebyDC/AC converter, which is vulnerable forfor thethe safe operation bus voltage is controlled only the DC/AC converter, which is vulnerable safe operationofofthe bus voltage is controlled only by the DC/AC converter, which is vulnerable for the safe operation of system. PV panels operate at MPP to generate maximum power in normal states. However, if ifthe the system. PV panels operate at MPP to generate maximum power in normal states. However, theAC the system. PV panels operate at MPP to generate maximum power in normal states. However, if the system cannotcannot consume so much (e.g., a (e.g., fault occurs AC system), the reference DC voltage AC system consume so power much power a fault in occurs in AC system), the reference DC of AC system cannot consume so much power (e.g., a fault occurs in AC system), the reference DC of PV panel needs to be adjusted with the aid of fast communication system, so as tothe reduce PVvoltage panel needs to be adjusted with the aid of fast communication system, so as to reduce power voltage of PV panel needs to be adjusted with the aid of fast communication system, so as to reduce the power PV panels. The MPPT in controller the converter ijth boost converter be blocked output of PVoutput panels.of The MPPT controller the ijth in boost should beshould blocked and boost the power output ofshould PV panels. The MPPT controller in thethe ijth boostreference converter(Ushould be blocked and boost converter be in constant voltage mode with voltage dcij_ref ) offered converter should be in constant voltage mode with the voltage reference (Udcij_ref ) offered by the and boost converter shoulddelay be in of constant voltage mode with the voltage reference (Udcij_ref)on offered by the control center. communication system has ainfluence negative influence control center. The delayThe of communication system always hasalways a negative on system’s fast by the control center. The delay of communication system always has a negative influence on system’sThe fastcommunication response. The communication system maythe also reducereliability. the system reliability. response. system may also reduce system system’s fast response. The communication system may also reduce the system reliability. PV Array ij

Boost Converter ij

PV Boost Array ijUdcij Converter ij Udci

Udci

Isolated DC/DC i

DC

DC

ijth Boost Converter ijth Controller Boost





Udcij

DC

DC

Udc0

Udc0

DC

AC system

Inverter

AC system

~

DC AC

~ AC

ith Isolated DC/DC ith Controller Isolated

Converter Controller MPPT mode

Udcij_ref

DC/AC Inverter DC/AC

Isolated DC/DC i

MPPT mode

DC/DC Controller U

dci_ref

Udci_ref

AC system power limitation

DC/AC Controller

DC/AC Controller Control Center

Udc0_ref

Fast communication system Adjust the voltage of PV arrays Control Center

Udc0_ref

constant voltage mode

Udcij_ref

AC system power limitation Fast communication system

slow communication signal fast communication signal

The power generated from of PVPV is arrays Adjust the voltage reduced

The power generated from PV is reduced slow communication signal Figure 8. Conventional control scheme of PV integration system. fast communication signal Figure 8. Conventional control scheme of PV integration system.

constant voltage mode

Figure 8. Conventional control scheme of PV integration system.

Energies 2017, 2017, 10, 10, 1670 1670 Energies

of 15 14 88 of

3.2. Improved Control Scheme 3.2. Improved Control Scheme To improve the reliability of the system, we introduce an extra DC voltage control loop into To improve the reliability of the system, we introduce an extra DC voltage control loop into DC/DC controllers, as shown in Figure 9, with the red line. DC/DC controllers, as shown in Figure 9, with the red line. The improved controller designs of the ijth boost converter and the ith full-bridge isolated The improved controller designs of the ijth boost converter and the ith full-bridge isolated DC/DC DC/DC converter are depicted in Figure 10, and the extra loop is highlighted in red. A dead band is converter are depicted in Figure 10, and the extra loop is highlighted in red. A dead band is added to added to the extra voltage controller to disable the extra loop in normal states. ΔUij and ΔUi are the the extra voltage controller to disable the extra loop in normal states. ∆Uij and ∆Ui are the dead bands dead bands of the ijth boost converter and the ith full-bridge isolated DC/DC converter, respectively. of the ijth boost converter and the ith full-bridge isolated DC/DC converter, respectively. Signal S is Signal S is a global enable signal of extra loops. When the system starts up, the extra loops should be a global enable signal of extra loops. When the system starts up, the extra loops should be blocked by blocked by setting S to false. When S is set to be logic one, the effectiveness of the extra loops is setting S to false. When S is set to be logic one, the effectiveness of the extra loops is dependent on dependent on the measured voltage of the extra loops. Only the basic conventional control scheme the measured voltage of the extra loops. Only the basic conventional control scheme takes effect if takes effect if the extra measured DC voltage is in the range of the dead band. In Figure 10a, EijMPPT the extra measured DC voltage is in the range of the dead band. In Figure 10a, EijMPPT and Eij are the and Eij are the enable signal of the MPPT controller and the original outer voltage loop controller in enable signal of the MPPT controller and the original outer voltage loop controller in the ijth boost the ijth boost converter, respectively. In Figure 10b, Ei is the enable signal of the original outer voltage converter, respectively. In Figure 10b, Ei is the enable signal of the original outer voltage loop controller loop controller in the ith full-bridge isolated DC/DC converter. in the ith full-bridge isolated DC/DC converter. PV Array ij

Boost Converter ij

Udci

Udcij

DC/AC Inverter

Isolated DC/DC i

Udc0 DC

AC system

DC

~

DC

AC ijth Boost Converter Controller

ith Isolated DC/DC Controller

AC system power limitation

DC/AC Controller Control Center

MPPT mode

Udci_ref

DC/AC switches to PQ mode

Udc0_ref

slow communication signal

The power generated from PV is reduced

Figure Figure 9. 9. Improved Improved control control scheme scheme of PV integration system.

This improved control scheme can achieve automatic adjustment of PV power according to the indicator DC voltages. When AC system needsautomatic to limit theadjustment power injected the grid, the DC/AC This of improved control scheme can achieve of PVinto power according to the converter will intoWhen P-Q control mode. The voltage, Udc0into , will it indicator of DCswitch voltages. AC system needs toMVDC limit thebus power injected thethen grid,rise. the When DC/AC exceeds the dead band, ΔUP-Q i, Ei control becomes logic The zeroMVDC to disable original blocks (encircled converter will switch into mode. bus the voltage, Udc0control , will then rise. When it with blue line in Figure Udc0 logic will zero be controlled of M control full-bridge isolated DC/DC exceeds thedot dead band, ∆Ui , Ei10b). becomes to disable by the all original blocks (encircled with converters. primary sideUDC voltage of full-bridge isolated DC/DC converters, U dci, will also rise. blue dot lineThe in Figure 10b). will be controlled by all of M full-bridge isolated DC/DC converters. dc0 When it exceeds the dead band, ΔU ij , E ijMPPT , and E ij become logic zero to freeze MPPT controller and The primary side DC voltage of full-bridge isolated DC/DC converters, Udci , will also rise. When it original voltage with blue line in Figure Udci will becontroller regulatedand by all of N exceeds the deadloops band,(encircled ∆Uij , EijMPPT , and Eijdot become logic zero10a). to freeze MPPT original boost converters. DC voltage PV dot panel will from U the to of MPP, and voltage loops (encircled withat blue line in deviate Figure 10a). will be corresponding regulated by all N boost dcivoltage the power generated by PV panel will be reduced automatically. No communication is needed among converters. DC voltage at PV panel will deviate from the voltage corresponding to MPP, and the power converters in PV thispanel process. are automatically. many DC/DC No converters connected to the DC bus, converters the droop generated by willAs be there reduced communication is needed among control strategy should beare adopted DC/DC controllers. Kij and Ki are droop coefficients of in this process. As there many among DC/DC converters connected to the DCthe bus, the droop control the ijth boost converter and the ith full-bridge isolated DC/DC converter, respectively. strategy should be adopted among DC/DC controllers. Kij and Ki are the droop coefficients of the ijth

boost converter and the ith full-bridge isolated DC/DC converter, respectively.

Energies 10, 1670 Energies 2017,2017, 10, 1670

9 of 149 of 15

Udcij Idcij

y

-ΔUij

ΔUij

x

Udcij Udcij_ref -

MPPT

PI +

Eij

EijMPPT Udci

+

PI

+

Abs dead band

Dij

Idcij

-

S

=0?

Kij

+

Udci_ref

(a)

Udci Udci_ref -

y

PI

+

-ΔUi

ΔUi

Di

Idci

-

+

+

PI

Ei

x Abs

=0?

S

Udc0

dead band

-

Ki

+

Udc0_ref

(b)

Figure 10. (a) Improved controller design of boost converter ij; (b) Improved controller design of

Figure 10. (a) Improved controller design full-bridge isolated DC/DC converter i. of boost converter ij; (b) Improved controller design of fullbridge isolated DC/DC converter i. 4. Simulation and Results

4. Simulation and Results The average-value model of PV system, as shown in Figure 11, is established in MATLAB/Simulink to verify the effectiveness of the proposed control groups of 500 kWp in The average-value model of PV system, as shown instrategy. FigureTen11, is established PV panels are connected to tenthe boost converters, respectively. Four isolated DC/DC converters MATLAB/Simulink to verify effectiveness of the proposed control strategy. Ten are groups connected to an MVDC bus. The power generated by PV panels is integrated into AC grid with one of 500 kWp PV panels are connected to ten boost converters, respectively. Four isolated DC/DC DC/AC converter. The parameters of the modeled system are listed in Table 1. converters are connected to an MVDC bus. The power generated by PV panels is integrated into AC grid with one DC/AC converter.Table The 1.parameters ofthe theModeled modeled system are listed in Table 1. Parameters of System. Devices

Table 1. Parameters of Parameters the Modeled System.

Devices PV panel PVBoost panel converter Full-Bridge Isolated DC/DC converter

Boost converter DC/AC converter

Full-Bridge Isolated DC/DC AC system converter

DC/AC converter AC system

open circuit voltage short circuit current Parameters maximum power point voltage open circuit voltage maximum power ratedcircuit power current short rated voltage at primary side maximum power point voltage rated voltage at secondary side maximum rated powerpower rated voltage at primary rated powerside rated voltage at secondary side rated voltage at primary side rated power rated voltage at secondary side rated dc voltage rated ac voltage rated power SCL rated rated voltage at primary side ac voltage

rated voltage at secondary side rated power rated dc voltage rated ac voltage SCL

Values 1050 V 1270 A Values 835 V 500 kW 1050 V 500 kW 1270 A 1 kV 835 V 2 kV 500 kW 1 MW/1.5 MW 2 kV 500 kW 60 kV 1 kV 5 MVA 2 kV 60 kV 35 kV 1 MW/1.5 MW 500 MVA 2 kV 35 kV

60 kV 5 MVA 60 kV 35 kV 500 MVA

Energies 2017, 10, 1670

10 of 15

Energies 2017, 10, 1670

10 of 14

The extra voltage loop controllers and MPPT controllers are not effective during 0~6 s (i.e., only basic controller are effective). For this duration, boost converter regulates the voltage at PV panel at The extra voltage loop controllers and MPPT controllers are not effective during 0~6 s (i.e., only 1.035 kV, full-bridge isolated DC/DC converter regulates the voltage at the primary side of isolated basic controller are effective). For this duration, boost converter regulates the voltage at PV panel at DC/DC converter at 2 kV, and DC/AC converter is in Udc-Q mode and regulates MVDC bus voltage 1.035 kV, full-bridge isolated DC/DC converter regulates the voltage at the primary side of isolated at 60DC/DC kV. converter at 2 kV, and DC/AC converter is in U -Q mode and regulates MVDC bus voltage dc

at 60 kV. PV 11 Udc11 Boost 11

Udc1

PV 12 Udc12 Boost 12

PV 21 Udc21 Boost 21

1MW Udc2

PV 22 Udc22 Boost 22

PV 31 Udc31 Boost 31

Isolated DC/DC 1

Udc0

DC/AC

AC system

5MVA

Isolated DC/DC 2 1MW

Udc3

Isolated DC/DC 3

PV 32 Udc32 Boost 32 1.5MW PV 33 Udc33 Boost 33 PV 41 Udc41 Boost 41

Udc4

Isolated DC/DC 4

PV 42 Udc42 Boost 42 1.5MW PV 43 Udc43 Boost 43 Figure 11. The PV integration system model in MATLAB/Simulink.

Figure 11. The PV integration system model in MATLAB/Simulink.

extra voltage loop controllerand andMPPT MPPT controller controller are at at 6 s.6 Boost converter adjusts The The extra voltage loop controller areenabled enabled s. Boost converter adjusts the voltage at PV panel dynamically to achieve MPPT. The maximum power injected to AC grid is the voltage at PV panel dynamically to achieve MPPT. The maximum power injected to AC grid is about 4 MW, and DC voltages are kept stable in this process. about 4 MW, and DC voltages are kept stable in this process. DC/AC converter switches into P-Q control mode at 15 s. The power injected to AC grid is DC/ACtoconverter intoneeds P-Qmore control mode at 15 s.power The support, power injected to AC grid is limited 2.5 MW. Atswitches 18 s, AC grid active and reactive 3 MW active power, limited 2.5 MW. At power 18 s, AC grid needs more active and reactive power support, 3 MW active andto 1 MVA reactive are offered from PV system. power, and 1 MVA reactive power are offered from system. The waveform of MVDC bus (Udc0 ) and power PV injected into AC grid (Pac and Qac ) are depicted The waveform bus dc0)during and power intoinjected AC grid (PAC ac and Qis ac)smoothly are depicted in Figure 12. Udc0ofisMVDC regulated at (U 1 pu 0~15 s.injected The power into grid increased maximum poweratabout during 6~10 s. When DC/AC converter switches P-Q in Figure 12. to Udc0 is regulated 1 pu4MW during 0~15 s. The power injected into AC grid into is smoothly mode at 15 s, U will rise and it is a signal to reduce the power generated from PV system. increased to maximum power about 4MW during 6~10 s. When DC/AC converter switches into P-Q dc0 Thes,enable signal primary voltage control the of full-bridge isolated DC/DC converter mode at 15 Udc0 will riseofand it is aside signal to reduce power generated from PV system.1, E1 , is depicted in Figure 13. When Udc0 exceeds the dead band (∆U1 = 0.02 pu), E1 becomes logic zero to disable the primary side DC voltage control of full-bridge isolated DC/DC converter 1. The isolated DC/DC converter 1 is then in control of MVDC bus voltage (Udc0 ). The switchover of the controller occurs at 15.02 s when Udc0 is greater than 1.02 pu. The primary side DC voltage and power waveforms of four isolated DC/DC converters are shown in Figure 14. The DC voltages, Udc1~4 , are regulated by isolated DC/DC converters at 1 pu during 0~6 s. During 6~22 s, DC voltages, Udc1~4 , are controlled by isolated DC/DC converter 1~4 when they are in the range of 0.97~1.03 pu (the dead band is 0.03 pu). They are controlled by boost converters connected with the isolated DC/DC converter, if DC voltage exceeds the dead band.

Energies 2017, 10, 1670

11 of 15

U (pu)

Energies 2017, 10,dc0 1670

Udc0_ref Udc0 11 of 15

Energies 2017, 10, 1670

Udc0(pu)

11 of 14

Udc0_ref Udc0

Pac0(pu)

Pac0(pu) Qac0(pu)

Qac_ref Qac

Qac_ref

Qac0(pu)

Figure 12. DC voltage, active power and reactive power of DC/AC Qac converter.

The enable signal of primary side voltage control of full-bridge isolated DC/DC converter 1, E1, is depicted in Figure 13. When Udc0 exceeds the dead band (ΔU1 = 0.02 pu), E1 becomes logic zero to disable the primary side DC voltage control of full-bridge isolated DC/DC converter 1. The isolated DC/DC converter 1 is then in control of MVDC bus voltage (Udc0). The switchover of the controller DCisvoltage, active power and reactive power of DC/AC converter. occursFigure at 15.0212. sFigure when Udc0 greater than 1.02 pu. DC12. voltage, active power and reactive power of DC/AC converter. The enable signal of primary side voltage control of full-bridge isolated DC/DC converter 1, E1, is depicted in Figure 13. When Udc0 exceeds the dead band (ΔU1 = 0.02 pu), E1 becomes logic zero to disable the primary side DC voltage control of full-bridge isolated DC/DC converter 1. The isolated 1.02pu DC/DC converter 1 is then in control of MVDC bus voltage (Udc0). The switchover of the controller Udc0(pu) occurs at 15.02 s when Udc0 is greater than 1.02 pu.

1.02pu

Udc0(pu)

E1

Energies 2017, 10, 1670

12 of 15

E1 0~6 s. During 6~22 s, DC voltages, Udc1~4, are controlled by isolated DC/DC converter 1~4 when Figure during 13. Figure MVDC voltage andand enable ofthe theoriginal original voltage in isolated DC/DC 13. bus MVDC bus voltage enablesignal signal of voltage loop inloop isolated DC/DC they are in the range of 0.97~1.03 pu (the dead band is 0.03 pu). They are controlled by boost converter 1. converter 1. converters connected with the isolated DC/DC converter, if DC voltage exceeds the dead band. The primary side DC voltage and power waveforms of four isolated DC/DC converters are shown in Figure 14. The DC voltages, Udc1~4, are regulated by isolated DC/DC converters 1.06pu at 1 pu Figure 13. MVDC bus voltage and enable signal of the original voltage loop in isolated DC/DC Udc1 1.08pu Udc2 converter 1.

Udc1~4(pu)

Udc3 Udc4 are The primary side DC voltage and power waveforms of four isolated DC/DC converters shown in Figure 14. The DC voltages, Udc1~4, are regulated by isolated DC/DC converters at 1 pu

Pdc1 Pdc2 Pdc3 Pdc4

Pdc1~4(pu)

Figure 14. DC voltage and power of isolated DC/DC converter 1~4.

Figure 14. DC voltage and power of isolated DC/DC converter 1~ 4.

The enable signal of primary side voltage control, E11, and enable signal of MPPT control, E11MPPT, of boost converter 11 are depicted in Figure 15. The primary side DC voltage and power waveforms of boost converter 11~12 are shown in Figure 16. The extra voltage controller and MPPT controller of boost converter 11 are blocked during 0~6 s. The controller of boost converter 11 regulates the voltage at PV panel 11 (Udc11) at 1.035 pu, which is very close to PV panel’s open circuit voltage (1.05 pu). Extra voltage controller and MPPT controller are unblocked during 6~22 s. The dead band of extra voltage loop in boost converter 11 (ΔU11) is set to be 0.03 pu. As shown in Figure 15, E11 and E11_MPPT are zero during 7.08~7.66 s, and 15.23~22 s, as the secondary side voltage (Udc1) of boost converter 11

Energies 2017, 10, 1670

12 of 14

The enable signal of primary side voltage control, E11 , and enable signal of MPPT control, E11MPPT , of boost converter 11 are depicted in Figure 15. The primary side DC voltage and power waveforms of boost converter 11~12 are shown in Figure 16. The extra voltage controller and MPPT controller of boost converter 11 are blocked during 0~6 s. The controller of boost converter 11 regulates the voltage at PV panel 11 (Udc11 ) at 1.035 pu, which is very close to PV panel’s open circuit voltage (1.05 pu). Extra voltage controller and MPPT controller are unblocked during 6~22 s. The dead band of extra voltage loop in boost converter 11 (∆U11 ) is set to be 0.03 pu. As shown in Figure 15, E11 and E11_MPPT are zero during 7.08~7.66 s, and 15.23~22 s, as the secondary side voltage (Udc1 ) of boost converter 11 exceeds 1.03 pu during these periods. The controller of primary side voltage of boost converter 11 is then disabled, and boost converter 11 begins to regulate Udc1 . Udc1 is stabilized at 1.08 pu during 15~18 s, and at 1.06 pu during 18~22 s. The MPPT controller is also disabled, and PV panels operate at a higher voltage with less power output. As two or three boost converters are connected to one isolated DC/DC converter, and four isolated DC/DC converters are connected to one DC/AC converter, droop control is used among them to avoid control conflicts. After AC/DC converter switches into P-Q control mode, the MVDC bus voltage rises and it is regulated by isolated DC/DC converter 1~4. The DC voltage at the primary side of isolated DC/DC converter will also rise and be regulated by boost converters. The droop parameter of isolated DC/DC converter 1~4 are all set to be 10, so the power change is equally shared among them. So do boost converter 11~12, 21~22, 31~33, and 41~ 43. To compare the performance of the improved control strategy and the conventional control strategy, a comparative study is conducted. The communication latency is assumed to be 20 ms, i.e., when DC/AC needs to limit the power at 15 s, a signal to disable MPPT controller and adjust voltage reference at PV panels is sent to the controller of boost converters at 15.02 s. The voltage reference at PV panels is updated at 18.02 s. The waveform of MVDC bus (Udc0 ) and power injected into AC grid (Pac and Qac ) in two cases are depicted in Figure 17. It is clear that the proposed control strategy has a faster response than the conventional method. Although the DC voltage deviates from 1 pu withEnergies the proposed 2017, 10, 1670control strategy, it is still in safe range to keep the system in stable 13 of 15operation. 1.03pu

Udc1(pu)

1.08pu

1.06pu

0.97pu

t(s)

E11

t(s)

E11MPPT

MPPT controller blocked

t(s) 15. Primary sidevoltage DC voltage and enable signal signal ofoforiginal voltage loop and MPPT in Figure 15.Figure Primary side DC and enable original voltage loop andcontroller MPPT controller in boost converter 11. boost converter 11.

Udc11~12(pu) Udc11 Udc12

E11MPPT

blocked

t(s) Energies 2017, 10,Figure 1670 15. Primary side DC voltage and enable signal of original voltage loop and MPPT controller in

13 of 14

boost converter 11.

Udc11~12(pu) Udc11 Udc12

Energies 2017, 10, 1670

14 of 15

Pdc11~12(pu)

Pdc11 Pdc12voltage when DC/AC needs to limit the power at 15 s, a signal to disable MPPT controller and adjust

reference at PV panels is sent to the controller of boost converters at 15.02 s. The voltage reference at PV panels is updated at 18.02 s. The waveform of MVDC bus (Udc0) and power injected into AC grid (Pac and Qac) in two cases are depicted in Figure 17. It is clear that the proposed control strategy has a faster response than the conventional method. Although the DC voltage deviates from 1 pu with the Figure 16. DC voltage andpower power of boost converter 11~12. 16. DC voltage boost converter 12. proposed controlFigure strategy, it is still in safe and range to keepofthe system in stable11~ operation. As two or three boost converters are connected to one isolated DC/DC converter, and four isolated DC/DC converters are connected to one DC/AC converter, droop control is used among them the proposed control strategy to avoid control conflicts. After AC/DC converter switches into P-Q control mode, the MVDC bus U (pu) dc0 voltage rises and it is regulated by isolated DC/DC converter 1~4. The DC voltage at the primary side thebe conventional strategy of isolated DC/DC converter will also rise and regulated control by boost converters. The droop parameter of isolated DC/DC converter 1~4 are all set to be 10, so the power change is equally shared among them. So do boost converter 11~12, 21~22, 31~33, and 41~43. t(s) To compare the performance of the improved control strategy and the conventional control the conventional control strategy, a comparative study is conducted. The communication latency is assumed to be 20strategy ms, i.e.,

Pac0(pu) the proposed control strategy

t(s)

Qac0(pu)

t(s) Figure Comparison of of the control strategies. Figure 17. 17. Comparison thetwo two control strategies.

5. Conclusions

5. Conclusions

VSC-MVDC technology is a promising solution for solar energy integration. As there are multiple buses with is different voltage levels in PVfor integration system,integration. coordinated control among VSC-MVDCDC technology a promising solution solar energy As there are multiple equipment is necessary to satisfy stable and safe operation of the system. An improved coordinated DC buses with different voltage levels in PV integration system, coordinated control among equipment control scheme without reliance on fast communication is proposed in this paper, in which DC is necessary to satisfy stable and safebyoperation of the system. improved coordinated control voltage is controlled coordinately all of the equipment connectedAn to the DC bus. Average-value scheme without on fast communication is proposed in this paper, in which DC voltage is controlledreliance source model of equipment is established in MATLAB/Simulink software. Time domain results by have effectiveness of the proposed control scheme. It is proved thatcontrolled controlledsimulation coordinately allverified of thethe equipment connected to the DC bus. Average-value the proposed control strategy has a faster response and higher reliability thanTime the conventional source model of equipment is established in MATLAB/Simulink software. domain simulation control strategy.

results have verified the effectiveness of the proposed control scheme. It is proved that the proposed Acknowledgments: This work is sponsored by National Key R & D Program of China No.2016YFB0900200 and control strategy has a faster response and higher reliability than the conventional control strategy. 2016 Science and Technology Project of China Southern Power Grid (CSGTRC-K163001). Author Contributions: Li and Yanbo conceived designed the study; Wenxun Li 2016YFB0900200 and Jinhuan Acknowledgments: This workXialin is sponsored by Che National Keyand R& D Program of China No. and Zhou conducted the simulation; Shengnan and XinzePower Xi analyzed data; and, Wenxun Li and Yanbo Che 2016 Science and Technology Project of China Li Southern Gridthe (CSGTRC-K163001). wrote the paper.

Author Contributions: Xialin Li and Yanbo Che conceived and designed the study; Wenxun Li and Jinhuan Zhou Conflicts of Interest: The authors declare no conflict of interest. conducted the simulation; Shengnan Li and Xinze Xi analyzed the data; and, Wenxun Li and Yanbo Che wrote the paper. Conflicts of Interest: The authors declare no conflict of interest.

Energies 2017, 10, 1670

14 of 14

References 1. 2.

3.

4. 5. 6. 7.

8. 9. 10. 11.

12. 13.

Rudervall, R.; Charpentier, J.; Sharma, R. High voltage direct current (HVDC) transmission systems technology review paper. Energy Week 2000, 2000, 1–19. Alyami, H.; Mohamed, Y. Review and development of MMC employed in VSC-HVDC systems. In Proceedings of the 2017 IEEE 30th Canadian Conference on Electrical and Computer Engineering (CCECE), Windsor, ON, Canada, 30 April–3 May 2017; pp. 1–6. Da Silva, R.; Teodorescu, R.; Rodriguez, P. Power delivery in multiterminal VSC-HVDC transmission system for offshore wind power applications. In Proceedings of the Innovative Smart Grid Technologies Conference Europe (ISGT Europe), Gothenberg, Sweden, 11–13 October 2010; pp. 1–8. Rao, H. Architecture of Nan’ao multi-terminal VSC-HVDC system and its multi-functional control. CSEE J. Power Energy Syst. 2015, 1, 9–18. [CrossRef] Flourentzou, N.; Agelidis, V.G.; Demetriades, G.D. VSC-Based HVDC Power Transmission Systems: An Overview. IEEE Trans. Power Electron. 2009, 24, 592–602. [CrossRef] Ding, M.; Xu, Z.; Wang, W.; Wang, X.; Song, Y.; Chen, D. A review on China’s large-scale PV integration: Progress, challenges and recommendations. Renew. Sust. Energy Rev. 2016, 53, 639–652. [CrossRef] Park, S.M.; Bazzi, A.M.; Park, S.Y.; Chen, W. A time-efficient modeling and simulation strategy for aggregated multiple microinverters in large-scale PV systems. In Proceedings of the 2014 IEEE Applied Power Electronics Conference and Exposition–APEC, Fort Worth, TX, USA, 16–20 March 2014; pp. 2754–2761. Villalva, M.G.; Gazoli, J.R.; Filho, E.R. Comprehensive Approach to Modeling and Simulation of Photovoltaic Arrays. IEEE Trans. Power Electron. 2009, 24, 1198–1208. [CrossRef] Karami, N.; Moubayed, N.; Outbib, R. General review and classification of different MPPT Techniques. Renew. Sust. Energy Rev. 2017, 68, 1–18. [CrossRef] Esram, T.; Chapman, P.L. Comparison of Photovoltaic Array Maximum Power Point Tracking Techniques. IEEE Trans. Energy Convers. 2007, 22, 439–449. [CrossRef] Prasanna, U.R.; Rathore, A.K. Extended Range ZVS Active-Clamped Current-Fed Full-Bridge Isolated DC/DC Converter for Fuel Cell Applications: Analysis, Design, and Experimental Results. IEEE Trans. Ind. Electron. 2013, 60, 2661–2672. Ju, C.; Feng, W.; Wang, H.; Wang, Y.; Xu, H. Design and implement of the photovoltaic DC grid-connected converter based on boost isolated full-bridge topology. Acta Energ. Sol. Sin. 2016, 37, 752–758. Marquardt, R. Modular Multilevel Converter: An universal concept for HVDC-Networks and extended DC-Bus-Applications. In Proceedings of the Power Electronics Conference, Sapporo, Japan, 21–24 June 2010; pp. 502–507. © 2017 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/).