Application of Simulation in Computer Architecture - Google Sites

Application of Simulation in Computer Architecture Brenda Parker

James Edmondson

Computer Science, MTSU

Computer Science, MTSU

Overview ●

Introduction to Computer Architecture

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Assignments

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General Problems

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Our Proposed Solution

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Demonstration of Technology

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Student Benefits

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Student and Teacher Reaction

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Conclusion

Introduction to Computer Architecture ●

4-hour credit course at MTSU

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Required course for all CS majors

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3-hour lecture + 2-hour closed lab Lecture

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Lab

Semester Project –

Build the Relatively Simple Computer (RSC)

Semester Project ●

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Closed and Open Labs –

Introduction to Digital Logic

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Introduction to B2 Spice (digital simulator)

Building the RSC

RAM

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Memory Unit

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Registers

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Arithmetic Logic Unit

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Control Unit

Control

Registers ALU

General Problems –

Students start class with oversimplified concept of hardware CPU

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RAM

Students often can’t visualize the “Big” picture Control Unit Clock

AR

DR

PC

R

IR

Bus

AC

ALU

RAM

General Problems –

(2)

Students can be confused by microcode (d2+d1) t3: DR M, PC PC+1, AR AR+1 (d2+d1) t4: TR DR, DR M, PC PC+1

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Often miss major component interaction errors until end of project

General Problems –

(3)

Most students aren’t very good with byte code 01 0F 00 03 01 0E 00 08 07 00

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Programs tend to be overly simple

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No way to properly debug code before testing

General Problems (4) __________________________ ●

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Motivation Students are NOT interested in the hardware aspects of the computer.

Administrative Problems –

Computer requirements change each semester ●

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Discourages cheating Results in maintenance of several versions of computers

Not easy bringing new lab instructors up to speed

Our Proposed Solution ●

Provide compiler for low level language LDA var1 MOV LDA var2 ADD OUT HALT

; load byte at 0F to accumulator register ; move accumulator to R register ; load byte at 0E to accumulator register ; add R register to accumulator register ; output accumulator register ; halt system compile

01 0F 00 03 01 0E 00 08 07 00

Our Proposed Solution ●

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Provide integrated, visual debugging environment

Provide emulation of an example computer –

Allow stepping by instruction and microinstruction

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Allow viewing of inter-component communication

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Allow macroscopic system views

The Editor and Compiler

The Virtual Machine

The Component View

Demonstration ●

Compilation

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Execution –

Stepping by instruction

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Stepping by microinstruction

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Tracking the virtual machine

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Tracking inter-component events and communication

How the Students Benefit ●

Students can verify correctness of their programs

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Students may write more complicated programs

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Students have a deeper understanding of how the Relatively Simple Computer works Diagnosis of most problems is faster Students can focus more time on getting the custom computer built

Student and Teacher Reaction ●

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Overwhelmingly positive

Sparked some interest in student research and development Encouraged discussion about new tools for students

Students find RSC programming assignments easier and more interesting Students have been completing the end of semester project quicker and with less help from instructors

Conclusion ●

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The RSC Emulator Project has solved some of our Architecture issues The tool is easy-to-use, portable, and user friendly Instructors find the Emulator to be a nice teaching tool

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Students are able to complete semester projects faster

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Students learning has increased (better grades).

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Enjoyment of the course has increased.

For more information Email:

[email protected] [email protected] [email protected] Web site: http://www.mtsu.edu/~csbrenda/EISTA

QUESTIONS?