Arithmetic Addition and Subtraction Function of

2015 IEEE Student Conference on Research and Development (SCOReD)

Arithmetic Addition and Subtraction Function of Logarithmic Number System in Positive Region: An Investigation Siti Zarina Md Naziri1, Rizalafande Che Ismail1, Ali Yeon Md Shakaff2 1

School of Microelectronic Engineering 2 School of Mechatronic Engineering Universiti Malaysia Perlis Arau, Perlis, Malaysia {sitizarina, rizalafande, aliyeon}@unimap.edu.my Abstract— Logarithmic number system or LNS has become an optimal choice in digital image processing instead of floating point (FP) system based on latest researches in LNS. Digital image processing which deals with a lot of complex operations such as multiplication and division, makes LNS as a great choice of implementation. However, the implementation had been restricted by the addition and subtraction function in LNS arithmetic as these functions entail complex procedures and circuitry. As its huge potential to be a substitution of FP, there is an urgent need for LNS to improve the performance of both operations. Hence, various studies had been conducted in this area, however most of the research concern the implementation of these operations in the negative region. Therefore, this study is conducted with the objective on the exploration of both LNS addition and subtraction operations in the positive region and highlights the potential areas for design modifications and improvements. Then, these enhancements will be combined with other arithmetic functions in creating an optimum LNS design to be utilized in any digital image processing system. Keywords— logarithmic number system; arithmetic; addition; subtraction; digital image processing.

I. INTRODUCTION LNS has shown its ability to be another option for DSP designers besides using FP arithmetic, especially in digital image processing. Logarithmic image processing (LIP) in digital image processing had benefited the most by using LNS in most of its concept and implementation [1]. Latest research of LNS in [2] shows that the former number system has delivered better performance over the latter. Similar to FP numbers, a logarithmic number can be written as -1S×2(M•F), with M-bit exponent, F-bit mantissa and one sign bit, S. Meanwhile, a 32-bits signed logarithmic value can be represented in a concatenated version of logarithmic number: {S, M[7:0], F[22:0]}. Unlike multiplication and division operations, the implementation of LNS addition and subtraction is much more complicated as they are represented together with the nonlinear functions as follows: Y = A + B Æ Ly = La + log2(1 + 2(Lb - La))

978-1-4673-9572-4/15/$31.00 ©2015 IEEE

(1)

Y = A – B Æ Ly = La + log2(1 ࡳ 2(Lb - La))

(2)

with variable La, Lb and Ly represent the logarithm values of A, B, and Y, respectively. The difference, Lb – La will be represented by r in the rest of text. These equations have visibly shown that the non-linear aspect, log2(1 ± 2(Lb - La)), in LNS addition and subtraction are the obstacle for LNS to be implemented in wider range of application. Actually, the subtraction operation suffers more difficulties as it caused by singularity-to-zero issue (which refers to the logarithm values of non-linear region). The issue conveys extra cost in memory and precision. Among of the approaches discovered in [3]–[5], which mostly implementing the co-transformation method to the non-linear portion of the addition operation, the co-transformation method for the LNS subtraction operation is found to be a smart approach in overcoming the singularity issue. II. RECENT IMPROVEMENTS IN LNS ARITHMETIC The most significant improvement in LNS arithmetic is the implementation of co-transformation in enhancing the performance of subtraction operation. The history of cotransformation approach commenced in 1995 by Nick Coleman and his team, which later implements the technique in the European Logarithmic Microprocessor (ELM) [6]. ELM is a fabricated prototype logarithmic-based processor, which has a 32-bit co-transformation-based LNS arithmetic logic unit (ALU). This processor had proven that LNS with cotransformation approach could be the best substitution to FP with improved speed, and have been a benchmark for further improvements in LNS design. Co-transformation or ‘range shifter’ in ELM is been implemented in the range of -0.5 < r < 0 of the subtraction function, which replaced the previously used interpolation method for that particular region. The region was clustered into equal bits with smaller LUTs, as presented in Figure 1(a). The implementation of this method, which is known as the firstorder co-transformation technique in the ELM processor had provided apparent reduction for the LUT used in terms of size and complexity, plus the advancements in terms of speed and precision offered for the whole processor system compared to