Atomic-scale silicon etching control using pulsed ...

Atomic-scale silicon etching control using pulsed Cl2 plasma Camille Petit-Etienne, Maxime Darnon, Paul Bodart, Marc Fouchier, Gilles Cunge, Erwine Pargon, Laurent Vallier, and Olivier Joubert CNRS/UJF-Grenoble1/CEA LTM, 17 rue des Martyrs, 38054 Grenoble Cedex 9, France

Samer Banna Applied Materials Inc., 974 E. Arques Avenue, M/S 81312, Sunnyvale, California 94085

(Received 2 July 2012; accepted 5 November 2012; published 27 November 2012) Plasma etching has been a key driver of miniaturization technologies toward smaller and more powerful devices in the semiconductor industry. Thin layers involved in complex stacks of materials are approaching the atomic level. Furthermore, new categories of devices have complex architectures, leading to new challenges in terms of plasma etching. New plasma processes that are capable to etch ultra-thin layers of materials with control at the atomic level are now required. In this paper, the authors demonstrate that Si etching in Cl2 plasma using plasma pulsing is a promising way to decrease the plasma-induced damage of materials. A controlled etch rate of 0.2 nm min1 is reported by pulsing the chlorine plasma at very low duty cycles. Using quasi-insitu angle resolved XPS analyses, they show that the surface of crystalline silicon is less chlorinated, the amorphization of the top crystalline silicon surface is decreased, and the chamber wall are less sputtered in pulsed plasmas compared to continuous wave plasmas. This is attributed to the lower density of radicals, lower ion flux, and lower V-UV flux when the plasma is pulsed. C 2013 American Vacuum Society. [http://dx.doi.org/10.1116/1.4768717] V I. INTRODUCTION For years, microelectronic device performance has steadily increased due to continuous downscaling. To further increase device performance, it is now necessary to introduce new architectures, which often consist of complex stacks of many ultrathin layers of different materials, including metals, dielectrics, and semiconductors. Accomplishing these improvements requires a thorough understanding of the processes needed to coat and etch the materials to be integrated. Plasma etching is the only method known to allow transfer of fine patterns from a mask material to another material with good uniformity and reproducibility and with accurate dimension control. Plasma etching invokes energetic and directional ions to enhance the etching of bombarded areas on the wafer, leading to fast and anisotropic etching. However, for integrating thin layers, those energetic ions may be detrimental, as they can sputter the materials exposed to the plasma, disturb the materials, and induce amorphization of crystalline layers.1 Such damage may be detrimental to device performance and could also prevent the subsequent epitaxial growth of III/V materials on the silicon lattice that would be required for integration of high-mobility channel materials. One potential solution to minimize ion-induced damage is to pulse the plasma, since the average ion energy is expected to be reduced in pulsed conditions compared to continuous wave (CW) mode.2 So far, pulsed plasmas have typically been proposed for increasing selectivity and solving patterning-related issues.3–9 It has been shown that using pulsed plasmas strongly reduces differential charging, which improves pattern transfer by reducing the notch during gate etching.3,8 Okigawa et al. also reported that pulsing the plasma decreases the UV-induced damage in charge-coupled devices (CCD).10 011201-1 J. Vac. Sci. Technol. B 31(1), Jan/Feb 2013

In this paper, we investigate the potential of using pulsed plasmas to control plasma etching at the nanometer scale and to minimize plasma-induced damage. We investigate the simplistic case of silicon etching in a chlorine plasma to better understand the damage mechanisms at the etch front, with the objective of minimizing them. Such a system is of high interest for the semiconductor industry, where chlorine-based plasmas are commonly used for silicon etching. II. EXPERIMENT SETUP The experiments are performed in a 300 mm AdvantEdgeTM ICP (inductively coupled plasma) etch tool from Applied Materials. The ICP reactor chamber wall is made of anodized aluminum. The plasma is excited inductively via two RF coils (13.56 MHz) with a power supply operating up to 3 kW to improve the ion flux uniformity. The wafer can be biased using a power supply operating up to 1.5 kW. Applied Materials has modified its RF system to the PulsyncTM system, which provides full pulsing capabilities in a wide range of frequencies and duty cycles (from a few tens of hertz up to tens of kilohertz and from a few percentages up to continuous wave plasma). More details on the plasma chamber can be found in the literature.11–13 The system is capable of pulsing both source and/or bias independently or in a fully synchronized manner. In this paper, only source pulsing is used and no bias is applied. The etch reactor is equipped with a multiwavelength ellipsometer Uvisel from Jobin Yvon. This phase-modulated ellipsometer enables in situ spectroscopic ellipsometry between 1.5 and 6.2 eV and real-time kinetic measurements using 32 wavelengths with a time resolution of 500 ms. A customized Thermo Electron Theta 300 Angle Resolved X Ray Spectrometer (AR-XPS) is directly

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C 2013 American Vacuum Society V

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011201-2 Petit-Etienne et al.: Atomic-scale silicon etching control using pulsed Cl2 plasma

interfaced to the etch platform via a vacuum transfer chamber. The AR-XPS system is equipped with a high-resolution monochromatic Al Ka x-ray source (1486.6 eV photons). The angle-resolved capability of the Theta 300 is used for all analyses, with eight angles regularly spaced between 23.75 and 76.25 , referred to the normal of the wafer. A genetic algorithm based on the maximum entropy method (provided by Thermo Fisher Scientific) is used to reconstruct depth profiles from angle-resolved XPS data. The fitting procedure assumed that photoelectrons coming from the underlying bulk silicon are detected at a minimum 23.75 emission angle. This allows maximizing the profile information content. Since the overlayer density is unknown after plasma treatment, the depth scale should be interpreted in a qualitative way (i.e., relative comparison from one experiment to the other and no absolute interpretation of the depth range).14 For etch rate measurements, we used wafers with 100 nmthick unintentionally doped polysilicon deposited by rapid thermal chemical vapor deposition at 600  C (typical process for transistor gate) on 50 nm-thick silicon oxide. Indeed, a thin layer of silicon on an under-layer is necessary to define silicon thickness by ellipsometry, and no silicon on insulator (SOI) wafers were available. The etch rate is determined by the slope of the polysilicon thickness versus time, measured by kinetic ellipsometry. Surface characterization is performed on boron-doped (p-type) (100) crystalline silicon with a resistivity of 1–100 X cm. In all cases, a 30 s diluted flurohydric acid (100:1) native oxide removal is performed before plasma exposure. Each experiment is performed on a separate wafer. The reactor operates in seasoned conditions mode. In this mode, the chamber is first cleaned by a SF6/O2 plasma to recover “clean” reactor wall conditions.15 Then, a thin SiO2-like layer is coated on the chamber wall (SiCl4/O2 plasma followed by O2 plasma), and a dummy silicon wafer is etched with the process of interest. Finally, the wafer of interest is etched using the real process. The etch process considered here is a Cl2 plasma at 20 mT, with a source power of 500 W and no bias power (to minimize the ion energy down to the plasma potential, estimated around 15 eV in continuous wave mode). The process is performed in CW mode or in pulsed conditions at various pulsing frequencies and duty cycles (defined as the ratio between the ON time of the plasma and the pulsing period). For XPS measurement, the process time is fixed at 30 s of plasma ON time (i.e., 150 and 300 s of process for 20% and 10% of duty cycle, respectively).

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TABLE I. Etch rate measurement by kinetic ellipsometry on polysilicon during etching in Cl2 plasma. Frequency (Hz)

200 1000 3000 200 1000 5000 1000

Duty cycle (%)

Continuous wave 50 50 50 20 20 20 10

Etch rate (nm/min)

Time compensated etch rate (nm/min)

3.1 6 0.1 1.4 6 0.1 1.6 6 0.1 1.5 6 0.1 0.4 6 0.1 0.5 6 0.1 0.4 6 0.1 0.2 6 0.1

3.1 6 0.1 2.8 6 0.2 3.2 6 0.2 3 6 0.2 2 6 0.5 2.5 6 0.5 2 6 0.5 261

the plasma. However, interestingly, the TCER is always lower than the etch rate in continuous wave mode, and decreases when the duty cycle decreases. By contrast, the pulsing frequency has little impact on the TCER. As shown in Fig. 1, the polysilicon thickness evolution is always a linear function of time, which shows that the polysilicon etch rate is stable and well controlled. In particular, an etch rate of only 0.2 nm/min (close to one atomic layer per minute) can be obtained in a controlled manner. Such a slow etch rate is especially favorable for etching ultrathin layers of material in a controlled way. B. XPS measurements 1. XPS analysis after crystalline silicon etching in CW mode

To quantify the damage caused to crystalline silicon during a typical etching process, a (100) crystalline silicon wafer was exposed to the CW plasma for 30 s and then analyzed quasi in situ by AR-XPS. After exposure to the plasma, the top surface consists mostly of Si with some Cl and O. High-resolution XPS spectra are recorded on the Si2p, Cl2p, and O1s core level regions and are reported in Figs. 2–4, respectively (photoelectron spectra measured at

III. RESULTS A. Etch rate

Polysilicon etch rate measurements under various plasma pulsing conditions are presented in Table I. In this table, we also report the “time compensated etch rate” (TCER), which is the etch rate considering only the ON time of the plasma (i.e., the etch rate divided by the duty cycle). The polysilicon etch rate is 3.1 nm/min in the CW mode. Table I shows that the polysilicon etch rate is significantly decreased by pulsing

FIG. 1. (Color online) Polysilicon thickness measurement by kinetic ellipsometry during etching in Cl2 plasma with continuous wave plasma or with pulsed plasma.

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011201-3 Petit-Etienne et al.: Atomic-scale silicon etching control using pulsed Cl2 plasma

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FIG. 3. (Color online) O1s core level spectra of crystalline silicon surface measured by XPS at 76.25 after 30 s of exposure to Cl2 plasma in continuous wave mode.

FIG. 2. (Color online) Si2p core level spectra (a) and magnification of chlorinated Si signal (b) of crystalline silicon surface measured by XPS at 76.25 after 30 s of exposure to Cl2 plasma in continuous wave mode.

76.25 , near surface angle). The Si2p core level spectrum is decomposed using the procedure described by Bogart et al.16,17 The Si2p1/2 component is removed assuming a spin-orbit splitting of 0.61 eV and an intensity ratio of 0.52. The background is removed using a linear function. The Si2p3/2 peak is decomposed into five contributions (Fig. 2). The major contribution corresponds to bulk silicon (Si-Si in the crystal) at 99.6 eV. The shoulder at higher binding energy is fitted by three peaks with energy shifts of 0.7, 1.8, and 2.8 eV for the Si-Cl, Si-Cl2, and Si-Cl3 contributions, respectively.17 The highest energy peak is attributed to the SiOCl3 environment and is located at 4.1 eV above the major silicon peak. When the take-off angle (with respect to the surface normal) decreases, the Si-Clx and SiOCl3 contributions decrease reflecting that these contributions are mostly located at the uppermost surface. The O1s core level spectrum is located at 533.2 eV and can be fitted using a single peak (Fig. 3). The Cl2p core level spectrum is presented in Fig. 4. The Cl2p1/2 component is removed assuming a spin-orbit splitting of 1.6 eV and an intensity ratio of 0.5. The element presents a major peak at 199.4 eV with a shoulder at higher energy. Such a peak shape can be decomposed into two contributions. However, there are several ways to obtain a math-

ematically correct peak fitting, with different positions and widths for the two peaks. In order to clearly identify the different contributions, several experiments with different plasma conditions have been performed. In all cases, the two contributions of Cl2p are present, but with different relative intensities. By subtracting the Cl2p contribution from two different experiments, it is evident that the Cl2p contains one contribution at 199.4 eV and one contribution at 200.4 eV. A correlation between the peak intensity at 200.4 eV and the O1s peak intensity is observed. As a consequence, those peaks are attributed to Cl-Si and Cl-O-Si, respectively. However, the possibility exists for other bonding configurations for the peak assigned to Cl-O-Si. The XPS peak assignment is consistent with the findings of Chang et al.18 who position the Si-O-Cl peak at 200.3 eV. In the following, the two contributions are systematically fitted by two peaks separated by 1 eV. The spectra decomposition is quite difficult due to the low intensity of the SiClx peaks (particularly for x > 1) and

FIG. 4. (Color online) Cl2p core level spectra of crystalline silicon surface measured by XPS at 76.25 after 30 s of exposure to Cl2 plasma in continuous wave mode.

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the SiOCl3 peak. As a consequence, the quantification error is quite large, leading to a large uncertainty on the degree of chlorination of the uppermost surface. In order to determine the position of the different contributions on the top crystalline silicon surface, depth profile reconstruction has been performed using the maximum entropy method. To obtain the most accurate result, the stoichiometries of the SiCl3, SiCl2, SiCl, and SiOCl3 compounds have been fixed on their different components. As shown in Fig. 5, the top crystalline silicon surface is made of a mixed SiOCl3/SiClx (with x > 1) on crystalline silicon with a mixed SiCl/Si-Si interface. The interfacial layer is gradual and is assumed to result from ion-induced mixing. Several observations can be made from the XPS analyses. (1) Some oxygen is present at the uppermost surface. Since no oxygen is introduced in the plasma chamber and since the crystalline silicon substrate is deoxidized prior to plasma exposure, this oxygen must originate from sputtering (or ionenhanced etching) of the SiO2-covered reactor wall. It is known that traces of oxygen can oxidize SiClx species, leaving oxidized species at the surface.19 The presence of SiOClx species on the wafer thus indicates that the reactor wall is a source of oxygen-containing species, which can partially oxidize the top crystalline silicon surface of the wafer. (2) All the contributions, except for the Si-Si contribution, are localized at the uppermost surface. 2. XPS analysis after crystalline silicon etching in pulsed mode

The same surface characterization has been performed after exposure to pulsed plasmas with 10% duty cycle and 1 kHz pulsing frequency. As shown in Figs. 6–8, the same contributions are observed by XPS after crystalline silicon exposure to a pulsed Cl2 plasma and to a CW Cl2 plasma. However, several major differences between these two cases are noted. (1) The relative amount of SiOCl3, as reflected for example by the oxygen species, is much greater in CW mode (19% at 76.25 ) than in pulsed mode (10% at 76.25 ). 2) The relative amount of chlorine bonded to silicon is

FIG. 5. (Color online) Atomic concentration depth profile of crystalline silicon surface exposed to Cl2 plasma in CW mode.

FIG. 6. (Color online) Si2p core level spectra (a) and magnification of chlorinated Si signal (b) of crystalline silicon surface measured by XPS at 76.25 after 30 s of exposure to Cl2 plasma pulsed at 1 kHz and 10% duty cycle.

greater in pulsed mode (42% at 76.25 ) than in CW mode (34% at 76.25 ). By reconstructing the depth profile using the maximum entropy method (see Fig. 9), we can clarify the differences between the CW and the pulsed plasma etch processes. Indeed, it is clear in Fig. 9 that the relative amount

FIG. 7. (Color online) O1s core level spectra of crystalline silicon surface measured by XPS at 76.25 after 30 s of exposure to Cl2 plasma pulsed at 1 kHz and 10% duty cycle.

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011201-5 Petit-Etienne et al.: Atomic-scale silicon etching control using pulsed Cl2 plasma

FIG. 8. (Color online) Cl2p core level spectra of crystalline silicon surface measured by XPS at 76.25 after 30 s of exposure to Cl2 plasma pulsed at 1 kHz and 10% duty cycle.

of oxygen in the mixed SiOCl3/SiClx (x > 1) layer is lower using pulsed conditions. Furthermore, the SiCl/Si-Si interface is less gradual (i.e., more abrupt) in pulsed mode than in CW mode. From those observations, we draw two preliminary conclusions. (1) Much less oxygen is provided by the reactor wall in pulsed mode, which indicates a lower sputtering rate of the SiO2 wall in pulsed plasma conditions. (2) The damaged depth into the crystalline silicon surface is reduced when pulsing the plasma, which indicates that ioninduced surface mixing is minimized under pulsed plasma conditions. The latter point is also evidenced by the full width at half maximum (FWHM) of the Si-Si peak, this parameter being a direct indication of Si-Si lattice distortion. The Si-Si peak is broader (0.59 6 0.01 eV at midheight) after exposure to the CW plasma than after exposure to the pulsed plasma (0.56 6 0.01 eV at midheight), indicating that the crystalline silicon lattice is less disordered by pulsed plasma exposure. As a comparison, the Si-Si peak FWHM value for the unetched crystalline silicon sample is 0.55 6 0.01 eV. Even if these values are quite small, they indicate that pulsed

FIG. 9. (Color online) Atomic concentration depth profile of crystalline silicon surface exposed to Cl2 plasma pulsed at 1 kHz and 10% duty cycle.

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FIG. 10. (Color online) Atomic concentration depth profile of crystalline silicon surface exposed to Cl2 plasma pulsed at 5 kHz and 20% duty cycle.

plasmas induce less damage to the crystalline silicon lattice than continuous wave plasmas. C. Influence of pulsing parameters

To clarify the impact of the duty cycle on the crystalline silicon surface modification, a crystalline silicon wafer has been exposed to a plasma pulsed at 5 kHz and 20% of duty cycle. The surface analysis by XPS presents the same contribution as previously observed in CW mode and at 1 kHz and 10% of duty cycle. As shown in Fig. 10, the surface is an intermediate case between the CW mode and the 1 kHz 10% mode. This shows that chamber wall sputtering and surface mixing are greater at 20% DC and 5 kHz than at 10% DC and 1 kHz, but remain lower than in the CW mode. Finally, a crystalline silicon wafer was exposed to a pulsed plasma with 10% DC and 5.6 kHz to investigate the impact of the pulsing frequency on the etching process. At 5.6 kHz pulsing frequency and 10% DC, the plasma OFF time (160 ls) is identical to the 20% 5 kHz experiment, and the frequency difference is only 12%. By contrast, the duty

FIG. 11. (Color online) Atomic concentration depth profile of crystalline silicon surface exposed to Cl2 plasma pulsed at 5.6 kHz and 10% duty cycle.

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011201-6 Petit-Etienne et al.: Atomic-scale silicon etching control using pulsed Cl2 plasma

cycle is halved and is similar to the experiment performed at 10% DC and 1 kHz. XPS analyses presented in Fig. 11 show that the top surface is close to the top surface of crystalline silicon exposed to a pulsed plasma at 1 kHz and 10% DC. This shows that the duty cycle is the most important parameter, which is consistent with the etch rate measurements presented in Sec. III A. IV. DISCUSSION In Sec. III, we have shown that polysilicon exposed to a Cl2 plasma without RF bias is etched at a very low etch rate (3.1 nm/min). By pulsing the plasma, the etch rate can be lowered down to 0.2 nm/min, in a controlled and reproducible manner, allowing atomic control of the etch process. The top surface of crystalline silicon exposed to Cl2 plasma is composed of a mixed SiOCl3/SiClx (x > 1) top layer on silicon, with a SiCl interface. The top layer is poorer in SiOCl3 when the plasma is pulsed, particularly at a low duty cycle (10%). The interface is gradual with the plasma in CW mode and steeper in pulsed conditions, particularly at a low duty cycle (10%). The etch rate experiments have been performed on polysilicon, while the surface characterization was performed for crystalline silicon. We expect to have similar trends between crystalline silicon and polysilicon, even if there may be slight differences between the materials. In addition, the plasma induced damage may be invisible on p-Si due to the less organized surface compared to c-Si. A. Etching mechanism

The interaction between Cl2 plasma and silicon has been extensively studied.1,16,17,19–29 It has been shown that the top surface of silicon is quickly covered by a mixed SiClx layer, mostly made of SiCl.1,17,19–22,28–30 This layer is thicker and contains more chlorine when the ion energy increases.21 Some mixing of the upper layer is also induced by ion bombardment and is amplified at higher energies.21,30 The overall etching rate is the sum of the physical sputtering rate, thermal etching rate, and ion-enhanced etching rate.31,32 ERtotal ¼ ERO þ ERS þ ERI:

(1)

The first term ERO stands for the physical sputtering and occurs for ion energies above a threshold energy ETH.32 The threshold energy for Arþ ions is close to 35 eV and close to 16 eV for Clþ.32,33 In our experiments, no bias is applied to the wafer, and the ion energy is defined by the plasma potential and floating potential. Complementary experiments (not presented here) have shown that the difference between the plasma potential and the floating potential is around 15 eV in CW mode. As a consequence, physical sputtering is expected to be low in our plasma conditions. To confirm this hypothesis, we measured polysilicon and PECVD silicon oxide sputtering rates at the floating potential in Ar plasma with the same conditions. This assumes that Arþ flux and energy are in the same order of magnitude as Clþ ions flux and energy in Ar and Cl2 plasmas. No etching could be

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measured after 3 min of etching in Ar plasma on either polysilicon or silicon oxide. This confirms that no sputtering of Si is expected at this energy. It should be noted, though, that some oxygen is sputtered from the reactor wall, since SiOCl3 species can be observed by XPS on the crystalline silicon wafer after the Cl2 process. This difference may originate from differing SiO2 quality between PECVD SiO2 and silicon oxide film coated on the etching chamber wall. Moreover, it is expected that the region of the reactor roof located directly below the inductive coil is bombarded by more energetic ions than the rest of the reactor wall (including the wafer), due to the capacitive coupling of the coil to the plasma. The second term ERS stands for spontaneous (thermal) etching. This term can be expressed by32 Ea

ERS ¼ k0 ekT QCl ;

(2)

where k0 is the pre-exponential factor assumed to be equal32 ˚ s cm2/min, T is the substrate temperature to 2.57.1014 A (regulated to 55  C–328 K), Ea is the activation energy (0.29 eV from Ref. 32), and QCl ¼ 1/4[Cl]vth is the atomic chlorine flux (vth being the thermal velocity of Cl atoms). The Cl atom density [Cl] can be estimated from the reactor pressure, the gas temperature and the Cl2 density measured by using LED-based UV-absorption34,35 (see Table II). Note that the Cl density is mostly controlled by the pulsing duty cycle rather than the pulsing frequency. By calculating qffiffiffiffiffiffiffi 8kT the Cl thermal velocity by vth ¼ p:mg with Tg representing the gas temperature near the wafer (estimated at chamber wall temperature 352 K) and m the neutral mass (35.4 amu for Cl), we can estimate the Cl neutral flux to the wafer, as reported in Table II. The corresponding values of ERS [deduced from Eq. (2)] for the different experiments performed here are reported in Table II, and range from 2.73 nm min1 in continuous wave mode down to 0.13 nm min1 in pulsed conditions at 5 kHz and 10% DC. These values are of the same order of magnitude as the measured ER, indicating that our etch rate measurements agree relatively well with pure chemical etching. The last term ERI stands for ion-enhanced etching and is much more complex to model, as it depends on many factors such as the ion/neutral flux ratio32 and the ion energy. The threshold energy reported in the literature for ion-enhanced etching in Cl2 plasma is 9 eV.36 The impact of pulsing on the ion flux will be discussed in Sec. IV B. In addition to these parameters, surface passivation by redeposition of lowvolatility product may also occur. This may be the case under our experimental conditions since SiOCl3 species are

TABLE II. Radical density, radical flux, and spontaneous etch rate calculated for Cl2 plasma in CW and pulsed modes.

CW 5 kHz 10%

Density (cm3)

Flux (cm2 s1)

Calculated etch rate (nm min1)

4.9  1014 1.2  1014

2.2  1019 5.4  1018

2.73 0.13

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011201-7 Petit-Etienne et al.: Atomic-scale silicon etching control using pulsed Cl2 plasma

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FIG. 13. (Color online) Ion flux measured by planar probe in Cl2 plasma in CW mode and in pulsed mode at 1 kHz with different duty cycles. FIG. 12. (Color online) Optical emission measured in Cl2 plasma in CW mode.

formed at the surface and should slow down the etching process due to their low volatility. Recently, Shin et al.37,38 have also pointed out the role of photon-induced silicon etching in Cl2 plasma, which may be relevant to our experimental conditions. Indeed, Cl2 plasma strongly emits V-UV light between 135 and 140 nm, as shown in the V-UV spectrum presented in Fig. 12. The broad emission bands results from molecular Cl2, while fine peaks come from Cl radicals.39,40 The absorption coefficient41 of Si in this spectral range is 13  105 cm1, allowing us to estimate a depth of penetration of 20 nm for V-UV light, which is much larger than the damaged layer thickness. When the plasma is pulsed, the V-UV flux drops. In addition, because the plasma is more molecular, fewer radicals responsible for V-UV light emission would be available, keeping the V-UV flux lower. However, no measurement has been performed with our experimental conditions to correlate the V-UV flux with etch rate measurements. As a consequence, we can say that photoetching may participate in silicon etching. In this case, plasma pulsing would reduce the etch rate since the V-UV flux decreases. B. Crystalline silicon modification

XPS analyses have shown that the top surface presents a gradual layer when the crystalline silicon is etched in CW mode, whereas the interface is more abrupt in pulsed mode. We have also shown that some SiOCl3 is formed at the surface, the oxygen originating from reactor wall sputtering. The relative amount of SiOCl3 on the wafer is heavily decreased when the plasma is pulsed compared to using CW mode. The surface mixing and the reactor wall sputtering are assumed to originate from ion-induced phenomena. For higher ion energies, the surface is expected to be more mixed, and more sputtering of the chamber wall is expected. In order to estimate the impact of the ions on the surface, ion flux measurements have been performed using a planar probe.42 More details about the measurement setup will be described in another paper.43 In Fig. 13, we observe the positive ion flux to the chamber wall, which is assumed to be

identical to the positive ion flux to the wafer. It is clear that the positive ion flux differs significantly between CW mode and pulsed mode. Indeed, during the ON time of the plasma, the positive ion flux rises, but never reaches the flux of the continuous wave plasma. During the off time, the positive ion flux drops slowly. This behavior can be explained by the high electronegativity of the plasma. The plasma operates at 20 mT and Cl2 is highly electronegative. As a consequence, we expect a very large density of negative ions during the afterglow that would slow down the positive ion loss rate and change the plasma properties compared to CW plasmas.44,45 Thus, the instantaneous ion flux is never as large as the ion flux in CW plasma, and the average ion flux is only 2.5% of the ion flux measured in CW plasma, whereas the plasma is pulsed at 10%. This shows that, contrary to expectations, pulsing the plasma greatly reduces the ion flux. Any ion-induced phenomenon (chamber wall sputtering, ioninduced etching, and surface mixing) would therefore be greatly reduced by pulsing the plasma. In addition, the ion flux composition is expected to be more molecular when the plasma is pulsed. Since the plasma is more recombined (as shown in Table II), less atomic ions are expected and polyatomic ions compose the plasma. The ions’ velocity would then be strongly reduced compared to atomic ions for the same energy. For example, a Clþ ion impinging the surface at 15 eV has a velocity of 9 km s1, while a Cl2þ ion impinging the surface at the same energy has a velocity of only 6.4 km s1, which reduces its penetration depth and the silicon volume in which the energy is dissipated. This phenomenon has already been identified as the main contributor to recess minimization in pulsed HBr/O2-based gate over processes.12 Both the reduced ion flux and increased polyatomic ion formation are considered to be responsible for the lower surface mixing in pulsed plasmas compared to CW plasma. The lower V-UV flux can also participate in mitigating the plasma-induced damage. V. CONCLUSION In this paper, we have investigated etching Si in Cl2 inductive plasma operating in continuous wave mode versus

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011201-8 Petit-Etienne et al.: Atomic-scale silicon etching control using pulsed Cl2 plasma

pulsed mode. The top surface of the crystalline silicon is composed of a mixed SiClx (x > 1)/SiOCl3 layer atop of a mixed SiCl/Si interface. The SiOCl species originate from chamber wall sputtering and inhibit etching during the silicon etching process. The mixed interface results from ioninduced surface mixing. When the plasma is pulsed, the ion flux drops leading to less chamber wall sputtering and less surface mixing. The etching proceeds through a chemical etching assisted by the ion flux. Photons may also participate in silicon etching. Using pulsed plasma conditions, it is possible to control the etching of polysilicon at a very low rate of 0.2 nm min1, while minimizing plasma-induced damage to the wafer and to the chamber wall. These results show promise for plasma etching processes requiring control at the atomic level. ACKNOWLEDGMENTS This work was supported by the French Government program “Investisements d’Avenir” managed by the National Research Agency (ANR) under the contract number ANR10-IQPX-33, by the European EUREKA/CATRENE program in the frame of the CT206 UTTERMOST project and by the Applied Materials University Research Partnership Program. 1

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J. Vac. Sci. Technol. B, Vol. 31, No. 1, Jan/Feb 2013

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