Buffer Memory Optimization for Video Codec Application ... - CiteSeerX

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Buffer Memory Optimization for Video Codec Application Modeled in Simulink Sang-Il Han* **, Xavier Guerin**, Soo-Ik Chae*, Ahmed. A. Jerraya** *Department of Electrical Engineering,

**SLS Group, TIMA Laboratory

Seoul National Univ., Seoul, Korea

Grenoble, France

{sihan,chae}@sdgroup.snu.ac.kr

{xavier.guerin,ahmed.jerraya}@imag.fr performance architectures that can process computation-intensive algorithms for higher resolution images. To design such complex architecture within a short design time, it is necessary to explore design space with high-level system specification and to generate SW and HW code automatically. Therefore, minimizing the buffer memory size in automatic code generation from the highlevel system specification is becoming one of the key technologies in video codec system design. Video codec applications include data-intensive algorithms that require multiple large buffers. Furthermore, the control of the algorithms depends on image modes and macroblock modes [1]. To obtain a SW code with a reasonable size of on-chip memory size from the system specification of a video codec application, it is necessary to use a buffer memory optimization method based on a global and precise analysis of data and control dependency. Most previous work has focused on buffer memory optimization in generating SW code from dataflow specification [2-5]. However, they did not consider control dependency at all because pure dataflow lacks control constructs and the extension with control constructs has the problem of deadlock or buffer overflow [6]. Consequently, they could not be applied directly to the buffer memory minimization problem for video codec applications. In this paper, we address the problem of minimizing the buffer memory size in automatic code generation for a subset of Simulink, which is able to represent explicitly control-dependent algorithms of video codec applications without deadlock or buffer overflow problem [7]. The main contribution of this work is the implementation of buffer memory optimization and automatic code generation for the system specification that includes explicit conditionals. For buffer memory reduction, we applied two techniques: copy removal and buffer sharing. The former eliminates redundant buffers and copy operations, which is introduced by explicit controls and delays. It is performed while parsing the Simulink model. The latter exploits disjoint lifetime of buffers. It requires global scheduling and formal lifetime analysis over the entire system specification. We extended an existing scheduling and buffer sharing algorithm for dataflow specification so that it can handle the conditionals in the Simulink models. This paper includes the measurement and analysis on the effects of the implemented techniques for a H.264 video decoder. The rest of the paper is organized as follows. In Section 2 we describe previous work on automatic SW code generation with reduced buffer memory. We present a target application and the restricted Simulink model for automatic SW code generation in Section 3, and we describe the optimization techniques to reduce buffer memory and memory copy operations in generating C codes in Section 4. We present and analyze several experimental results that show the effect of each optimization technique and

ABSTRACT Reduction of the on-chip memory size is a key issue in video codec system design. Because video codec applications involve complex algorithms that are both data-intensive and controldependent, memory optimization based on global and precise analysis of data and control dependency is required. We generate a memory-efficient C code from a restricted Simulink model, which can represent both data and control dependency explicitly, by applying two buffer memory optimization techniques: copy removal and buffer sharing. Copy removal is performed while parsing the Simulink model. Buffer sharing requires global scheduling and formal lifetime analysis. Experimental results on an H.264 video decoder show that the buffer memory size and execution time of the C code generated by the proposed method are 71% and 32% less than those of the C code produced by Simulink’s C code generator, respectively. When compared to the hand written C code, the memory size was reduced by 27% while its execution time was increased by only 3%.

Categories and Subject Descriptors C.3 [Special-purpose and application-based systems]: Realtime and embedded systems

General Terms: Algorithms, Experimentation Keywords:

memory size reduction, video codec application,

Simulink

1. INTRODUCTION Current video codec applications require architectures with large memory and high bandwidth. Due to its large power consumption and limited bandwidth, accessing off-chip memory has been considered as a major bottleneck in video codec systems. Since a large on-chip memory increases die size and chip cost, it is important to minimize the demand of on-chip memory, where code and data are stored. The data memory contains constant coefficients as well as the buffers for the inputs and outputs of algorithm blocks. In this paper, we focus on buffer memory optimization to reduce the on-chip memory size. The video codec applications also require complex highPermission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. DAC 2006, July 24–28, 2006, San Francisco, California, USA. Copyright 2006 ACM 1-59593-381-6/06/0007…$5.00.

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Figure 2. Simplified Simulink model of an H.264 video.

Figure 1. Block diagram of an H.264 decoder.

codec applications, for automatic SW generation with buffer optimization.

discuss the limitations of the proposed SW automatic codec generation in Section 5.

3. THE SUBSET OF SIMULINK FOR VIDEO CODECS

2. RELATED WORK The design approaches based on dataflow specification [6] are widely adopted in designing DSP applications. Ptolemy [8] and COSSAP [9] are well-known dataflow-based design environments and they provide automatic SW generation facilities from dataflow specification. Several previous works proposed buffer sharing [2][3] and scheduling [4][5] techniques for maximizing buffer sharing in SW generation from dataflow specification. However, they didn’t address buffer memory minimization for SW code from system specification with explicit control. Note that emerging video codec standards such as H.264 and WMV9 adopt more complex data-dependent operations to improve coding efficiency, which requires a distinct technique to generate a SW code with minimal buffer memory. This paper addresses buffer memory minimization problem when generating a SW code from system specification that includes explicit conditionals. The data memory minimization problem for sequential programs is a well-known problem [10][11]. Because it is difficult to analyze a large sequential program to extract global data and control dependencies precisely, the existing techniques generally use conservative analysis especially for pointer-intensive programs and/or programs with complex call dependencies. This conservative analysis generally restricts global optimization. We use a system specification that eases global dependency analysis to minimize the memory size for SW code generation. Pramod et al. addressed a problem of optimizing array storage in MATLAB in [12]. They used an interference graph to represent data dependencies between arrays in a single MATLAB function. They also used a weighted graph coloring to minimize the memory size required to implement the “variables” used in the single MATLAB function. This algorithm shares the same memory space for the arrays only if they have the same intrinsic type. Furthermore, a single MATLAB function may include implicit types that can be resolved with type propagation only through the overall program, so the effect of this optimization algorithm is more limited. In contrast, we resolve implicit type with type propagation and allow overlapping buffers with different intrinsic types. Real-Time Workshop (RTW) [13] takes a Simulink model [14] as an input and generates a C code as its output. Simulink and RTW have been mainly targeted for control-intensive applications where memory optimization is less important. Consequently, RTW does not provide the memory optimization. We define a subset of Simulink model, which is suitable to modeling video

3.1 Video codec applications Our target applications are macroblock-based video codecs, such as, MPEG-2, H.263, MPEG-4, WMV9 and H.264 [1]. These video codecs are based on hybrid coding, which combines interpicture prediction to remove temporal redundancy and transformation of the prediction errors to remove spatial redundancy. We will use an H.264 video decoder as a target application example as shown in Figure 1. It receives an encoded video bit stream from a network or a storage device and produces a sequence of frames by applying iterative executions of macroblock-level functions such as variable length decoding (VLD), inverse zigzag and quantization (IQ), inverse transform (IT), spatial compensation (SC), motion compensation (MC) and deblocking filter (DF). The execution paths of these functions are dependent on their image modes, macroblock modes and bitstream contents. For example, macroblock compensation mode (“intra/inter MB” in Figure 1) determines which of spatial compensation and motion compensation is executed.

3.2 The subset of Simulink for video codecs In order to represent global data and control dependencies precisely, we selected a subset of Simulink for modeling video codec applications. The Simulink subset includes blocks, delays, links, If-action subsystems (IAS), and For-iterator subsystems (FIS) as well as a global clock that controls the execution of blocks and delays. Figure 2 shows a simplified version of an H.264 video decoder we modeled with the Simulink subset. - A block represents a function. There are two kinds of blocks. One is pre-defined block such as addition, logic AND and so on. The other is user-defined block called “S-function”. In Figure 2, “Demux” and “IQ” are pre-defined block and user-defined block, respectively. “Previous Frames” and “Current Frame” are userdefined blocks that represent global memory to store images. Each block has several input and output ports. - A delay Z-k implies that the output is delayed from the input by k clock cycles. In Figure 2, “Z-1” and “Z-W” are examples of delay. - A data link connects one output port of a block or a delay to one or more input ports of one or more blocks and/or delays. A control link connects an output of a block to an input port of an If-action subsystem. In Figure 2, the solid line between “IQ” and

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1: While(1) { 2: F0(cond); 3: F1(Z[0],B); 4: if(cond) { F2(B,C); F3(C,E); } 5: else { F4(B,D); F5(D,E); } 6: F6(E, F); 7: F7(Z[0]); 8: for(i=0;i