15th European Signal Processing Conference (EUSIPCO 2007), Poznan, Poland, September 3-7, 2007, copyright by EURASIP
BUILDING EMBEDDED DSP APPLICATIONS IN A JAVA MODELING FRAMEWORK Isidoros Sideris, Dimitris Pilitsos, George Economakos and Kiamal Pekmestzi School of Electrical and Computer Engineering, National Technical University of Athens Iroon Polytexneiou 9, GR-15780 Athens, Greece phone: + (30) 210-7221800, fax: + (30) 210-7722428, email:
[email protected] web: www.microlab.ntua.gr
ABSTRACT
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1. INTRODUCTION DSPs have become a ubiquitous enabler for integration of audio, video and communications. As 3G mobile phones and applications are prevailing, efficient Java execution is becoming a crucial component in system performance. Java processors [10] have been introduced to offer hardware acceleration for Java applications. However, their complex instruction set and the close relationship of hardware and software makes experimentation and evaluation of new microarchitectural techniques difficult. In this paper we propose a methodology for experimentation of microarchitectural techniques for embedded DSP applications executed on a Java processor. We discuss trace driven and execution driven performance evaluations. All implementations use a modeling framework we built on top of Java language, which enables modeling of communicating threads and supports various levels of details throughout the whole design model. 1.1 Parallel and Statistical Modeling When modeling a processor core in order to evaluate its performance, we are likely to use a model in simplescalar [7, 3] style, in which we take into consideration buffer sizes and statistical behaviors of the subsystems. In some cases performance is very dependent on the communication and execution overlap of two units, something that it can’t be modeled in such a framework. A hardware model with communicating parallel threads is needed. But this is at the expense of performance. This work was partially funded by the Greek Ministry of Development, General Secretariat for Research and Technology, project PENED 03E∆908
©2007 EURASIP
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In this paper we present a methodology for modeling embedded DSP applications based on the Java language. Models are written in a framework which allows detailed cycle accurate modeling in the area of focus with less detailed and more efficient statistical models for the rest. The modeling is based on a Java extension package that allows hardware modeling by providing classes and primitive calls, in the same way SystemC extends C. By adopting Java in hardware modeling great productivity gains can be brought to the hardware designer or computer architect, since it has simple object model and prevents us from the error prone pointers. As a modeling example, we evaluate the performance of an audio encoding application on top of a stack folding optimized Java processor.
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Figure 1: (a) Combined parallel-statistical model, (b) Threads Communicating Example One solution is to combine different styles of modeling, that is communicating parallel threads in the area you are focusing, and statistical modeling in the other parts of the processor core. A submodel consisting of parallel communicating threads, which simulates a processor subsystem in a cycle accurate basis, communicates with a statistical model thread with FIFOs. The parallel model takes into account unit’s operation overlaps, and feeds a buffer of the statistical model through a FIFO. The statistical model takes as input this buffer, and estimates the total performance. Stats can come either from the statistical model, or from the parallel model by inserting probes in various places. Both model’s parameters can be altered, in order to determine how performance is affected. To make things clear, consider the example of figure 1a, which models a Java processor with a translation unit that transforms java bytecodes to RISC like instructions. The backend processor core is a classic RISC out of order core. The translation of a requested java bytecodes line is variable. We model the processor fetch and the translation unit as two communicating parallel threads. The processor fetch thread feeds the statistical model thread, which models the out of order core. We focus on the translation technique, so we maintain a greater level of detail in this submodel, while keeping an appropriate level in the other parts, in order to keep the whole design realistic. 1.2 Java as a Hardware Modeling Language The adoption of Java in hardware modeling can provide the hardware designer or computer architect with real productivity gains. Its simple object model and the lack of error prone pointer issues, makes programming really fast and productive. Java platforms, as Eclipse [1], can be used to offer their
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15th European Signal Processing Conference (EUSIPCO 2007), Poznan, Poland, September 3-7, 2007, copyright by EURASIP
public class ClkThread extends HwThread { public boolean hwmethodrun() { int value=((Integer)sin[0].read()).intValue(); System.out.println("time="+sched.time+", clk="+ value+"THREAD"+name); sout[0].write(new Integer((value==0)?1:0)); addEvent(new HwEvent(sched,-1, "CLK")); return true; } //constructor public ClkThread(String name, HwScheduler scheduler, HwSignal[] sin, HwSignal[] sout, HwFifo[] infifo, HwFifo[] outfifo, HwTransmitFifo[] intransmitfifo, HwTransmitFifo[] outtransmitfifo) { super(name, scheduler, sin, sout, infifo, outfifo, intransmitfifo, outtransmitfifo); } }
public class HwMethodRunExample extends HwThread { public boolean hwmethodrun() { System.out.println("Hello"); addEvent(new HwEvent(sched,10, "clk")); return false; } }
(a) public class HwThreadRunExample extends HwThread { public void hwthreadrun() { synchronized(sched) { hwwait(); //setup preamble addEvent(new HwEvent(sched,-1, "CLKPOSEDGE")); waitcycle(); //main body for(int i=0;i
