encompasses several ideas we need to build on before we look at more realistic ...... This arrangement we will show, produces a uniform PSD, one of the ...
Chapter 2. Discrete chaotic maps “Out of chaos comes order.” Friedrich Nietzsche
2.1 Chaotic maps The trajectory of a Non-linear Dynamical System (NDS) is the path traversed by a point in Phase (State) Space from some initial condition. NDS system may be chaotic in nature and can be digital (in which case they are called maps), and analogue or continuous time systems. Analogue systems are modelled using differential equations, whereas difference equations are applied to model discrete chaotic maps. In general, chaotic maps are easier to analyse but present some difficulties when electronic versions are created. The well-known discrete logistic map is one of the simplest example of a discrete unimodal system and models, albeit in a simplistic manner, population growth and death in a predator-prey scenario. In chapter 6, this map is adapted for producing pseudo-random number generators (PRNG) for use in cryptography. The orbits of these theoretical chaotic maps should never overlap and are never periodic and hence should be ideal candidates for cryptographic keys. However, because of the finite precision of computer systems, implementing PRNG using maps in digital systems introduces some difficulties. There are techniques for overcoming these difficulties and will be discussed further but one consideration in this thesis is the study of implementing these maps in an analogue computer fashion, reminiscent of the analogue computers which used integrators, multipliers, etc.
The continuous logistic model Population dynamics for animal growth and death such as the spread of the human virus swine flu may be modelled by a relatively simple equation whose dynamics are chaotic in nature for particular parameter values. We considered a simple growth model for a particularly nasty virulent, contagiouswith-no-cure disease, in a population of N individuals living on a small isolated island. The island is completely isolated where no one can leave and the disease growth rate, R is proportional to the number of infected people. Normalizing this growth rate with respect to the total population, setting x to R/N and with a range between zero and one. If x were greater than unity there would be no healthy people on the island! The differential equation for the simple unlimited population model is:
dx kx dt
(2.1)
Here the constant of proportionality is k representing the growth rate and x represents one infected person in a population of a million people. We can model this using PSpice software normally used for simulating electric circuit behaviour and let x equal one microvolt, hence the total population of 1 million is represented by 1 V and one second represents one month. The initial condition voltage represents the number of people infected at the start of the epidemic, i.e. at t = 0, xpast = 1 uV. The solution to equation (2.1), is an exponential form, and for k =1, is:
x present x past e kt
2-9
x past 1uv t 13.8155
106 e13.8155 1 V
(2.2)
However, in any real-life scenario, there are factors which will limit the spread of the disease. For example, some of the population may be immune to the disease and so this is not a realistic model since it has no factors to limit the exponential growth. Nevertheless, this model is important as it encompasses several ideas we need to build on before we look at more realistic population growth models. To simulate this model in PSpice, we use an ABM integrator part (Integ) with the output fed back to the input, as shown in the inset in the graph in Figure 2-1. An initial voltage on the integrator part – the initial condition- is required to initiate growth from some value. From the results in Figure 2-1, we see how the 1 uV has grown exponentially to 1 V in 13.8155 seconds (which represents approximately 14 months in real time). The total population is now infected with the disease!
Figure 2.1: Simple population growth model
FIGURE2-001.DSN
After 13.8155 seconds, the voltage is 1 V but at 35 s the voltage has grown to 4.3 GVolts! To model a more realistic scenario, we must make the growth rate proportional to a growth-limiting factor, (1- x). As the diseased population approaches a maximum, it is multiplied by this factor to reduce the population. A continuous form model developed by the Belgian professor Pierre Verhulst (1804-49), based on work by the well-known but slightly pessimistic philosopher, Malthus [1], is expressed: dx kx(1 x) dt
where, k 0
(2.3)
Where k is the Malthusian parameter that represents the rate of maximum population growth.
2.2 Modelling equations Because of its simplicity of use in Orcad PSpice, using Analogue Behavioural Models (ABM) parts in the first instance is a good technique in modelling before attempting to model with actual electronic parts. We can obtain simulation results very quickly without the need for getting into circuit design details. Of course, after successful simulations with ABM parts, these parts may be replaced with models of real integrated circuits. The results from ABM simulations are very useful when fault finding in real physical chaotic circuits. There are two levels of complexity when using ABM parts to model chaos. For example, the ABM1 part can be used to input a complete chaotic equation instead of using individual ABM parts. We can see in Figure 2-2 an example where individual ABM circuits using to model a continuous logistic equation and underneath this circuit is an example of an ABM1
2-10
part to model the solution to (2.3), which is a sigmoidal function f (k ) 1/ (1 a exp(kt )) . This equation is entered into the ABM1 part.
Figure 2.2: continuouslogistic.opj Sweeping the input voltage Vsweep produces the familiar sigmoidal form in Figure 2-3 (a) and is similar to the output from the integrator, v(yn). Here, the output grows exponentially at first, grows linearly in the middle section but then flattens out asymptotically.
Figure 2.3: (a) Sigmoidal activation function and integrator output (b) Continuous form for R = 4 Figure 2-3 (b) show the trajectory as a parabola and is called an orbit diagram. This diagram is produced by changing the x-axis from time to the output variable, v(yn). To investigate fixed points in the system, it is useful to plot v(yn) against itself. This produces a line at 45 degrees and is called the identity line which intersects the parabola v(int_in) at a fixed point of 0.75 V for a growth factor of 4. Fixed points are discussed later in the chapter. Verhulst’s first-order differential equation, with R representing population growth rate, is continuous in time! However, population growth is normally discrete in nature because food availability, animal fertility, etc. is normally discrete in nature, hence we must now consider a discrete population model of the famous logistic equation.
2.3 The Logistic map The one-dimensional logistic map, a member of the quadratic map family, has one variable and the resultant plot is a line. To explain the discrete one-dimensional logistic map we consider the predatorprey example of a population of cats and mice in a house from which there is no escape. In this scenario, the cats will catch and eat most of the mice. However, when the cats have almost exhausted their food supply of mice, they will start to die off. The few mice who escaped will increase their numbers yet again and the cycle is repeated ad infinitum. The discrete nature of this cat-mouse 2-11
population growth-death scenario was modelled by the mathematician, R. May in 1976 forming the logistic equation y(n) Ry(n 1)[1 y(n 1)] . The present population, y(n), is a function of the previous year population, y(n-1) but this nomenclature is a bit clumsy and hence we use yn and ynd (The d subscript represents a delay). The previous year’s population ynd [0, 1] represents the ratio of the past mice population to the maximum sustainable population and has a value between 0 and 1. The equation has a growing factor, Rynd and a limiting factor, (1-ynd) to keep the population from growing exponentially. From an initial population value with growth factor R, we may see how the population evolves in time. To develop May’s logistic map equation, we apply finite differencing over a time increment, t to the continuous logistic equation (2.3) yielding the logistic map equation:
y yn ynd kyn (1 ynd ) yn ynd tkynd (1 ynd ) t t
(2.4)
yn (1 k t ) ynd (1 ynd ) Rynd (1 ynd )
(2.5)
Thus, we may write:
A growth rate factor, R (1 k t ) , is a positive number in the range 0 to 4, i.e. R [0, 4] . This is one of many chaotic maps to be considered in this thesis and we may generalise (2.5) as: y(t 1) f ( x(t ))
xR
tN
The ABM discrete logistic systems in Figure 2-4 show an iterative (recursive) loop, with the output fed back to the input. To simplify the schematic we use wire alias names to link parts of the schematic, hence the wire name y1 at the output will be connected to the wire name y1 at the input. The complete logistic map equation is entered into the expression box of an ABM1 part. To demonstrate the important concept of sensitivity to initial conditions (SIC), the two schematics are shown with different initial values, 0.04 and 0.051entered into a CONST ABM part.
Figure 2.4: ABM1 part to simulate the logistic quadratic equation The discrete recursive, one-dimensional quadratic chaotic system has an analogue delay in the loop to represent the passage of time. Since there are no native analogue delay parts in PSpice, we must use one of two methods to produce such a delay. The first method uses a Laplace part, with the expression, EXP(-s*t) entered into the numerator part of the transfer function and 1 in the denominator [ref: ptobin DSP book]. The second delay method uses a transmission line part, T, terminated at the input and output, with resistances equal to the transmission line characteristic impedance [PT tx book]. However, using the Laplace part is not quite as robust as the transmission 2-12
line part. One of the characteristics of chaos-sensitivity to initial conditions was demonstrated by plotting the output of each circuit against the delayed voltage for the first circuit. We can see in Figure 2-5 how the two circuits quickly go out of sync and show orbit initially in sync but then diverging after a short time.
Figure 2.5: Orbit diagram showing the two circuits out of sync at 271 mV If the results are satisfactory from using the ABM1 part and if we wish to create a physical circuit, we may separate the equation using individual ABM parts: MULT part for multiplication, SUM and DIFF parts for addition and subtraction, and the INTEG part for integration. This is a necessary step for producing a final electronic circuit.
2.3.1
Feigenbaum constants
A correctly terminated T transmission line part is shown in Figure 2-6. The input impedance of a very long length of open-circuited transmission line is the characteristic impedance, Zo. Terminating the line at the input and output with resistances of value Zo avoids reflections in the transmission line. TD = {delay} Name ynd V
T1 yn
ABM1
TSF = 1
Vs tair
VSF = 1
0 D:\feb20 10\b ook6\circu its\mystai r.txt
V
Initial Conditions gro wth1
System equation
1u
R1
10 0
PARAMETERS: Dela y = 10 0u
ynd
Z0 = 100
R2 10 0
v(growth1)*v(ynd)*(1-v(ynd)) Parts used: VPWL_file, ABM1, SUM, CONST,R, T
0
Figure 2.6: Using ABM parts figure2-006 Iterating this equation illustrates the complex dynamic relationship between population growth and death over a range of values of R. The population dies out when R is between 0 and 1. However, the population approaches a value of (1 1/ R) for R between 1 and 2 and doesn’t depend on the initial population. For R between 2 and 3, the population decays in an oscillatory manner to a fixed value, (1-1/R). Growth rate values greater than 3 causes the population to oscillate indefinitely between two values and is called period doubling. For this scenario, it bifurcates having a high value for one year and a low value in the following year. Similarly, the period doubles again to four when R is 3.45 and has a four-year cycle. Further increases in R causes the period to keep on doubling. At R = 3.57…, a point is reached called the accumulation point called the Feigenbaum number, where chaos starts to occur and the population never settles to a fixed population value. 2-13
There are, nevertheless, values for R (3.57, 4), which produce window regions called intermittencies with period three. When these windows are expanded, they show the same fig tree pattern happening again at each of the three lines - a fractal self-similarity phenomena. To investigate the orbit diagram, we set R to a single value using a VDC or CONST part. The logistic equation growth factor and delay are defined in a Param part as 3.2 and 100 us.
Figure 2.7: An ABM model of the Logistical map Table 1 shows the output for the first six iterations for an initial condition of 0.2 V and R = 3.2. n yn
0 0.2
1 0.512
2 0.7995
3 0.512
4 0.7995
5 0.512
6 0.7995
Table 2-1: Logistic time series values for R = 3.2 and IC = 200 mV Figure 2-8 (a) shows the logistic signal oscillating between two values of 0.512 V and 0.799 V, with a corresponding spectrum in the second pane which shows the signal having a wide bandwidth. For higher values of R, the spectrum will increase and eventually for values of R greater than 3.57, the resulting spectrum is similar to wideband noise.
Figure 2.8: (a) Logical map output for x0 = 0.2 V. (b) Frequency spectrum
2.4 Phase Space: Fixed points on the orbit diagram The logistic equation is bounded in a region called the basin of attraction having a range zero to one. Outside this range, it is unbounded and unstable and PSpice will produce convergence errors because the system attempts to head towards infinity in either a negative or positive direction. The logistic equation trajectory will remain at a Fixed Point (FP) because there is zero growth in the population, a point where the derivative is zero. Thus, the trajectory will remain at a stable fixed point, even after many iterations of the system. However, if the trajectory moves away from a FP then this FP is an unstable FP called a repellor or source. To solve for the fixed points in discrete systems such as the logistic map, we equate the map to itself, i.e. f(yn) = yn. For continuous analogue systems, such as the
2-14
analogue Lorenz chaotic system examined in Chapter 3, the procedure for solving the FP is different and we equate the function to zero, i.e. f(y) = 0.
2.4.1
Orbit Diagram
To produce an orbit diagram, we set R to a single value. In this chapter, we will see how the trajectory stretches and then folds back on itself to create a closed loop. Figure 2-9 shows the past population (the delayed signal), ynd on the x-axis, and the present population, yn on the y-axis, with time as the orthogonal z-axis.
Figure 2.9: Stretching and folding The logistic equation orbit diagram The Rynd term is responsible for stretching, whereas folding occurs because of the (1-ynd) term.To get a smooth orbit, change the initial signal to a triangle shape by making the rise time equal to the fall time of the initial condition generator (a VPULSE part), equal to the period. Figure 2-11 shows the parabolic trajectory for the logistic equation, plotted by changing from time on the x-axis from time to v(ynd). The identity line is superimposed on the plot by plotting the same variable, v(ynd), on both axes. The height of the parabola changes with R and has a maximum value of R/4, but the width stays the same. For R = 2.8, we plot the logistic equation parameters, yn against ynd and the identity line meets the parabola at x = 0.642, a stable fixed point because all points converge on it. ynd Rynd (1 ynd ) ynd 1 1/ R 1 1/ 2.8 0.642
There are two fixed points on this graph: a stable fixed point where the identity line intersects the trajectory, and an unstable fixed point at the origin. The fixed point at the origin is unstable because it has a tendency to move away from this point. If we set the initial condition voltage to a negative value, then the system will attempt to go to negative infinity. Integrated circuit devices produce DC offsets which will cause the output to saturate towards the negative supply. Hence, it is important with electronic IC devices to include a small positive millivolt signal to ensure the fixed point is encouraged to head off in the positive direction. A useful iterative graphical technique called a web diagram demonstrates the dynamics of the fixed points and hence the stability of such points. From an initial condition, x(0), draw a vertical line from the x-axis on the orbit diagram until it meets the orbit at x(1). Draw a horizontal line from x(1) to the identity line so that the output becomes the input and so on. The slope of the logistic function determines the stability of the fixed point. If the slope of the function, df / dx x* 1 it is a sink (an attracting fixed point). If the slope is greater than one, it is a source (a repelling fixed point). 2-15
The logistic equation map has a maximum value of 0.25 for R = 0.5. There are an infinite number of initial conditions (IC), x(0), that will not give rise to chaotic behaviour, even for R = 4 [Sprott, taming chaos]. Also, a system will converge for some initial conditions but not for others. The system should produce a chaotic series if the IC is 1uV and R = 3.99. However, repeating this for IC = 1mV produces convergence errors as the system attempts to head off to minus infinity. Setting IC to 2 mV and the system is back to normal again, producing a chaotic time series. There are two conditions for the initial conditions for the logistic map which must be considered. As stated, the initial condition must be chosen very carefully as there an infinite amount of unstable points and to prevent this we must ensure the following conditions are met: x(0) 1 1/ R
x(0) 0.5 1 (1 4 / R)
(2.6)
(2.7)
For R = 4, the IC should not be set to 0.5 or 0.75.
2.4.2
Bifurcation Plots
Bifurcation is an important aspect of chaos and occurs in a system when a small change to a system parameter causes a change in the stability of a fixed point. In analogue systems, the real part of the eigenvalue of the fixed point will traverse from negative to positive through zero. In phase space, the trajectory behaves differently in different locations, and we can see this around by examining the area around the fixed points and considering the space around this fixed point as linear. There may be more than one fixed point, so we study the properties of phase space locally by applying a linearizing technique around each of these points. The eigenvalues determine the type of fixed points that exist in a system and hence the stability of the system. The nature of the trajectory is determined by the eigenvalues. For the logistic equation, the fixed point is solved for f(yn) = yn. The Jacobian matrix is formed from the partial differentials of each of the parameters of the function and linearizes the system around this point. However, since the logistic system is one-dimensional, then this matrix is just the differential of the function at the fixed point. We should remember that for continuous systems, we use the splane for stability analysis, but this s-plane maps to the z-plane which forms a unit circle for discrete systems stability [ ]. Eigenvalues located outside the unit circle are bounded-input bounded-output (BIBO) unstable [P Tobin and Erik Lindberg ref], hence trajectories will diverge away from the fixed point at the origin. Eigenvalues within the unit circle are stable and the trajectory will converge on the origin. At a bifurcation location, a fixed point loses stability, and we can see this by considering a range of growth values in the logistic model. The classification of the bifurcation type will depend on where an eigenvalue crosses the unit circle. Shortly, we will introduce the Feigenbaum constants created by Michael Feigenbaum and to investigate these we need to sweep the growth factor using a staircase signal applied using a VPWL file generator in Figure 2-10.
2-16
yn V
T1
Z0 = 50
y ndelay R1 50
R2 50
TD = {delay }
PARAMETERS:
DELAY = 100u IC
y(n) = Ry(n-1){1-y(n-1)] y(n) = R{y(n-1)-y(n-1)^2}
R V
V1
Vstair c:\chaos\my stair.txt
V1 = 0 V2 = 0.2 TD = 0 TR = 1u TF = 1u PW = 6m PER = 10
In Matlab, use [xx,yy]=stairs(x,y), where x = 0.005, and y = 0.005
Place a Vprint as shown, if you wish to obtain the variables in the output file in Probe
0
Figure 2.10: Investigating Feigenbaum constants For the logistic system, we must ensure that the output always remains bounded by limiting the range from 0 to 1, otherwise, the trajectory will attempt to go to plus or minus infinity. To encourage PSpice to converge and avoid this problem, we may include an HARDLIM ABM part in the feedback path, which limits the excursion of the variables to the values set in the expression box of the part. The schematic in Figure 2-11 demonstrates how the system output changes when varying the growth parameter for a range of discrete values. For values of R between 0 and 1, the population dies off in time. For values greater than 1, we see constant oscillations being set up, meaning the population has settled to a constant value. For values of R equal to 3, a bifurcation in the population occurs. In one year the population has one value and then in another year another value. Thus, the population continuously alternates between values every other year. OUT
1 IN 0 ynde lay T1 = 0 1u
OUT
Initial conditions
T2 T3 T4 T5 T6 T7 T8 T9
= 1m = 1 .01m = 2m = 2 .01m = 3m = 3 .01m = 4m = 4 .01m
V1 = 1 .5 V2 = 1 .5 V3 = 2 .99 V4 = 2 .99 V5 = 3 .2 V6 = 3 .2 V7 = 3 .5 V8 = 3 .5 v9 = 3.8
U1 ANAL OGDELAY 2 1 OUT IN
yn V
DELAY = 1 u vpwl V
Vp wl gen
0
Figure 2.11: List of growth values To investigate initially how the system evolves when the growth factor is changed, we use a Vpwl part to input discrete step changes in the growth factor in time. Select and double-left the VPWL generator part (sources directory) and enter the time-voltage pairs shown in the schematic. Figure 215 shows how the system initial condition goes from a constant value for R = 1.5, to a chaotic region for R = 3.57. [ref only delete growthVStime.opj]
2-17
Figure 2.12 (a) Bifurcation plot Pressing the FFT icon in Probe produces the frequency spectrum in Figure 2-12 (b). We may wish to express the spectral components in dB in order to emphasize smaller spectral components. Here, we see the spectrum has a wide bandwidth which is a chaotic system characteristic.
2.4.3
Bifurcation diagram
In the previous section, we briefly discussed the stability of the fixed points by looking at the nature of the eigenvalues. A bifurcation of a state variable in a chaotic system occurs whenever a fixed point loses stability. In this chapter, BIBO stability of the discrete logistic chaotic system is examined by investigating the pole/eigenvalue locations in the unity z-plane. If the poles are contained within the unit circle, the system is considered stable. Poles outside are considered an unstable system, whereas, poles on the unit circle lead to conditional stability. In the appendix, there are several papers by Erik Lindberg on this area, where he discusses the myths on conditional stability poles [ ]. For stability in discrete systems, the eigenvalues (poles) should remain inside the unit circle [dsp book ref]. If the eigenvalues cross the unit circle because we change one of the state variables, then the process of bifurcation happens. Where the eigenvalues cross the unit circle will classify the type of bifurcation occurring. To investigate the bifurcation phenomenon in chaotic systems, we sweep one of the system parameters over a range of values. In the case of the logistic equation, the growth factor is varied between 0 and 4 and demonstrates how period bifurcation (also called a flip or fork, bifurcation), occurs. To produce a bifurcation plot we need to consider a value for the growth parameter evaluated for a number of points. This is then repeated for a range of R-values. Generally, this is achieved in software using nested FOR loops, where the inner loop is iterated for one growth factor value and the outer loop is iterated for another growth value (Ref 3). Generally, we discard the first few hundred transient points. In PSpice however, two methods are used to simulate a step change in the growth factor. The first method uses a staircase signal to mimic the two nested FOR loops, and the second method uses a VPWL generator part for producing a ramp signal. However, the latter is a quicker technique but produces distortion in the bifurcation shape.
2-18
2.5 Tangential distortion If the sawtooth representing the growth factor is swept too fast with respect to the delay in the circuit, then at the bifurcation point, the plot will be slightly different to the normal pitchfork bifurcation shape, the shape being more tangential than pitch fork in shape. For now, we call this bifurcation tangential distortion but is due to stability loss delay. To avoid this distortion requires setting the ramp time to a large value but you run the risk of convergence problems and also produce longer simulation times. So, putting up with this distortion is a small price to pay for quicker simulation times, clearer diagrams and reduced convergence problems. Figure 2-13 shows tangential distortion occurring because we are sweeping the growth factor too fast. This does not happen if the bifurcation is obtained within a programming software environment such as in Matlab ©, where FOR loops within FOR loops are used hence the ‘system’ waits for a period depending on the inner loop iterate number, so the growth factor does not change in this interval, which of course it does in a real system! Figure 2-14 shows a few additional part added to the schematic that is necessary when certain values of growth factor cause the system to behave in a chaotic manner. A GAIN part increases the loop gain to overcome the small losses that occur using the transmission delay part. With the correct loop gain, we ensure the first bifurcation happens for R = 3. We discovered that increasing the gain moves this point left of the correct location, but decreasing it moves it to the right. A LIMIT part is included as discussed previously if you wish to simulate for R values that produce chaos, otherwise, you’ll get convergence error. However, as a general rule, it’s good to include it anyway. A VPWL generator part located in the source library is used to make a ramp signal to give growth factor from 0 to 4 V in 4 s. Select and double-left-click the VPWL part and observe that there are time and voltage rows in the spreadsheet. Enter in T1 the value 0, and then T2 = 4. The corresponding voltages are 0 and 4 and will produce a ramp voltage that starts at 0 s and rises to 4 V in 4 seconds. 1.008
V
V
2
OUT
IN
U1 1yn
DELAY = {Del ay}
Value = {IC}
PARAMETERS:
OUT
Initial conditions
Logistic equation ynde lay
ANAL OGDELAY
T1 = 0 V1 = 0 VR
T2 = 4 V2 = {R}
0
Delay = 10u IC = 1u R=4
Figure 2.13: Use of VPWL part for growth parameter change We see in Figure 2-15 (a) how the trajectory splits up into smaller, but similar, bifurcations. This is called self-similarity, a term used on the subject of fractals, a fascinating topic in itself but not examined here. In a 1975 issue of American Mathematical Monthly, James Yorke and T.-Y Li wrote an article entitled “Period Three Implies Chaos", where they stated that the existence of a period 3cycle implies the existence of cycles of every other period, and also chaotic cycles with no period at all [Li and Yorke, 1975]. For R= 3.6786, an odd period cycle appears and according to the Li-Yorke theorem, a three-period cycle will appear in chaotic zones only after period-doubling bifurcations has ended. We expand this diagram around R = 3.80 to 3.84 to observe this famous ‘period 3’ window, 2-19
shown more clearly in Figure 2-15 (b), and to observe the fractal nature of this orbit/bifurcation diagram in greater detail. "Period Three Implies Chaos". When a nonlinear system displays a period three window then the system has become chaotic
and
is
no
longer
deterministic.
This
occurs
in
the
logistic
system
for
R 1 8 3.8284 3.83 where the system oscillates between three values. This intermittency
window shows the self-similarity of the fractal pattern and we introduce the term scale-free. No matter what scale we chose, we will still observe the same pattern in finer detail but still the same- a fractal a being a pattern that is scale-free [http://www.youtube.com/Stanford].
(b) The ‘Period three’ window
Figure 2.14: (a) Change the x-axis time to V(R)
Selecting the FFT icon in Probe produces the frequency spectrum shown in Figure 2-23. We can make each spectral component appear clearer by plotting the log of the squared variable. A large DC component tends to mask the smaller spectral components, so, if present, select the space between numbers on the x-axis and change the lower limit to a value other than zero and select log plot. 150
Logistic Spectrum for 10 us delay (20 kHz,102.9) (10 kHz, 109.8) (30 kHz, 92 dB) 100
(40 kHz, 78.433 dB)
dB(V(yndelay)*V(yndelay)) (60 kHz, 45.184 dB) 50
sub harmonics
0 1.0KHz 3.0KHz DB(V(YNDELAY)*V(YNDELAY))
10KHz
30KHz
100KHz
300KHz
Frequency
Figure 2.15:
2.5.1
Feigenbaum constants
Mitchell Feigenbaum discovered the period-doubling mechanism whereby systems became chaotic. He showed there was a relationship between the recurring ratios in the period doubling now known as 2-20
Feigenbaum constants. The first-period doubling occurs at R = 3, the second for R = 3.455, the third at 3.533, etc. These new constants will become as familiar as the well-known constant π. The first constant he looked at considered the lengths between successive bifurcation points (period doublings), so from measurements taken from the bifurcation, or fig tree diagram (Feigenbaum is German for a fig tree, which has a fractal structure, and…-a mathematician’s joke….), in Figure 2-17, yields the following: lim
x
Rn Rn 1 3.455 3 4.64 Rn 1 Rn 3.553 3.455
(2.8)
This is close to the Feigenbaum number value of 4.66920160910299067...[Feigenbaum, 1980]. It is interesting that this number may be applied to many other nonlinear systems. For example, prior to, or during, a heart attack, period doubling occurs so perhaps we could apply Feigenbaum constants to predict the onset of such dangerous conditions. The ‘fuzzy’ area at the bifurcation point is due to transients in the signal.
Figure 2.16: see chaos toolbox: bifurcate.m Setting the 0.5 level to measure delta To measure the second Feigenbaum constant,α 2.5029.., we need to add a reference 0.5 line to the diagram in order to measure the ‘opening’ of the bifurcation. For the logistic equation, this reference value occurs where R = 2, so the fixed point, x* occurs at (1-1/R) = 0.5 and occurs at the maximum value for the orbit. This is the point where the derivative is zero on the one-humped parabolic curve of v(xn) versus v(xnd) and occurs at the highest point on the curve (the peak of the hump). Place the cursor at the intersection of the line and the trajectory and select the cursor to mark these points at two locations. Repeat this for the next period doubling. The second Feigenbaum constant is the ratio of the openings at each period doubling at a same location on the bifurcation leg. From Figure 2-25, we see how the measured value is close to the theoretical value of 2.5029078750958928222839028...[ ] lim
x
n (854 mV- 438 mV) 2.54.... n 1 521 mV- 359 mV
(2.9)
[Ref. [4] H. G. Schuster, Deterministic Chaos, VCH, Weinheim, 1988].
2.6
Sample and hold delay devices
Previously, we used a transmission line part to achieve a delay, however, the delay technique shown in Figure 2-18, uses two sample-and-hold devices operated again by two pulse clock signals that are out of phase by 180 degrees, to ensure the electronic switches operate in the correct sequence, is also used in switched-capacitor filtering [‘PSpice for Filters and Transmission lines’]. This delay mechanism using two SBREAK switch parts with the second out-of-phase clock uses a VPULSE 2-21
generator part called vclkinv with a delay, TD = 0.5*Period to achieve the clock inversion necessary for the correct operation of the two switches. A sine wave is sampled and the sampled output from each switch is held at a constant level by a capacitor at the output of each electronic switch sampler. The two switch stages should have a unity gain buffer amplifier (here, a GAIN part), inserted in order to isolate or buffer, the first capacitor. As always, ABM parts are used initially to obtain a proof of working concept, but then later replaced by the various sample and hold designs, ranging from applying the obsolete LF398 integrated circuit to the one used in the final circuit design- the Analog Devices IC- the SMP04EPZ. (Systems Using Analog Circuit Simulators).It has been shown that the value of the sample and hold capacitances is 0.01*Tsample F, where Tsample is the sampling period. The clock pulse rising and fall times are 0.0001*Tsample, with a width equal to 0.01*Tsample.
VOFF = 0 VAMPL = 1 FREQ = 1k
Vi n
se con d_ou tput
+
-
PARAMETERS: ROFF = 1meg
V
Sbre ak
fre quen cy = 100k
+ -
Sbre ak
Cloc k_inv ert
V1 = 0 V2 = 5 PW = {0.01*peri od} PER = {perio d} TR = {0.0 001*pe riod} TD = 0 TF = {0 .000 1*perio d}
Vclk
S2
1
-
+
ROFF = 1meg VV RON = 1u Cloc k
fi rst_o utpu t
S1
+ -
si ne_i nput
C1
{ch} Vclk1
period = {1/frequency}
V1 = 0 V2 = 5 PW = {0.01*peri od} PER = {perio d} TD = {0.5 *p eriod } TR = {0.0 001*pe riod} TF = {0 .000 1*perio d}
Ch = {0.0 1*Period } C2
{Ch}
0
Figure 2.17: Sample and hold circuit A buffer amplifier in included between sampling stages to prevent the second stage from loading the first stage. Figure 2-19 shows a portion of the three signals: the input sine-wave and the two outputs from each sampler. We can measure the required 10 us delay (which is the period of the 100 kHz clock), by examining the peak of the sine wave and the peak of the output from the second sampler as shown. An empirical formula for calculating the correct value for the capacitance is: 5 .0 V
1.0165V
Delayed sampling clock
2 .5 V
(260 us,1)
(250 us, 1) 1.0000V
Second S & H
0V V ( C L O C K _ IN V E R T ) 5 .0 V
Delay = 10 us 2 .5 V
First sampling clock
0.9800V
input 0V V (C L O C K ) 0.9600V
Required Delay
100mV
Analogue input 50mV
Sampled input 1 SEL>> 0V 0s
2us 4us V(SINE_INPUT) V(SECOND_OUTPUT)
6us V(FIRST_OUTPUT)
8us
10us Time
12us
Delayed Sampled input 2 14us
16us
18us
20us
0.9404V 206.6us 220.0us V(SINE_INPUT)
240.0us 260.0us V(SECOND_OUTPUT) Time
280.0us
300.0us
Figure 2.18: Delay between the input and sampled outputs Another clock source we can use is the digital generator STIM1 part shown in Figure 2-20. The second clock has a 5 us delay to ensure the correct switching sequence is maintained. Using this clock is probably better because we do not have to specify rise and fall times for the pulse which can cause convergence problems. The isolation amplifier, with a gain of 1.022, is used to keep the correct levels in the loop. This also allows us to move the first bifurcation point to the correct location for R = 3.
2-22
PARAMETERS: GAIN = 1.0 22
yn
Vra mp
T1 = 0
OFFTIME = 2 u V ONTIME = 9.5u STARTVAL = 1 V1 = 1 u OPPVAL = 0
CLK
Ch1
V
{C}
T2 = 4 00mV2 = 4
VOFF = 0 VAMPL = 1 FREQ = 10k AC = 1
ROFF = 1meg
clkinv
OFFTIME = 9 .5u ONTIME = 2u STARTVAL = 0 OPPVAL = 1 DELAY = 5 .5u
IC = 1u
S2
-
+
Sbre ak DSTM2
+ -
-
+
OUT
R
2u
ROFF = 1meg RON = 1u
+ -
clk
CLK
C = 2n2
S1
Sbre ak DSTM1
V
ynsd
yns
Ch2
Vopen_loop 0
{C}
V
IC = 1u
0
Figure 2.19: LOGICAL_ABMSWITCHES_SEPT.opj
2.6.1
Bi-phase clock production
To create an analogue delay using two sampling stages, we need to create a pair of clocks to operate the sample and hold sampling switches in the proper sequence. A 555 IC produces the initial clock, although we could use a lab generator. Clock1 is then divided by two using a dual J-K flip-flop (74107) IC, and again a further divide by two, in a second FF. Q(A), and Q (B), together with the clock from the first J-K FF output (clock), are applied to a dual AND gate as shown in Figure 2-21. +5 14
C3 +5
Gnd 8
U1 R1
2k 7
5
R2
16 0k
6
4 55 5alt VCC
DISCHARGE TRIGGER
THRESHOL D 5 OUTPUT CONTROL 10 0p C2 GND 10 n 1 gn d
tri gger C1 IC = 1
10 0n C4 2tri gger 3clock1
+5 10 0n A +5 14 74 107 8 14 VCC J 1 5 VCC U2BQ J U2A 3clock9 Q CLK 12 6 CLK Q 2 11 V Q K 4 B V K GNDCLR 74 107 Gnd GNDCLR 7 10 Gnd7 13
2
clock
V1
RESET
1
U3A V
V
Gnd
7
+5 10 0n 14
4 5
3Phi 2
74 08
C5
U3B
0
6Phi 1
74 08 V7
Gnd
V
0
Figure 2.20: Production of the out of phase clocks (Biphasclocks_555.opj-delete) Figure 2-22 shows the out-of- phase pulses, Ph1 and Ph2. It is left as an exercise to work out the logic from the logic level signals shown at the bottom of this figure. If you wish to display this signals as non-logic level signals, for example, Ph1 and Ph2, as shown, then terminate each digital output with a large resistance and repeat the simulation.
Figure 2.21: Logical levels bipase1.opj Figure 2-23 shows an open-loop system with the 4066 switches operated by the bi-phase clocks. We apply a test 10 kHz, 1 V sine signal to the first switch which is buffered by a unity-gain opamp part 2-23
(this part has its own power supplies built in) from the second switch. The switches are operated in the correct sequence by the two anti-phase clocks, Ph1 and Ph2. pos V
U1A 1 IN
in V2
ph1 13
VOFF = 0 VAMPL = 1 FREQ = 10k
VC VSS 7
pos 54HC4066J U1B 14 VDD 4 IN OUT 3 out2
U2
14 54HC4066J VDD OUT 2 out1
+ out
OUT
60p V
VC VSS
OPAMP
60p
neg
V
s*s+1.414*2*pi*10000*s+(2*pi*10000)**2
7 neg
0
OUT
C4
ph2 5
-
C3
(2*pi*10000)**2 IN
0
0
U3A
1 V7 10Vdc
V5 10Vdc
DSTM1
V4 5Vdc
CLK
J
12
CLK
4
OFFTIME = 1us
3
Q K
ONTIME = 1us pos1
8
clock
2
Q
9 11
J Q CLK K
CLR
74107 U2A
74107 U2B
Q
1
5 6
74LS08
2
clock
3ph1
U3B 4 5
74LS08
6ph2
10
pos1
CLR
pos
pos1
13
neg
0
Figure 2.22: Biphase clocks operating the switches 4066_DELAY_LOGISTIC.DSN The low-pass filter is omitted in the final design. Figure 2-24 shows the required delay. 1104mV
Unfiltered delay 800mV
Filtered delay 400mV
0V
-400mV
Input -800mV
-1064mV 400.0us 410.0us V(C4:2) V(IN)
420.0us 430.0us V(LAPLACE1:OUT)
440.0us
450.0us
460.0us
470.0us
480.0us
490.0us
500.0us
510.0us
520.0us
530.0us
Time
Figure 2.23: The original signal, the sample and hold signal, and the filtered S+H signal
2.6.2
The AD633 multiplier IC
A multiplier IC implements the nonlinear product terms. The 4-quadrant multiplier in Figure 2-25 is capable of handling all four permutations of signals applied to the differential inputs (+ - + -). There is a further input, the z-input, a useful feature of the AD633 where extra signals may be added to the product terms. The AD633 device has an inbuilt scaling factor of 0.1, which prevents the output from becoming too large as a result of the multiplication process. The effect of the scaling factor can be overcome by a gain factor of 10 using resistors R1 and R2 (a potentiometer in practice) connected across the z output terminal. However, we should be aware that the gain-bandwidth product is reduced by doing this and hence this technique is useful for low-frequency operation only. We also have to connect a 50 k trim pot to the positive supply and pin 7 (z-pin), to ensure the output never heads in the negative direction. pos
U1
X
1 V
2 3
VOFF = 0 Vin
VAMPL = 1 FREQ = 50k
4
X1
V3 12Vdc 8 VPOS W
7
0 W
6
Z
X2
0 Y1
V
AD633 Z
Y2
VNEG 5 V2
R1 10k
V
R2 90k
12Vdc
0
Figure 2.24: AD663 set up to eliminate the 0.1 scaling factor AD633basicpluspicture.opj 2-24
Looking at the IC pin layout figure is a little diagram illustrating how the output at W is the sum of the signals from the z-input and the input pins multiplied by 0.1. The output at pin 7 is the sum of the voltages from the scaled squared x input signals x2/10 and the divided down signal present z-input, as: W
x2 R2 R1 x2 W W[ ] 10 R1 R2 R1 R2 10
(2.10)
For R1 = 10 k and R2 = 90 k, the output is:
W x2
(2.11)
However, if we wish to achieve gain from this stage, then we need to set up the circuit with a CONST part set to one applied to the second input so that the input x multiplied by one. Figure 2-26 shows how the AD633 gain must be increased using the z-input of the AD633 shown in Figure 2-27. 3.0V
V(W1) Gain 2.0V
1.0V
-0.0V
-1.0V
v(W2) Unity gain -2.0V 30us
40us V(W1) V(W2)
60us
80us
100us
Time
Figure 2.25: po s
V3
U2
X
1 2
0 1
3
OUT
4 VOFF = 0 VAMPL = 1 FREQ = 50k
X1
X
8 VPOS W
Z1
6
VNEG 5ne g
po s 8 VPOS W AD63 3
0 Y1
4
7 W2
X2 Z Y2
R2 99 k
X
V4
X1
3
R1 V 1 1k OUT
AD63 3 Z
Y2
Vi n
2
W1
7
X2
0 Y1
1
V
U3
12 Vdc
6 Z2
VNEG 5 ne g
0
R1a 10 k
R2a 10 0K SET = 0.1
X
12 Vdc
0
Figure 2.26: AD633 zinputonly.opj The principle of superposition circuit theorem enables us to calculate the final output from a circuit which contains two or more voltage sources. The output is the sum of three signals: one signal from the actual input and two other signals from the W output fed back via the z-input and the z input due to the input at R2. Basically, the method is as follows: let one source, E2, be replaced by its source resistance (you may assume an ideal voltage source and therefore it has a zero source resistance), and work out the voltage contribution due to the first source, E1. This is then repeated for the other source. The total output is then obtained by superimposing (hence the name) or adding together, each voltage contribution. At the output of the multiplier, W is a potential divider where the signal across R2 is applied back to the z-input. From the principle of superposition, each voltage source contribution is calculated, with the other source replaced by its source resistance (ideally zero). The output is then: W
x
10
R2 R1 R 2
W
R1 R1 R 2
x W[
R1 R1 R 2
]
x 10
R1 R1 R 2
x
(2.12)
Thus, for R1 = 10 k, and R2 = 90 k, the output is: W
2-25
R1 R1 R2
R1 R2 x R1
10
xx
10k 90k 1 10k
10
1 (1 1) x 2 x
(2.13)
We can substitute a potentiometer for R1 and R2 with, or, better still, a multi-turn pot, for greater flexibility at the adjustment stage. For example, making the 100 kΩ POT part with SET = 0.9, means one part (R1) is 10 kΩ and the other part (R2), is 90 kΩ.
2.7 Implementing the Logistic equation using the AD633 IC In this application, we apply the delayed output signal ynd to the input pin 1 and 4 to produce a negative sign on the product, but also it is applied to the potentiometer attached to the z-input shown in Figure 2-36. It is easier to analyse if we consider the potentiometer as two resistors R1 and R2 rather than a potentiometer. Let W = 0, then the signal applied to the input at the z-input due to the feedback term, ynd is: R1 ynd R1 R 2
(2.14)
The component in the W output due to the z-input alone (let ynd = 0), is: R2 W R1 R 2
(2.15)
The total output of the multiplier is the sum of the voltages from the three components, the input, the component from the W out to the z input, and the z input from the input signal, i.e. W
ynd . ynd
Z
10
ynd 2 10
R2 R1 R 2
W
R1 R1 R 2
ynd
(2.16)
The output for R1 = 10 kΩ and R2 = 90 kΩ is:
W ynd (1 ynd )
(2.17)
W represents the stretching and compressing part of the logistic signal at the output, pin 7. po s
ynd V
0
8 U2 V+ 1 W 2 X1 X2 AD63 3/AD 3 Y1 VZ 4 Y2
12 Vdc V
6
Z V
5 VOFF = 0 Vi n
VAMPL = 2 FREQ = 250k TD = 1u
V2
Cdc1 10 0n
V1
7 W
0 R3 10 0K SET = 0.9
ynd
Cdc2 12 Vdc
10 0n
0
Figure 2.27: AD633 4-quadrant multiplier (ad633muliplier.opj) Figure 2-28 shows the same sine signal applied to both inputs and the pot attached between the w and z pins. The resultant time and spectra signals are shown in Figure 2-29 where the 1 kHz sine signal, when squared, results in 2 kHz spectral component. We can use these figures to act as a guide when doing open-loop tests on the breadboard version. Apart from DC offsets, the simulation and breadboard results will be very similar. With this circuit, it is very easy for the output to saturate to the negative supply rail and cause convergence problems. To overcome this, we must supply a small positive voltage (mV) to the z-input. The gain-bandwidth for this configuration is reduced.
2-26
Figure 2.28: Ad633 multiplier diagrams Spectra
2.8 Caveats with AD633 The bandwidth of the AD633 is approximately 1 MHz with the 0.1 multiplier scale factor. However, using the resistive potential divider across the w-z terminals, with values shown in Figure 2-30, to introduce a gain of ten producing a unity gain, reduces the bandwidth to 100 kHz. R4
ynd V
0
12 Vdc V
6
Z
5 VOFF = 0 Vi n
VAMPL = 2 FREQ = 200k TD = 1u
V1
7 W
ynd Cdc1 10 0n
0 R3 10 0K SET = 0.9
0
5
R5 10 k 7 W1 ynd
1k R6 -1
TL 082 2 -
ne g
10 k
6
OUT 3
ne g V4
W2
4
po s
8 U2 V V+ 1 W 2 X1 X2 AD63 3/AD 3 Y1 VZ 4 Y2
po s 8 U3 V+ 1 W 2 X1 X2 3 0 AD63 3/AD Y1 VZ 4 Y2
V-
ABMou t
0
+ 8 U4A
1
V
po s V+
Cdc4 V2
ynd
12 Vdc
10 0n
0
Cdc2 12 Vdc
10 0n
0 0
Figure 2.29: AD633MULTIPLIER.DSN This reduction in bandwidth introduces distortion in the output when the operating frequency of the system is increased. This is observed as an attenuated in one of the peaks in Figure 2-31.
2-27
1.94V
input
0V
-2.00V
AD633 only
-4.00V
AD633+TL082 ABM output -6.00V 26.00us V(ABMOUT)
27.00us V(W2) V(W)
28.00us 29.00us V(YND) V(ABMOUT) V(W)
30.00us V(YND)
31.00us V(W2) Time
32.00us
33.00us
34.00us
35.00us
36.00us
36.97us
Figure 2.30: Comparison
2.8.1
Open-loop testing
In linear systems, open loop testing of a complex system is a necessary step but it can also be a useful technique for nonlinear systems, where the commutative, associative and distributive mathematical laws are not really applicable. Thus, the normal superposition laws cannot be applied effectively [Signal processing of random physiological signals-Charles Lessard]. That said, there are still benefits for carrying out open-loop tests. For individual stages, the expected output signals can be examined to ensure correction circuit operation. However, when the loop is closed, the dynamics and signals will change drastically. Having tested all the individual stages, it’s now time to put them all together but the loop is still kept open. We need to carry out open-loop testing before closing the loop by applying a sine wave to the input and observing and recording, the signals at each stage. The ramp growth factor, R signal is not applied so apply a constant growth factor value of 1, a 1 V DC or a CONST part to the second AD633 IC. This simplifies the signals for analysis purposes. We can match these signals to any previous individual stage testing carried out. However, we have to be careful that successive stages when added, do not load the previous stages, as this will change the performance. This might mean adding a unity gain buffer amplifier. The closed loop gain controls the first bifurcation point which happens at a growth rate equal to 3, so we need to have a means of controlling this gain. We can do this using a separate operational noninverting amplifier stage, or we can use the z-input and a potentiometer to control the gain. For our first attempt, we used the LF398 sample and hold IC initially, as the configuration shown requires only one clock. However, later, we will use a modern version of this, the SMP04EP, sample and hold IC which has an output whose gain can be set using external connections and also has internal hold capacitors.
2.8.2
Complete Logistic system
In this section, we put all the logistic subsystems together and carry out open-loop tests before finally closing the loop. The results will not be repeated since they are the same as previous testing output.
Figure 2.31: Complete circuit 2-28
2.9 Lyapunov exponent The Lyapunov Exponent (LE), measures in phase space, the divergence (or stretching) of the trajectory for each point over time. As the LE increases positively, then the time which we can predict the future trajectories becomes shorter. Folding is one of the necessary conditions for chaos and represents a loss of information and is the entropy of the system. There are as many Lyapunov exponents as there are dimensions in the phase space, but the largest one is important because it determines the predictability of the system. In a linear system, we consider the motion of the Lyapunov exponents as the real parts of the eigenvalues around an infinitesimally small sphere. The trajectory will distort into an ellipsoidal in each axis direction. The LE is not a conclusive measure for chaosticity but returns a rate of exponential divergence from some perturbed initial conditions. However, in a dissipative chaotic system, there must be at least one positive LE. The Lyapunov exponent is calculated by obtaining the derivative of the iterated equation at each point in the time sequence. This exponent is the average value of the sum of the natural log of the absolute values of the derivative. If the value is negative, the iteration is stable and converges, but if positive, will start to diverge. Where the product of the derivative has a magnitude less than one, then each point on neighbouring trajectories will be pulled closer together after an iteration of the loop. Consider a small incremental change in y as y y . The rate of change of one variable with respect to the rate of change of another variable is the gradient of a function. In the limit, change to. Differentiating the logistic equation and taking logs to base two and solving for, the Lyapunov exponent, yields: dy (n) dy (0)2 n
1 dy (n) log 2 n dy (0)
y ( y0 , n) yn yn yn 1 y1 1 . ... lim log 2 n y0 yn 1 yn 2 y0 n y0 y 0 0
1 lim log 2 ( (R (1-2yn ) n n y 0
(2.18)
(2.19)
0
The units of lambda are bits of information for every iteration using the log to base two. The limit is necessary if the LE is to be independent of the initial conditions and represents the long-term behaviour. The largest positive LE dominates over all others as time goes to infinity. Lyapunov exponents quantify the amount of linear stability or instability of an attractor or an asymptotically long orbit of a dynamical system. Given two initial conditions for a chaotic system, a, and b, which are close together, the average values obtained in successive iterations for a, and b, will differ by an exponentially increasing amount. In other words, the two sets of numbers drift apart exponentially. If this is written 2n for n iterations, then 2 is the factor by which the distance between closely related points becomes stretched or contracted after an iteration. A derivation is available in 1. H. G. Schuster, Deterministic Chaos: An Introduction, Physics Verlag, 1984.
2-29
Figure 2.32: Lyapunov exponent with change of R Note the Lyapunov exponent is zero at each bifurcation. Bifurcation diagrams are produced in PSpice when the system parameter, R, is voltage-dependent. By varying the parameter very slowly, it may be considered nearly constant over several drive cycles. 2.9.1.1
The Gaussian or mouse map
The Gaussian map (mouse map got its name because the shape of the bifurcation map has a mouselike outline.
xn e xnd 2
(2.20)
We enter the equation into an ABM1 part as shown in Figure 2-49 and the delay is my analogue part.
V
exp(-alpha*v(ynd)**2)+V(beta) Initial Conditions Name Beta
ynd
yn
ABM1
1
V
Vb etaSwee p T1 = 0
V1 = -1
System equation
1u
PARAMETERS:
U1 IN
OUT
ANAL OGDELAY
2
ynd
Dela y = 10 u al pha = 6 be ta1 = -0.58
DELAY = {1 0u}
T2 = 1 00m V2 = 1
0
To get an0 orbit diagram ynd Vs yn, {schedule(0,100u,10m,1u,20m,100n,30m,10n)} change v(beta) to beta1 in the expression http://en.wikipedia.org/wiki/Gauss_iterated_map
Figure 2.33: Gaussian_map1 To plot the orbit diagram, set beta to 10.3, and in the expression box in the ABM1 part change v(beta) to beta1. The beta sweep is provided by a Vpwl part.
Figure 2.34: The orbit diagram The bifurcation diagram in Figure 2-51 has an unusual shape.
2-30
Figure 2.35: Bifurcation diagram, sweeping beta from -1 to 1 (2) investigate the odd logistic shown in Figure 2-52. 1
yn
OUT
IN 0
PARAMETERS:
DELAY = 10u V
R 1u
OUT
Logistic equation
V
V1 T1 = 0
Initial conditions
ANAL OGDELAY 2 OUT IN
ynde lay
V1 = 0
T2 = 4
U1 1
DELAY = {Del ay}
y(n) = R{y(n-1){1-y(n-1)^2}
V2 = 4
0
Figure 2.36: Odd logistic
Figure 2.37: (3) Investigate the logistic-type function x(n) 1 x2 (n 1) , 0 2
(2.21)
1.0V
1.000 OUT
ANALOGDELAY y ndelay 2 xndelay OUT IN
U1 1
v(xn)
xn
DELAY = {Delay }
V
0V
u
PARAMETERS: Vu
T1 = 0 T2 = 2
0
Note tangential distortion
Delay = 100u
V
V1 = 0
Change axis to v(u)
V2 = 2
-1.0V
xn=1-uxnd^2
0V
Figure 2.38: (a) ABM circuit logisticsquared.opj
0.4V
0.8V
1.2V
1.6V
2.0V
V(XN) v(u)
(B) The bifurcation plot
(4) Investigate the quartic map defined: xn R(1 (2 xnd 1) 4 )
The quartic map R between 0.8 and 1 Figure 2-55.
2-31
(2.22)
Figure 2.39: (5) The Matthews map
1 x(n) (1 R)(1 ) R xnd (1 xnd ) R , R (0, 4) R Logistic equation yn
Delay T1
PARAMETERS:
DELAY = 100u
V
Z0 = 50
T3
Z0 = 50
T2
Z0 = 50
y ndelay zn V
IC VR
Vic
TF = 100u PW = 100u
V1 = 0 3.4
V
TD = {delay }
TD = {delay }
TD = {delay }
R5 50
TD = 0 TR = 100u
V2 = 0.2
PER = 10 DC = 0
R1 50
Initial conditions
y(n) = Ry(n-1){1- y(n-1)] = R{y(n-1) - y(n-1)^2}
0
Figure 2.40: x2
2.10 The logistic model using an analogue delay The logistic equation normally uses a sample and hold mechanism for the time delay, but here we investigate a novel method using the delay experienced in a chain of operational amplifiers shown in Figure 2.42. This is an easier method to implement than the systems explained in a previous section. SET = 1 R2
3
in
U1A4
po s V+
+ TL 084 OUT
2
po s 15 Vdc
R1
0
10 0k
11 ne g V-
9
TL 084 OUT 10
+ 4 U1C
0
8
5
11 ne g V-
13
-
V2
ne g
V1
1
10 0k - 11 ne g V-
R4
10 0k
TL 084 10 0k12
+ 4 U1D
po s V+
OUT
14
6
po s V+
+ TL 084
-
R3
U1B4
OUT
7
ou t
- 11 ne g V-
po s V+
0
15 Vdc
Figure 2.41: The pot R4 shifts the bifurcation point We place this design in a hierarchical block as shown in the ABM circuit in Figure 2.43.
2-32
An alog _Delay
yn
in
U1
ynd 1
ou t
V
DELAY = 1 0n
INPUT OUTPUT V
2 pe ak V
pe akm eter
D
R 10 0u
T1 = 0 V1 V =0
Vp wl 1
T2 = 4 m V2 = 3 .9
0
2.42: OPAMP.DSN in misc The bifurcation parameter is achieved using a sawtooth generator produced by the VPWL generator. The growth factor is swept over the range 0 to 3.9. 1.0V
Logistic using analog delay V(YND) 0.8V
0.6V
0.4V
Change time to v(R) 0.2V
0V 2.90V V(YND)
2.95V
3.00V
3.05V
3.10V
3.15V
3.20V
3.25V
3.30V
3.35V
3.40V
3.45V
3.50V
v(R)
Figure 2.43: step 100p 978mV
v(ynd) (3.03096 ms, 627.6842 mV) 800mV
v(yn)
600mV
(3.03069 ms, 573.9245 mV)
400mV
The analog delay is (3.03096 ms-3.03068 ms) = 2.6 us
200mV
3.0304ms 3.0305ms 3.0306ms V(Delay:IN) V(YND)
3.0307ms
3.0308ms
3.0309ms
3.0310ms
3.0311ms
3.0312ms
3.0313ms
3.0314ms
3.0315ms 3.0316ms
Time
Figure 2.44: Analogue delay output 270m
240m
DB(V(YN)*V(YN))
200m
FFT for the logistic analogue delay 160m
120m
80m
40m
0 300.0KHz DB(V(YN)*V(YN))
1.00MHz
3.00MHz Frequency
Figure 2.45: FFT
2-33
9.36MHz
1000mV
900mV
First bifurcation 800mV
One half of the bifurcation diagram 700mV
Other half
600mV
2.700V V(OUT)
2.800V
2.900V
3.000V
3.100V
3.200V
3.300V
3.400V
3.453V
v(R)
Figure 2.46: Bifurcation diagram 15mV
10mV
5mV
SEL>> 0V V(ynd) 5.0mV
2.5mV
0V 0Hz
1.0MHz
2.0MHz
3.0MHz
4.0MHz
5.0MHz
6.0MHz
7.0MHz
8.0MHz
9.0MHz
10.0MHz
11.0MHz
V(out) Frequency
4
2.47:
VOFF = 0 VAMPL = 0.1 FREQ = 10k AC =
Vin
V+
+
V
1
TL084 OUT
2
V
- 11 R1 neg V-
0 sd
J2
g
pos
U1A
3
5k V2
pos
T1 = 0 VV1 = -3 T2 = 5m V2 = 0
neg
V1 Vtriangle
0
15Vdc
0
15Vdc
Figure 2.48:FET_VCR.opj in misc 100m V
0V
-1 0 0 m V V ( U 1 A :+ ) 4.0V
Gain increasing 0V
SEL>> -4.0V 0s V(R1:2)
1.0ms 2.0ms V(J2:g)+3
3.0ms
4.0ms
5.0ms
Time
Figure 2.49: LOGICAL_USING_LAPLACE_DELAY_AND_SAWTOOTH_VERHULSTEQN.DSN 2-34
log(abs(V(R)*(1-2*V(yn))))
0.01
IN
OUT
1 IN
1.008
OUT
0
V
ANAL OGDELAY
Logistic equation ynde lay
Value = {IC}
2
OUT
IN
0V
U1 1yn
DELAY = {Del ay}
OUT
R
Initial VR conditions
PARAMETERS:
T1 = 0 V1 = 0
Delay = 10u IC = 1u R=4
T2 = 4 V2 = {R}
0
lo g
LOG10 OUT IN
ab s
ABS OUT IN
d/dt
mu lt
OU T IN
V
GAIN = 100 R
Figure 2.50: LYAPUNOVMETERFINAL.DSN
Figure 2.51
2.11 Encoding OUT
1 IN 0 y nd
ANALOGDELAY U2 2 OUT IN V
IC V1 = 0 V2 = 2m TD = 0 TR = {delay } TF = {delay } PW = {delay } PER = 10
1
DELAY = {Delay }
yn V
PARAMETERS:
R = 4.1 Delay = 100u
{R}
V1
0
Figure 2.52: 1.0
0.8
0.6
Gap 0.4
0.2
0 0s v(yn)
0.2ms 0.42 0.573
0.4ms
0.6ms
0.8ms
1.0ms Time
Figure 2.53:
2-35
1.2ms
1.4ms
1.6ms
1.8ms
2.0ms
yn
O r b i t
1.2V
(0.573 V, 1)
(0.42 V, 1)
V(YN)
Fixed point (756m,754m)
1.0V
For R = 4.1 Gap
0.8V
0.6V
0.4V
0.2V
v(ynd) 0V 0V V(YN)
0.1V 0.2V V(YND)
0.3V
0.4V
0.5V
0.6V
0.7V
0.8V
0.9V
1.0V
1.1V
V(ynd)
Figur 2.54: 4.2V
zero line
0V
-5.0V
Note at R = 2, the system heads off to - infinity-very stable -10.0V
V(LIA1)
0
1.0V
0.5V
SEL>> 0V 1.240V 1.400V V(YN)
1.600V
1.800V
2.000V
2.200V
2.400V
2.600V
2.800V
3.000V
3.200V
3.400V
3.585V
V(R)
Figure 2.55:logistic_parallel_CCT.opj in logistic Compute the Lyapunov exponents We may compute the Lyapunov exponent for a range of growth factor values between 3 and 4, and an initial condition, xo, by iterating the loop (but disregarding the transient or start-up part at the start of the trajectory. Compute the natural log of the absolute value of the differential of the logistic equation for each value of the growth value for about 100 iterates. Repeat this for N iterations at each R value and then add the computed value to a growing sum and divide by N =10,000 to give Lambda. Lnf’(xn)=Ln|(r-2rx)|.
In [Kocarev and Jakimoski, 2001] presents a new block encryption algorithm based on the logistic map. Although the chaos in the logistic map ^
yn ( ynd p) mod1 2-36
(2.23)
The logistic equation is not robust but can be made so by replacing y with y = (^y + p) mod 1, where
^y yhat yn (0,1) 2 [0; 1] and p is the key (a real number). By carrying out a cryptanalysis, it is shown that the algorithm is resistant to known-plaintext attack. Some open problems in chaotic encryption are posed in [Li et al., 2003], along with cryptanalyses and reviews of some other chaotic encryption schemes. From Nui thesis. X1
1
R*v (X1d)*(1-v (X1d))
ANALOGDELAY U1 IN
2
OUT
X1d
Initial Conditions X1
IN ABM1 OUT
DELAY = {Delay } Delay
X2
1
ANALOGDELAY U2 IN
OUT
System equation
Vic1
0
R*v (X2d)*(1-v (X2d)) 2
X2d
V1 = 0 V V2 = 0.4 TD = 0 TR = 10n TF = 10n PW = {Delay } PER = 1 DC = 0 X2
IN ABM1 OUT
DELAY = {Delay } LOG((V(X2)- V(X2d))-(V(X1)- V(X1d)))
PARAMETERS:
Vic2
delay = 1u R = 0.95
0
DC = 0 V V1 = 0 V2 = 0.41 TD = 0 TR = 10n TF = 10n PW = {Delay } PER = 1
Figure 2.56: START_LIAPUNOV_TWO_CIRCUITS.DSN 0
Transient region -10
-20
-30
-40
LOG((V(X2)- V(X2d))-(V(X1)- V(X1d)))
-50
-60 0s
50us 100us LOG((V(X2)- V(X2d))-(V(X1)- V(X1d)))
150us
200us
250us
300us
350us
400us
450us
500us
Time
T. Y. Li and J. A. Yorke, “Period three implies chaos”, American Math. Monthly, vol. 82, pp. 481485, 1975.
2-37
An alog _Delay DELAY = 1 0n U1 pe ak 2 OUTPUT INPUT
1 ynd
ou t
yn
in
V
pe akm eter
D ou t
eq
ou t V1 VOFF = 0 VAMPL = -0 .5 FREQ = 1meg AC =
V
m
V
10 0u
V
R
V1 V = 0 T1 = 0
Vp wl 1
V2 = 3 .9 T2 = 4 m
0 0
Need 100p step size but long time to simulate 0.985 SET = 1 R2
3
in
U1A4
pos V+
2
R1
1
9
10
TL084
0
OUT
+ 4 U1D
pos V+
U1B4
pos V+
+ TL084
-
R3
8
100k12
+ 4 U1C
V2
11 neg V-
13
TL084 OUT
- 11 neg V-
pos 15Vdc
5
11 neg V-
100k
neg
V1
97.5k
100k
+ TL084 OUT
R4
14
6
OUT
7
out
- 11 neg V-
pos V+
0
15Vdc
0
Figure 2.57:
Figure 2.58:
0.1
0
3 4
OUT
8
X1 X2
V+ W
AD633J/AD
Y1 Y2
V- Z 5 neg1
7
3
R1
+
TL084
10k
6
2
R2
pos1
U2A
90k
Analog_Delay
V+
1 2
in
4
pos1
U1
- 11
OUT
1
in
in
out
1
U3 DELAY = {10n} INPUT OUTPUT peakmeter V
neg1 V-
D
R3
in
1.2k
Vtriangle VOFF = 0 VAMPL = 0.2 FREQ = 10k
Vopen_circuit_test
T1 = 0 V2 = 0 T2 = 5m V1 = -4
0
V3
V4
neg1
V
pos1
g
sd
J2
R
inx
15Vdc
15Vdc
0
0
Figure 2.59: NEWLOGISTICANALOGDELAY.DSN 2-38
2 V
3) xorchaoslogistic.pdf SCHEME FOR OBTAINING THE FUNDAMENTAL NOR 1.018
yn
yns
S1
ynsd
S2
OUT 1u T1 = 0V1 = 1 uVclk
V
PARAMETERS:
ROFF = 1meg
Clock_ invert V1 = 0 Ch1
V1 = 0 V2 = 4 TR = {0.1 *p eriod } TF = {0 .1*peri od} PW = {0.2*perio d} PER = {perio d} TD = 0
T2 = 4 0m V2 = 4
+
Sbre ak
Clock
R
Vp wl
ROFF = 1meg RON = 1u
+ -
-
+ -
+
V
Sbre ak
{C}
V2 = 4 TF = {0 .1*peri od} TR = {0.1 *p eriod } PW = {0.2*perio d} PER = {perio d} TD = {0.5 *period}
Vclkinv
IC = 1u
Ch2
{C}
IC = 0 VC1 = 1m
pe riod = 1u C = 2n
0 {schedule(0,1u,29m,50n,33m,25n,34.25m,10n)} {schedule(0,10u,29m,1un,33m,100n)}
Figure 2.60: log:
2.12 Sweep generator Note, we place an initial voltage of – 1V on the sweep capacitor, C to overcome convergence problems. If(V(%IN)100,0,V(%in)),V(%in)) 1
+
Clock
R
OUT
ROFF = 1meg RON = 1u
y nsd Sbreak
V
+ -
-
+ -
+
Sbreak 1u
S1
y ns
S2
-
yn
ROFF = 1meg
Clock_invert Vclkinv
PARAMETERS:
V1 = 0 V2 = 5
V1 = 0
period = 1u
V
Vpwl
C = 15n
V2 = 5 TR = 100n TF = 100n PER = {period} PW = {0.01*period} TD = 0
Vclk T1 = 0
V1 = 1u
T2 = 4m V2 = 4
Ch1
{C}
Ch2
{C}
TF = 100n TR = 100n PW = {0.01*period} PER = {period} TD = {0.5*period}
IC = 1u
IC = 1u
0
Figure 2.61: LOGICAL_ABMSWITCHES_SEPT.opj 2 yn
OUT
IN
PARAMETERS:
-2 exp(-s*delay )
DELAY = 1m
V
1
1 s 10m, delay 100u
y nd R V1 T1 = 0 V1 = 1u T2 = 10
V
1u y ndsq
V2 = 4
0
y(n) = y(nd)+Ry(nd){1-y(nd)] 0
Figure 2.62: R27 R32
ynd
100k neg OPAMP
100k
pos
IN
yn
1
in
ramp
pos
V11 VOFF = 0 VAMPL = -1 FREQ = 20k AC =
V
m
ramp
V
V6
T1 = 0V1 = 1u
V10
V9 15Vdc
15Vdc
T2 = 4m V2 = 3.9 DC = 0
R34
1
-
VPOS
X1
W
2
7y ndsqx
R36 + U5
V
AD633 Y1
0
4
Y2
0
VNEG 5 neg
Z
6
y nd_y ndsqx
neg OPAMP
pos
V
2
0 3 ramp 4 0
zx V12 5m
0
R26
pos U14 1
OUT
1k
X2
3
10k
pos 8
U2
X1
8
R31 VPOS W
10.3k neg
7
X2
-
V
AD633 Y2
OPAMP
1k
Y1
OUT VNEG Z 5 NEG
6
zx
0
+ U6
Analog_Delay 3 my n
in V
pos
out
my nd V
D1
0
Figure 2.63: ANALOGDELAYLOGISTICOPENCIRCUITTEST.DSN in misc
2-39
neg
V
eq
0 R35 10k
V
OUT
100u
0
in
DELAY = 250n U8
ANALOGDELAY
in
OUT + U7
2
V
1.0V
0V
-1.0V V(IN)
0V
-1.0V SEL>> -2.0V V(YND_YNDSQX)
0V
-1.0V
-2.0V 0s
50us
100us
150us
200us
250us
300us
V(EQ) Time
Figure 2.64: The Lyapunov exponents, λi, are calculated using natural logs: 1 dLi (n) ln mi (n) nlim t dr
1 n
i lim ln n
Here, m(t) are the eigenvalues of the system. 1/19
3.3 0V
lo g
LOG10 OUT IN
ab s
ABS OUT IN
mu lt
eq n
1.000
2
R
0 T2 T0
IN1 V
IN2
V
V
1
0V
log(abs(V(%IN2)-V(%IN1)/V(%IN1)))
T1
OUT
IN
li a2
{1/19}
OUT
0
Delay
PARAMETERS:
ynde laysq
DELAY = 1
IN
1
OUT
U1 OUT
2
IN1
4
2
IN2
T0
T1
ANAL OGDELAY R DELAY = {Del ay}
DC = 0
IN
1
T2
ANAL OGDELAY
V1 = 0 V2 = 0 .333 33 TD = 0 TR = 1m
Vi c1
U2 OUT
DELAY = {Del ay}
PW = 1 PER = 30 TF = 1 m
0 0
0.8889
0.3951
0.9560
0.1684
0.5601
0.0570
0.2151
0.6753
0.8770
0.4314
0.2739
0.7955
0.6506
0.9092
0.3301
Figure 2.65: LIAPUNOV_MEASUREMENTS.DSN
2-40
0.9855
0.9812
0.0739
Figure 2.66: 0, 0.8889, 0.3951, 0.956, 0.1684, 0.5601, 0.9855, 0.057, 0.2151, 0.6753, 0.877, 0.4314, 0.9812, 0.2739, 0.7955, 0.6506, 0.9092, 0.3301
avg(ln(abs(v(R)*(1-v(yn)))))/240 s(log(abs(d(V(yn)))))/200 We may use the LE to characterize a chaotic system by calculating the average rate of convergence or divergence of the attractor in state space [ ]. A quantitative measure of the sensitive dependence on the initial conditions; The average rate of divergence (or convergence) of two neighbouring trajectories; Even qualitative predictions are impossible for a time interval beyond the prediction horizon.
Logistic equation yn
Delay
y(n) = Ry(n-1){1- y(n-1)] = R{y(n-1) - y(n-1)^2} T1
Z0 = 50
y ndelay
TD = {delay }
R3 R
IC1 TD = 2.97 Vic TR = 100n TF = 100n V1 = 0 PW = 6m PER = 5 V2 = 0.2 DC = 0
10k Vstair
TSF = 1 VSF = 1.013
C1 10n
PARAMETERS:
R1 DELAY 50
= 100u
R2 50
c:\chaos\my stair.txt
0
Initial conditions
From experimental evidence [IEEE TRANSACTIONS ON EDUCATION, VOL. 42, NO. 3, AUGUST 1999 205 Discrete-Time Analysis of Linear and Nonlinear T. G. Engel, Member, IEEE, and Maria Jackson, Student Member, IEEE], {PT We can compare the bifurcation diagram of the logistic to the Lyapunov exponent diagram, both plotted with the growth factor on the x-axis. If we consider the fixed point at the origin, then the Lyapunov exponent is negative but increases to zero when this fixed point becomes marginally stable at r = 1. The exponent increases in a positive direction towards zero at each period-doubling bifurcation point. For r = 3:57 and increasing in value the system becomes chaotic and the exponent is positive but returns to a negative value at each periodic windows, of which there are infinitely many. It reaches its maximum value of log 2 when r = 4.
2.13 The Hénon equations Michael Hénon, a French astronomer-b1931-, whilst trying to make sense of the complex trajectory of stars moving in a galaxy, created a Poincaré section because a 2-D picture gives a much clearer 2-41
picture. In doing so, he created an equation similar to the logistic equation. Strogatz describes how Hénon created this elegant map which involves stretching and folding similar to that in the Lorenz system. However, the Hénon strange attractor is quite different and does not form closed surfaces as we see in the Lorenz attractor. The Hénon discrete-time system is described by two coupled equations: xn 1 ynd axnd 2
(2.24)
ynd bxn 2 d
(2.25)
xn 1 bxn 2 d axnd 2
(2.26)
Substituting (5.3) into (5.2):
Here a controls the nonlinearity and b the dissipation. Making the b coefficient zero turns this system into the logistic system examined earlier. To examine the trajectory near the fixed points, we obtain the derivative for each state space parameter using the two-dimensional Jacobian matrix which shows how each variable behaves with respect to each other. Let xn = xnd = x*, then:
x* 1 ax*2 bx* ax*2 (b 1) x* 1 0
(2.27)
Calculating the roots of this equation for a = 1.4, b = 0.3 (the original Hénon values), gives (b 1) (b 1)2 4a 1.1313 and 0.631 2a
(2.28)
Linearizing the Hénon map using the Jacobean (Strogatz)
f f xn x y x nd J g g yn x y xnd
xn ynd yn ynd
2ax 1 b b 0
(2.29)
Thus, the determinant of the Jacobean is –b. To implement these equations, we use the ABM approach as before but this time we require two delays in the loop.
Figure 2.67: Modelling the Hénon equations using ABM parts (HÉNONACONSTANT.DSN)
2-42
Figure 2.68: Hénon time series and FFT We can see the identity line in Figure 2-70 cuts the map at the fixed point of 631 mV, but not all of the apparent intersections are fixed points!
Figure 2.69: Hénon strange attractor
2.14 Bifurcation The Hopf bifurcation diagram in Figure 2.71 uses ramp generator achieved using a VPWL part to vary the ‘a’ factor. DELAY = 1u
OUT
2 IN -2
PARAMETERS:
V
a = 1.3 b = 0.4
xnminus1
{a}
xn
V
ramp T1 = 0 V2
V1 = 0
OUT
1
V
T2 = 10m V2 = 1.4
0
bxnminus2
ANALOGDELAY
{b}
xnminus2
2
U2 OUT
IN
DELAY = {Delay }
Figure 2.70: Hénonramp
2-43
1
2
ANALOGDELAY U1 OUT
IN
DELAY = {Delay }
1
Henon equation 2
xn
OUT
IN -2
PARAMETERS:
DELAY = 1u
xnminus1
b = 0.4 ramp
T1 = 0
V1 = 0
V
1
OUT
V2
T2 = 10m V2 = -1.4
0 ANALOGDELAY
bxnminus2
2
xnminus2
{b}
V
OUT
IN
ANALOGDELAY
U2 1
2
{Delay }
OUT
IN
U1 1
{Delay }
V
Vic
V1 = 0 V2 = 1u TD = 0 TR = 100n TF = 100n PW = 1u PER = 1 DC = 0
0
Figure 2.71: Hénon in book6/circuits/Hénon\Hénonrampnoise.opj see bifurcationbrain.pdf Investigate the effects of varying the constant ‘b’ on the bifurcation plot. 1.5V
1.0V
First bifurcation
Stable region 0.5V
Second bifurcation
-0.0V
V(XN) -0.5V
-1.0V
Chaotic region
Change time to - V(Ramp) -1.5V 0V
0.1V
0.2V
0.3V
0.4V
0.5V
0.6V
0.7V
0.8V
0.9V
1.0V
1.1V
1.2V
1.3V
1.4V
V(XN) - V(ramp)
Figure 2.72: Bifurcation diagram for the Hénonramp system note the minus Ramp (1.047-0.446)/(1.146-1.047)=6 ?The tangential distortion observed at the bifurcation points results from sweeping the bifurcation parameter too fast.
2.15 Sine map Sine chaos gro wth1
Vs tair
(v(growth1)/pi)*sin(pi*v(ynd))
TSF = 1
System equation
VSF = 1
Name ynd
TD = {del ay}
iterati ve = 5 m
yn R4 10 0
V
d:\FEB20 10\chao s\mystair1.txt
Dela y = 10 0u T1
ABM1
0
PARAMETERS:
Initial Conditions
10 u
R2
10 0
Z0 = 1 00
mystair starts from 2, mystair1 starts from 0 {schedule(0,1m,3,10u)}
0
v(growth1)*(v(y)-pi**2*v(y)**3/6 + pi**4*v(y)**5/120 - pi**6*v(y)**7/(120*42)) sinx = x - x^3/3! + x^5/5! - x^7/7!
OUT
2 IN -2 System equation
y
Name
yd
ABM1 V
10 u
T2
R5 10 0 = {del ay} TD
R3
10 0
Z0 = 1 00
0 Parts used: Vpulse, LAPLACE, ABM1, SUM, CONST, R, T, and LIMIT
Figure 2.73: See circuits/misc 2-44
Figure 2.74: Sine map
2.16 The sine map The sine delay model is displayed in Figure.
The Cosine delay Henon model xn
{a}*cos(V(%IN))
PARAMETERS:
DELAY = 10u
V
a = -0.4
xn-1
b = -1 V
1 V1 = 0 V2 = 1 TD = 0u TR = 100 n TF = 1 00n PW = 10 u PER = 1
U1 IN
OUT
ANAL OGDELAY
V2
2
1 V
U2 IN
OUT
2
xn-2
b V
ANAL OGDELAY
x(n) = acos{x(n-1)} + x(n-2) x(n) = bx(n-2) + a cos(x(n-1)
0
Figure 2.75: DELAYEDHÉNONCOSINE.DSN in Hénon Repeating exercise 1 but using a sine in the ABM1 part. Investigate the following quadratic areapreserving Hénon map:
xn xnd cos ( ynd xnd2 )sin
(2.30)
yn xnd sin ( ynd xnd2 )cos
2.17 Lozi map xn V
{a}
ABS OUT IN
2
xnd 2
U2 OUT
IN
1
ANAL OGDELAY V
OUT
1
U1 OUT
IN
ANAL OGDELAY DELAY = {Del ay}
DELAY = {Del ay}
PARAMETERS:
DELAY = 10u
a = 1.4 This is a triangle wave for producing a ramp
V
V1 = 0 IC
DC = 0 Vi c
bxnm inus 2
V2 = 1 u
b = 0.3
{b}
xnmi nus2
TD = 0 TR = 100 n TF = 1 00n PW = 1u PER = 1
xn=1-a|xnd|+ynd yn=bxnd so xn=1-a|xnd|+bx2nd a=1.7, b 0.5
0
2.76:Lozi.opj in Hénon
2-45
1
1.6V
1.2V
Lozi Map for a = 1.3, b 0.5
0.8V
0.4V
0V
-0.4V
-0.8V -0.8V -0.4V V(xnminus2)
0V
0.4V
0.8V
1.2V
1.6V
v(xn)
Figure 2.77
V
ABS OUT IN
xnd1
PARAMETERS:
DELAY = 1u V1 = 0 .8
V2 = 1 .8 T2 = 1 00m OUT
a = 1.7 b = 0.5
T1 = 0 a
1
xn1 0 This is a triangle wave for producing a ramp V1 = 0 IC
DC = 0 Vi c
V2 = 1 u
{b}
TD = 0 TR = 100 n TF = 1 00n PW = 1u PER = 1
xnmi nus2 1
DELAY = {Del ay} U4 2 OUT IN ANAL OGDELAY
0
1
DELAY = {Del ay} U3 2 OUT IN
1
ANAL OGDELAY
xn=1-a|xnd|+ynd yn=bxnd so xn=1-a|xnd|+bx2nd a=1.7, b 0.5 a= 0.9, b = -1
See hen a=1.2; b=0.4; N=6000; x = zeros(1,N); y=zeros(1,N); x(1)=0.1; y(1)=0; for n=1:N x(n+1)=1+y(n)-a*x(n)^2 ; y(n+1)=b*x(n); end From nonlinear physics mathematica with a and b, positive real constants.Hénonreport.doc in another stuff directory We may produce a PRNG by inputting two Hénon circuits to an exclusive OR gate as shown in Figure 2.81. This arrangement we will show, produces a uniform PSD, one of the requirements for robust pseudo-random generators.
2-46
xn
ABS IN OUT
1 + 0.380*V(xn2) - 1.2547*V(xn1)*V(xn1) V
OUT
2 IN
OUT
IN V
-2
xn
U1
1
IN
2
OUT
1
xn1
IN2
OUT
ANALOGDELAY
U2 IN
2
OUT
xn2
U5
1
3
ANALOGDELAY
IN1
DELAY = 1u
XOR
10u OUT xn0
0.971769778274958 + 0.3802370169*V(xn2) - 1.25477362851774*V(xn1)*V(xn1)
ABS IN OUT
R1 10k
V
V
2
OUT
XOR
2
DELAY = 1u
0
IN
OUT
IN
-2
xn0
U3
1
IN
OUT
2
1
xn11
IN2
OUT
ANALOGDELAY
U4 IN
OUT
2
xn22
ANALOGDELAY
IN1
DELAY = 1u
DELAY = 1u
12u OUT 0.977309166044849 + 0.367653223040701*V(XN22) -1.25869685835127*V(XN11)*V(XN1) -0.0156469067204919*V(XN22)*V(XN22) + 0.0302901399425228*V(XN22)*V(XN11)*V(XN11) -0.000123359975258202*V(XN22)*V(XN22)*V(XN22)
Figure 2.78: HÉNONEUREQA.DSN in Hénon
2.18 Tent Map This chaotic map is referred to a tent map because of its unimodal map shape. This one-dimensional map obtained by plotting the output versus a delayed version of the output and is similar to the logistic function analysed elsewhere in this book. Sprott: The tent map that maps the interval -1 to 1, back onto itself, is called an endomorphism. Xn+1 = 1 - 2|Xn| The return map is very similar to the tent map: if 0 < x < 0.5 ïì 2 x, f ( x) = ïí ïïî 2 x - 1, if 0.5 < x < 1
This shows why the system is unpredictable: expand x as a binary ‘decimal”, like x=.1100101001.... (which means x =
1 1 1 1 1 + + + + + 2 4 32 128 1024
Then, the effect of f is just to strip off one binary place at a time, i.e. for the above x, f(x) = 0.100101001... Thus the nth binary place is 0 or 1, if and only if, the nth loop in the future of x goes to the left or right wing of the butterfly. Thus, the nth cycle in the future is buried in the finer and finer approximations to the number x. The return map shows how one point differs from the next point. If the data is random, then a return map will be a distribution of points scattered in a random fashion. The map is plotted by making a new series comprising successive maximum or peak values in the series. The return map doesn’t show a definite peak but a cloud of points near the peak. To approximate a complicated function by a simpler function that is accurate only within a small portion of the complicated function's range. In other words, if f(x) is the complicated function, and a is the point at which we want our approximation to be accurate, then we couldn't care less how accurate the approximation is for x far from a. PARAMETERS: IN1 OUT
IN2
R=2
if(V(x)
