Characterization of IGCTs for Series Connected ...

Characterization of IGCTs for Series Connected Operation A. Nagel, S. Bernet, T. Brückner, P. K. Steimer, O. Apeldoorn IAS, October 2000, Rome, Italy

Copyright © [2000] IEEE. Reprinted from the Industry Applications Society.

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ABB Corporate Research

Characterization of IGCTs for Series Connected Operations

Characterization of IGCTs for Series Connected Operation A. Nagel, S. Bernet

T. Brückner

P. K. Steimer, O. Apeldoorn

ABB Corporate Research D-69115 Heidelberg Germany

Dresden University of Technology Institute of Electrical Power Engineering D-01062 Dresden, Germany

ABB Industrie AG CH-5300 Turgi Switzerland

Abstract ó This paper describes the series connection of Integrated Gate Commutated Thyristors (IGCTs) using RCsnubbers. An experimental setup with a power rating of 6kV, 4kA is used to analyze the dynamic and static behavior of the series connected IGCTs in detail. The mechanism of thermal stabilization of series connected IGCTs is discussed. It is shown that a good voltage balancing can be achieved by small RCsnubbers due to the fast switching IGCTs.

I. INTRODUCTION The development of new high power semiconductors such as 3.3kV, 4.5kV and 6.5kV Insulated Gate Bipolar Transistors (IGBTs) and 4.5kV to 5.5kV Integrated Gate Commutated Thyristors (IGCTs), improved converter designs and the broad introduction of three-level topologies have led to a drastic increase of the market share of PWM controlled Voltage Source Converters. Meanwhile these converters, ranging from 0.5MVA to 10MVA, are becoming price competitive against conventional thyristor converters since reduced line harmonics, a better power factor, substantially smaller filters, elimination of transformers and the use of optimized electric machines enable a cost reduction of the system in many applications within industry, distribution and transmission [1], [2], [3]. A clear market trend of adjustable speed Medium Voltage Drives (MVDs) is the increase of the rated motor voltage.

However, today the maximum achievable converter output voltage of a three-level neutral point clamped voltage source inverter (3L NPC VSI) using 5.5kV IGCTs is limited to 4.16kV. To achieve higher output voltages the series connection of semiconductors is necessary (e.g. two 4.5kV IGCTs for a 6kV drive, see Fig. 1) [4], [5]. Active clamping or dv/dt-control are currently used to balance the voltage distribution of series connected IGBTs during switching transients while operating the IGBTs within the linear region. This is impossible with the IGCT due to the latching thyristor structure. Thus, the use of external circuitry across each of the series connected IGCTs is necessary to realize an equal voltage distribution between the devices.

II. SERIES CONNECTION - BASIC CONSIDERATIONS For the series connection of semiconductor devices the voltage balancing has to be guaranteed for the • blocking mode as well as • the turn-on and turn-off transients. The voltage symmetry during blocking can be achieved using balancing resistors in parallel to the devices (see Rp in Fig. 2), as described in section V. The more critical point of operation are the switching transients. Here, the voltage sharing is compromised due to

LS1 DC1 V dc

T11

R S1

D15

T12

T21

D25

T22

T31

D35

T32 v 1..3 iph (1..3)

C C1

C C2 V dc

R S2

DC2

D16

T13

D26

T14

T23

T24

D36

T33

T34

LS2

Fig. 1. Three-level neutral point clamped voltage source inverter (3L NPC VSI) with series connected IGCTs. ISA

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• time deviations of the switching signals (e.g. variation of delay time of the gate units) and • different switching behavior of the power semiconductors itself. To achieve a sufficient voltage balancing the conventional RCD-snubber (see Fig. 2(a)) is a common solution for Gate Turn-off Thyristors (GTOs) and IGCTs [2], [5], [6]. However, this circuit has the following drawbacks: • Fast, expensive diodes have to be used, because an turnon transient of the IGCT while current is still flowing into the snubber diode will cause substantial di/dt and dv/dt stress of the rapidly turning-off diode, requiring an extended safe operating area (SOAR). • The necessary adherence of a minimum turn-on time to discharge the snubber capacitor limits the dynamics of the converter. These disadvantages can be avoided or decreased using a simple RC-snubber shown in Fig. 2(b) [4]. The capacitor value can be chosen quite small, due to the well defined fast switching transients of IGCTs. However, to improve the voltage sharing during turn-off transients and to reduce the IGCT turn-off losses a large snubber capacitor C Snub as well as a small snubber resistor RSnub are advantageous. On the other hand, large values CSnub cause substantial turn-on losses in the IGCT as well as additional losses in the snubber resistor. As a third parameter the leakage inductance L ,Snub of the RC-snubber affects the voltage balancing, turn-on and turn-off losses. The design tradeoffs are summarized in Tab. I in a qualitative manner. To find a suitable combination of RSnub , CSnub and L ,Snub the following parameters which influence the voltage balancing within a series connection have been taken into consideration: • DC-link voltage, • output phase current, • switching behavior of the IGCT itself, • delay time between gate signals ∆t Gate = tGate2 − tGate1 ,

• •

device junction temperatures (absolute temperature ϑ j and temperature difference ∆ϑ j = ϑ j2 − ϑ j1 between two devices), snubber tolerances ∆CSnub , ∆RSnub , ∆L ,Snub .

To describe the voltage balancing of two series connected devices the voltage deviation ∆V from a perfect symmetrical voltage distribution is applied. Due to the real voltage distribution of not identical semiconductors and gate units one switch has to take over Videal + ∆V while the other takes over only Videal − ∆V. In this paper two different voltage deviation values have been taken into account: • the maximum voltage deviation ∆Vmax during the entire switching transient which is important to avoid device destruction by an overvoltage and • the steady state deviation ∆Vstdy which basically influences the reliability of the switches due to the dramatic increase of the semiconductor failure in time (FIT) rate at higher blocking voltages, caused by cosmic radiation [7]. III. EXPERIMENTAL TEST SETUP To analyze the behavior of two series connected IGCTs with RC-snubber the test circuit depicted in Fig. 3 and Fig. 4 is used. It enables the investigation of all types of commutations occurring in a two-level VSI and a 3L NPC VSI using IGCTs. The component values of this test setup are specified in Tab. II. L1

D3

L

D4 + ó

IGCT 1 IGCT 2

VDC

Iout R1

C1

D1 D2

Fig. 3. Schematic of the 6 kV, 4 kA test setup without snubbers. Dsnub

Rsnub

Rsnub

Rp

C snub

Rp

TABLE II COMPONENT VALUES OF THE TEST SETUP ACCORDING TO FIG. 3

C snub

(a)

(b)

Fig. 2. Series connection of IGCTs with RCD-snubber (a) and RC-snubber (b)

variable

value

DC-link voltage

VDC

0 ... 6 kV

Output current

Iout

0 ... 4 kA

L1

8 µH

C1

5 µF

R1 L

1Ω 600 nH

TABLE I DESIGN T RADEOFFS FOR RC-SNUBBER voltage deviation ∆V

IGCT turnon losses Eon,IGCT

IGCT turnoff losses Eoff,IGCT

Snubber losses ESnub

CSnub ↑

↓

↑

↓

↑

RSnub ↑

↑

↓

↑

-

Lσ,Snub↑

↑

↓

↑

-

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Leakage inductance IGCTs*

IGCT 1,2

Diodes*

D1,2,3,4

*: with parallel RC-Snubbers and static balancing resistors Rp

RSnub CSnub

5SHY 35L4503 (91 mm 4.5 kV IGCT) 5SDF 10H4502 (68 mm 4.5 kV Diode) 0.2 ... 2 Ω 100 nF .... 1µF

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3500 3000

2 Vmax 2 Vstdy

2500 voltage

2000 1500

IGCT 1 IGCT 2

1000 current

500 0 100

105

110

115

120

125

130

135

140

time (µs)

Fig. 6. Turn-off transient of two series connected IGCTs (VDC = 4.6 kV, Iout = 2 kA, ϑ j = 115°C).

Fig. 4. Photograph of the 6 kV, 4 kA tes t setup.

3500

3500 IGCT 1 IGCT 2

3000

3000 2500

2500 current

2000 1500

1500

1000

1000

voltage

500

current

0

0

1

2

3

4

5

6

100

101

102

103

104

105

time (µs)

time (µs)

Fig. 5. Turn-on transient of two series connected IGCTs (VDC = 4.7 kV, Iout = 2.4 kA, ϑ j = 115°C).

Fig. 7. Turn-off transient (detail off Fig. 6). output current. The absolute junction temperature as well as junction temperature differences (Fig. 10) of the series connected IGCTs substantially influence the device voltage sharing.

IV. EXPERIMENTAL RESULTS The experimental results shown in the following figures are valid for snubber values of C Snub = 500 nF, RSnub = 1 Ω and Lσ,Snub ≈ 300nH. Typical voltage and current waveforms are depicted in Fig. 5 for turn-on and in Fig. 6 and 7 for turn-off transients. To clarify the effect of an imperfect voltage balancing, the gate signals of the two series connected IGCTs have been delayed against each other by ∆t Gate = tGate2 − tGate1 = −95ns (that is IGCT 2 switches 95 ns before IGCT 1). Obviously the turn-on transient is absolutely uncritical compared to the turn-off transient. Therefore, only the results of the turn-off transients are considered below. The voltage deviation according to Fig. 6 of two specified characteristic IGCTs at typical junction temperatures for different DC-link voltages and output currents is shown in Fig. 8 and 9, respectively. The maximum voltage deviation is always larger than the steady state deviation but the difference is rather small. Like expected the maximum voltage deviation increases with rising DC-link voltage and

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IGCT 1 IGCT 2

500

0 -1

voltage

2000

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The thermal stability of series connected IGCTs is crucial for each application. Therefore Fig. 11 shows the junction temperature and the corresponding turn-off losses of two individually heated series connected IGCTs. It is interesting to note, that the device with the lower junction temperature IGCT 2 (e.g. ϑ j,IGCT2 = 97°C) realizes higher turn-off losses than IGCT 1 (e.g. ϑ j,IGCT1 = 115°C). Furthermore an increase of the junction temperature of IGCT 2 (ϑ j,IGCT2 : 97°C → 115°C) causes an increase of the turn-off losses of IGCT 1 (ϑ j,IGCT1 ≈ constant: 115°C → 117°C) and a slight decrease of the turn-off losses of IGCT 2. This effect, which is opposite to the thermal behavior of single, not series connected devices, can be explained by analyzing the device physics and the voltage sharing during turn-off. The storage charge of the device IGCT 2 with the lower junction temperature is substantially smaller than that of the IGCT 1 with the higher junction temperature. Thus the colder device IGCT 2 turns off faster and it takes over a higher blocking voltage during

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150

300 200

100

100

50 0

0 Vmax Vstdy Vmax Vstdy

-50

@ @ @ @

-100

ϑ = 115 °C j ϑj = 115 °C ϑ = 25 °C j ϑj = 25 °C

-200

-100 0

500

1000

1500

2000

-300 -10

-5

0

5

10

Junction temperature difference ∆ϑj = ϑj2 – ϑj1 (K)

Output current Iout (A)

Fig. 8. Voltage unsymmetry for different output currents (VDC = 4.5 kV).

Fig. 10. Voltage unsymmetry for different junction temperatures (VDC = 4.5 kV, Iout = 2 kA, ϑ j,av. = 115°C).

150

120 100

115 110

50

105 IGCT 1 IGCT 2

100

0 Vmax Vstdy Vmax Vstdy

-50

@ @ @ @

ϑ = 115 °C j ϑj = 115 °C ϑ = 25 °C j ϑj = 25 °C

95

1

2

3

4

5

4.3

-100 0

1000

2000

3000

4000

5000

DC-link voltage V DC (V)

4.2 4.1

Fig. 9. Voltage unsymmetry for different DC-link voltages (Iout = 2 kA).

IGCT 1 IGCT 2

4.0 3.9

the switching transient. This leads to increased turn-off losses compared to the device IGCT 1 with the higher junction temperature. The increased turn-off losses of the device with the lower junction temperature and the corresponding decrease of the turn-off losses of the device with the higher junction temperature intrinsically stabilize the junction temperatures of series connected IGCTs preventing a thermal run-away without additional control. This mechanism also leads to a stabilization of the varying device voltages. Fig. 12 illustrates the aforementioned principle. However, the device limits like breakdown voltage and maximum junction temperature are natural boundaries of this stabilization effect. Furthermore the voltage balancing is influenced by different gate signal delay times (Fig. 13) which may be caused by the gate drive itself and even length variations of the optical fibers. A delay time of 100ns between the two GCT gate signals which can be easily guaranteed with an appropriate gate unit design will cause a voltage deviation of about 180 V.

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1

2

3

4

5

Number of measurement

Fig. 11. Junction temperature and turn-off losses using individual heating for the IGCTs.

IGCT 1 hotter ↓ larger storage charge ↓ slower turn-off ↓ lower device voltage ↓ lower turn-off losses ↓ IGCT 1 cools down

IGCT 2 colder ↓ smaller storage charge ↓ faster turn-off ↓ higher device voltage ↓ higher turn-off losses ↓ IGCT 2 heats up

Fig. 12. Qualitative description of thermal stabilization.

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2000

200

voltage 1500 100 1000 0

IGCT 1 IGCT 2

500

current

0 100

-100 ϑ = 115 °C j ϑj = 25 °C

-200 -100

-50

105

110

115

110

115

200 0

50

100

Time difference between gate signals ∆tGate= tGate2 – tGate1 (ns)

100 0

Fig. 13. Voltage unsymmetry for different gate signal delay times (VDC = 4.5 kV, Iout = 2 kA).

-100 current difference IIGCT2 - IIGCT1 -200 100

105

300

time (µs)

200

Fig. 15. Turn-off transient of two series connected IGCTs with a small snubber capacitor CSnub = 240 nF.

100 600

0 500

-100

calculated Iout = 2000 A Iout = 1000 A Iout = 340 A

-200 -300

400 300 200

-20

-10

0

10

20 100

Tolerance of snubber capacitance CSnub / CSnub (%)

0

Fig. 14. Voltage unsymmetry for different snubber tolerances (VDC = 4.5 kV, Iout = 2 kA, ϑ j = 115°C). Another important aspect regarding the voltage distribution is snubber tolerance. The snubber capacitors act as a capacitive voltage divider during the switching transients and unsymmetrical capacitances will lead to a voltage unbalance (Fig. 14). Assuming ideal switches and neglecting the snubber resistances Rsnub a voltage deviation of

∆V =

VDC ∆CSnub ⋅ 2 2 ⋅ CSnub + ∆CSnub

(1)

can be derived, if the snubber capacitors connected in parallel to the switches amount CSnub and CSnub + ∆CSnub , respectively. Obviously snubber capacitor tolerances are uncritical. The tolerances of the snubber resistance and the snubber leakage inductance are uncritical as well. A resistance tolerance of less than 20% will guarantee a ∆Vstdy < 100V and ∆Vmax < 200V. A 50% variation of the snubber leakage showed nearly no influence on the voltage balancing. One major factor influencing the voltage balancing is the IGCT itself – that means different switching behavior and not perfectly timed gate signals. The main reasons for different

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-100 -40

-20

0

20

40

60

80

100

Difference in on-state voltage ∆Von (mV)

Fig. 16. Voltage unsymmetry for GCT pairs with different on-state voltages. switching behavior are variations of irradiation which result in a different amount of storage charge within the device during the on-state which has to be evacuated during the turnoff transient. Due to the different turn-off charge a voltage difference occurs across the snubber capacitors. This effect can clearly be identified in Fig. 15 where a turn-off transient with a small snubber capacitor is shown. The integral of the difference between the two device currents leads to the voltage difference between the two devices. The resulting voltage difference is determined by the charge difference at the end of the turn-off transient. Thus, the amount of charge which is stored in the GCT is an excellent indicator for selecting devices with optimum dynamic voltage balancing. However, this charge is difficult to measure and not available in actual production data. Alternatively the turn-off time t Doff or the on-state voltage Von

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of a GCT can be applied to classify the devices. The voltage deviation ∆Vstdy as a function of the on-state voltage can be taken from Fig. 16 for selected device pairs. Since the storage charge basically determines the on-state voltage there is a clear correlation between ∆Von and ∆Vstdy which enables a simple device classification.

10 8

9.28 8.5

snubberless with snubber

8 6.4

6

The loss distribution of an ideal IGCT series connection and a series connection using the aforementioned small RCsnubber is depicted in Fig. 17. While the total losses in the configuration with RC-snubber increase just slightly by about 10% the total semiconductor losses remain constant. The additional turn-on losses caused by the discharge of C snub are compensated by the reduced turn-off losses due to the limited dv/dt.

4 2

1.6 0.65 0 Eoff, Snubber

0.5 0

E off, IGCT

Eon, IGCT

0.63 0 E on, Snubber

Etotal

Fig. 17. Switching losses at VDC = 4.5 kV, Iout = 2 kA, ϑ j = 115°C.

V. STATIC VOLTAGE BALANCING ID C

The static voltage sharing between the devices during the blocking mode is crucial to guarantee adequate FIT rates for the semiconductors. Without additional circuitry the voltage sharing after the switching transients is driven into unbalance due to differences between the semiconductor leakage currents. To achieve static stability of the voltage distribution parallel balancing resistors Rp are used. This is important in the aforementioned MVD application with 3L NPC VSI, where the outer IGCTs are kept in off-state during long intervals. The leakage currents Ileak of power semiconductors, IGCTs as well as diodes, are caused by the behavior of pn-junctions but also side effects like edging, especially at high blocking voltages near the breakdown voltage. The selection of IGCTs by the parameters t Doff or Von , as discussed in the previous section, does not reduce the variation of the leakage currents between the IGCTs. A good approximation of the relation between Ileak and the device blocking voltage VIGCT below the breakdown voltage is given by

I leak = I leak 0 ⋅

VIGCT , VIGCT 0

(2)

where Ileak0 denotes the leakage current at a blocking voltage of VIGCT0 . Additionally the leakage currents are strongly dependent on the junction temperature ϑ j . This correlation is device specific and dependent on the level and type of irradiation. A general rule says, that the leakage current doubles with a junction temperature increase by 10K. This relationship can be expressed as ln 2

I leak = I leak 0 ⋅ e10 K

(

j − j0

)

.

(3)

Ileak0 represents the leakage current at a junction temperature of ϑ j0 . Obviously cold devices draw only an insignificant amount of leakage current. In the considered case of discrete devices only the IGCT or its inverse diode will reach its maximum junction temperature while its anti-parallel counterpart stays cold at the same time in all typical applications. Hence, only the leakage current of the IGCT or the diode has to be taken into account for the design of Rp . Also, from (3) one can conclude, that the possible case of IGCT and diode both having a medium junction temperature

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+ ó

Ileak1

V IGCT1

Rp1

Ileak2

V IGCT2

Rp2

Ileakn

V IGCTn

R pn

VD C

Fig. 18. Equivalent circuit for static voltage balancing. results in a much lower sum of leakage current than the aforementioned case. Maximum leakage currents of IGCTs and diodes at a certain junction temperature and blocking voltage are specified in the datasheets. For the design of Rp actual leakage currents are assumed to be probability distributed between zero and the upper limit given in the datasheet, applying (2) and (3). Fig. 18 shows the equivalent circuit for a series connection of n blocking devices. The current sources Ileakx represent the leakage currents of the IGCTs or diodes being considered. The balancing resistors are assumed to have a manufacturing tolerance ±∆Rp . The most uneven voltage distribution occurs if the leakage current of one semiconductor is zero and the value of its balancing resistor amounts Rp + ∆Rp . All other semiconductors draw the maximum leakage current (at highest junction temperature) and the balancing resistors are on their lower boundary Rp − Rp . This worst case of voltage sharing is described by

− n∆−V1 + I leak 0(max ) ⋅ R p − ∆R p VDC n

VDC n

−

∆V n−1

VIGCT 0

=

+ ∆V . R p + ∆R p VDC n

(4)

This equation can numerically be solved for the value of the balancing resistors required to ensure the desired maximum voltage deviation ∆V. It can be derived from (4) that for a larger number n the necessary value of Rp decreases, which causes increased losses in the static balancing resistors.

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solution for future medium voltage drives with nominal voltages of 6kV and higher. Its advantages are the good IGCT voltage sharing, the intrinsic thermal and voltage stabilization, the little additional expense of components and the low complexity which enables a high reliability.

80 91mm 4.5kV IGCT 68mm 4.5kV Diode 60

40

A CKNOWLEDGMENT The authors would like to thank Matthias Lüscher of ABB Semiconductors, Turgi for the experimental analysis as well as André Weber and Simon Eicher, both of ABB Semiconductors, Lenzburg for valuable advice and discussion and for device simulations.

20

0 0

100

200

300

400

500

Voltage deviation V (V)

REFERENCES

Fig. 19. Minimum static balancing resistor (n = 2, ∆Rp = 1% ⋅ Rp , VDC = 4.6 kV, ϑ j = 115°C).

[1]

P. K. Steimer, J. K. Steinke, H. Grüning, S. Conner, “A reliable, interface-friendly medium voltage drive based the robust IGCT and DTC technologies,” IEEE IAS Annual Meeting 1999, Phoenix, Arizona, October 1999.

The result of an exemplary calculation for the aforementioned worst case assumption is depicted in Fig. 19 for a typical discrete 91mm 4.5kV IGCT (Ileak = 20mA @ ϑ j = 115°C, VIGCT = 4.5kV) and a typical 68mm 4.5kV diode (Ileak = 30mA @ ϑ j = 115°C, VIGCT = 4.5kV). The datasheets of typical IGCTs and diodes reveal that with respect to leakage currents the diodes are the critical device rather than the IGCTs. Therefore the static balancing resistors are basically determined by the inverse diodes.

[2]

P. K. Steimer, H. Grüning, J. Werninger, “The IGCT - the key technology for low cost, high reliable high power converters with series connected turn-off devices,” EPE 1997, Trondheim, September 1997.

[3]

S. Bernet, “Recent developments of high power converters for industry and traction applications,” COBEP 1999, Foz do Iguacu, Brazil, September 1999.

[4]

J. P. Lyons, V. Vlatkovic, P. M. Espelage, F. H. Boettner, E. Larsen, “Innovation IGCT main drives,” IEEE IAS Annual Meeting 1999, Phoenix, Arizona, October 1999.

[5]

R. Sommer, A. Mertens, M. Griggs, H. J. Conraths, M. Bruckmann, T. Greif, “New medium voltage drive system using three-level neutral point clamped inverter with high voltage IGBT,” IEEE IAS Annual Meeting 1999, Phoenix, Arizona, October 1999.

[6]

K. Bergman, H. Grüning, “Hard drive - a radical improvement for the series connection of GTO´s,” EPRI 1996, Washington DC, April 1996.

[7]

S. Eicher, S. Bernet, P. K. Steimer, A. Weber, “The 10kV IGCT – a new device for medium voltage drives,” IEEE IAS Annual Meeting 2000, Rome, October 2000.

VI. SUMMARY This paper extensively analyses the characteristics of series connected IGCTs with small RC-snubbers and parallel resistors for dynamic and static voltage balancing applying a 6kV, 4kA test setup. The proposed snubber is an attractive

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