CIS 371 Computer Organization and Design This Unit: Integer ...

This Unit: Integer Arithmetic App

App

App

System software

CIS 371 Computer Organization and Design

Mem

CPU

I/O

• A little review • Binary + 2s complement • Ripple-carry addition (RCA)

• Fast integer addition • Carry-select (CSeA) • Mention of Carry-lookahead (CLA)

• Shifters • Integer multiplication

Unit 4: Integer Arithmetic

• Carry-save addition

• Division

CIS371 (Roth/Martin): Integer Arithmetic

1

Readings

CIS371 (Roth/Martin): Integer Arithmetic

2

The Importance of Fast Addition

• P+H • Chapter 3 • Except 3.6 and 3.7: “floating point arithmetic” • We’ll get to that next

+ 4

PC

Insn Mem Tinsn-mem

Register File

Data Mem

s1 s2 d

Tregfile

TALU

Tdata-mem

Tregfile

• Addition of two 2C numbers is most common operation • • • •

Programs use addition frequently Loads and stores use addition for address calculation Branches use addition to test conditions and calculate targets All insns use addition to calculate default next PC

• Fast addition critical to high performance CIS371 (Roth/Martin): Integer Arithmetic

3

CIS371 (Roth/Martin): Integer Arithmetic

4

Adder Delay and Clock Period

Binary Integers • Computers represent integers in binary (base2) 3 = 11, 4 = 100, 5 = 101, 30 = 11110 + Natural since only two values are represented • Addition, etc. take place as usual (carry the 1, etc.)

+ 4

PC

Insn Mem

Register File

17 = +5 = 22 =

Data Mem

s1 s2 d

TALU = T

• Common case: add + “forward” value to consuming insn • “forwarding”: enables dependent insns to execute back-to-back

• MCCF: make addition (+ latch) + “forward” the clock cycle

10001 101 10110

• Some old machines use decimal (base10) with only 0/1 30 = 011 000 – Unnatural for digial logic, implementation complicated & slow

• “Pipeline” longer operations over multiple clock cycles CIS371 (Roth/Martin): Integer Arithmetic

5

CIS371 (Roth/Martin): Integer Arithmetic

Fixed Width

What About Negative Integers?

• On pencil and paper, integers have infinite width

• Sign/magnitude • Unsigned plus one bit for sign 10 = 000001010, -10 = 100001010 + Matches our intuition from “by hand” decimal arithmetic – Both 0 and –0 – Addition is difficult • Range: –(2N-1–1) to 2N-1–1

• In hardware, integers have fixed width • N bits: 16, 32 or 64 • LSB is 20, MSB is 2N-1 • Range: 0 to 2N–1

• Option II: two’s complement (2C)

• Numbers >2N represented using multiple fixed-width integers • In software

CIS371 (Roth/Martin): Integer Arithmetic

6

• Leading 0s mean positive number, leading 1s negative 10 = 00001010, -10 = 11110110 + One representation for 0 + Easy addition • Range: –(2N-1) to 2N-1–1 7

CIS371 (Roth/Martin): Integer Arithmetic

8

The Tao of 2C

Still More On 2C

• How did 2C come about?

• What is the interpretation of 2C?

• “Let’s design a representation that makes addition easy” • Think of subtracting 10 from 0 by hand • Have to “borrow” 1s from some imaginary leading 1

• Same as binary, except MSB represents –2N–1, not 2N–1 • –10 = 11110110 = –27+26+25+24+22+21 + Extends to any width • –10 = 110110 = –25+24+22+21 • Why? 2N = 2*2N–1 • –25+24+22+21 = (–26+2*25)–25+24+22+21 = –26+25+24+22+21

0 = 100000000 -10 = 00001010 -10 = 011110110

• Trick to negating a number quickly: –B = B’ + 1

• Now, add the conventional way…

• • • •

-10 = 11110110 +10 = 00001010 0 = 100000000 CIS371 (Roth/Martin): Integer Arithmetic

9

1st Grade: Decimal Addition

–(1) = (0001)’+1 = 1110+1 = 1111 = –1 –(–1) = (1111)’+1 = 0000+1 = 0001 = 1 –(0) = (0000)’+1 = 1111+1 = 0000 = 0 Think about why this works

CIS371 (Roth/Martin): Integer Arithmetic

10

Binary Addition: Works the Same Way 1 111111 43 = 00101011 +29 = 00011101 72 = 01001000

1 43 +29 72

• Repeat N times

• Repeat N times • Add least significant digits and any overflow from previous add • Carry “overflow” to next addition • Overflow: any digit other than least significant of sum • Shift two addends and sum one digit to the right

• Sum of two N-digit numbers can yield an N+1 digit number

• Add least significant bits and any overflow from previous add • Carry the overflow to next addition • Shift two addends and sum one bit to the right

• Sum of two N-bit numbers can yield an N+1 bit number – More steps (smaller base) + Each one is simpler (adding just 1 and 0) • So simple we can do it in hardware

CIS371 (Roth/Martin): Integer Arithmetic

11

CIS371 (Roth/Martin): Integer Arithmetic

12

The Half Adder

The Other Half

• How to add two binary integers in hardware? • Start with adding two bits

• We could chain half adders together, but to do that…

• When all else fails ... look at truth table A 0 0 1 1

B 0 1 0 1

= C0 S = 0 0 = 0 1 = 0 1 = 1 0

• S = A^B • CO (carry out) = AB • This is called a half adder

A B

S

CO A

HA

B

S

• Example: 16-bit ripple carry adder • How fast is this? • How fast is an N-bit ripple-carry adder?

CIS371 (Roth/Martin): Integer Arithmetic

B

FA

S

CO

CO

CO

13

CIS371 (Roth/Martin): Integer Arithmetic

Ripple-Carry Adder • N 1-bit full adders “chained” together • CO0 = CI1, CO1 = CI2, etc. • CI0 = 0 • CON–1 is carry-out of entire adder • CON–1 = 1 ! “overflow”

CI A

• S = C’A’B + C’AB’ + CA’B’ + CAB = C ^ A ^ B • CO = C’AB + CA’B + CAB’ + CAB = CA + CB + AB • This is called a full adder

CIS371 (Roth/Martin): Integer Arithmetic

• N-bit ripple-carry adder

• Need to incorporate a carry out from previous adder C A B = C0 S CI 0 0 0 = 0 0 0 0 1 = 0 1 S 0 1 0 = 0 1 A 0 1 1 = 1 0 B 1 0 0 = 0 1 1 0 1 = 1 0 1 1 0 = 1 0 1 1 1 = 1 1

14

Quantifying Adder Delay 0 A0 B0

FA

A1 B1

FA

A2 B2

S0 S1 S2

FA …

A15 B15

S15

FA CO 15

• Combinational logic dominated by gate (transistor) delays • Array storage dominated by wire delays • Longest delay or “Critical path” is what matters

• Can implement any combinational function in “2” logic levels • 1 level of AND + 1 level of OR (PLA) • NOTs are “free”: push to input (DeMorgan’s), read from latch • Example: delay(FullAdder) = 2 • d(CarryOut) = delay(AB + AC + BC) • d(Sum) = d(A ^ B ^ C) = d(AB’C’ + A’BC’ + ABC’ + ABC) = 2 • Note ‘^’ means Xor (just like in C & Java)

• Caveat: “2” assumes gates have few (