Conductance-transient three-dimensional profiling of

Mat. Res. Soc. Symp. Proc. Vol. 699 © 2002 Materials Research Society

Conductance-transient three-dimensional profiling of disordered induced gap states on metal-insulator-semiconductor structures H.Castán, S.Dueñas, J.Barbolla, I.Mártil 1 and G.González-Díaz 1 Dept. Electricidad y Electrónica, ETSI Telecomunicación, Universidad de Valladolid, Campus Miguel Delibes, s/n, 47011 Valladolid (Spain). 1 Dept. Electricidad y Electrónica, Universidad Complutense, 28040 Madrid (Spain)

ABSTRACT As it has been shown elsewhere, conductance transient measurements provide quantitative information about the disordered induced gap states (DIGS) in metal-insulatorsemiconductor (MIS) structures. In this work we report for the first time the DIGS spatial and energetical distribution obtained by recording conductance transients at severa! temperatures (ranging from 77 to 300 K) and several frequencies (ranging from 100 Hz to 200 KHz). These measurements allow us to obtain three-dimensional defect maps of Al/SiNx:HllnP structures browsing ranges of 0.5 eV in energy and 40 A in depth. Our results show that this technique is a very useful tool for the electrical characterization of MIS structures and reveals itself as very valuable in the 111-V semiconductor-field-effect transistor scenario.

INTRODUCTION Metal-insulator-semiconductor (MIS) structures fabricated on 111-V semiconductors to be used in field-effect transistors present sorne problems related to insulator-semiconductor interface quality. So, these structures must be carefully characterized and standard electrical measurements, as Capacitance-Voltage and Deep-Level-Transient-Spectroscopy (DLTS) are usual tools to do it. However, these techniques do not provide infonnation about the defect spatial distribution. In the last years we have proved that Conductance Transient (G-t) measurements provide quantitative information about the disordered induced gap states (DIGS) [ 1-4]. In fact, from the experimental conductance transients we can obtain the DIGS state density as a function of the spatial distance to the interface and of the energy position in the bandgap. The basis of this technique is shown in figure 1 [l]. Conductance transients are obtained by applying bias pulses that drive MIS structures from deep to weak inversion. Subsequently, capture processes take place in which the empty DIGS trap electrons (hales) coming from the conduction (valence) band. This process is assisted by tunneling and is time consuming. States near the interface capture carriers befare those located farther away in the dielectric bulk. Conductance transient shape varies significantly with the frequency because only those traps with emission and capture rates ofthe same arder of magnitude than the frequency have nonzero contributions to the conductance. When the states are spatially distributed the emission and capture processes involve both thermal excitation and tunneling. Besides, as temperature decreases the transients are modified in a similar way as when frequency is increased at constant temperature: the lower the temperature is, the faster the transients become. That is easily explained taking into account the fact that the emission rate is a function of the temperature: as temperature decreases the emission rates of ali interface states exponentially decrease and the equi-emission lines shift approaching the interface and shorter distances have to be covered by the front of tunneling electrons. R4.4. l

{a)

Semiconductor

lnsulator

en=coa

(b)

en=coc

>e

1,>~
e l»sl

B e

EF'

!

::::, "C

-

e

EF

8 e

B

A

"x c" or "log(t)" X e (t)

X

0

Figure l. (a) Schematic band diagram of an insulator-semiconductor interface illustrating the capture of electrons by DIGS continuum states during a conductance transient. (b) General shape ofthe conductance transient

From the experimental conductance transients, G(t), we can obtain the DIGS state density (Nmos) as a function of the spatial distance to the interface (xc) and ofthe energy position, as follows [2]: liG I OJ N DIGS e

E' - E(xc, t) 011

~ n

N )

(t)=xo/1 ln(O"ovthnst) (

X

where x =

(1)

= 0.4qA = H eJJ + kT ln

O"º vt1, e OJ/1.98

xc(t) -

kT - Xº"

(2)

(3)

is the tunnelling decay length, cr is the carrier capture cross section 0

2 2mefJHefJ

value for x=O, vt1, is the carrier therrnal velocity in the semiconductor, and ns is the free carrier density at the interface. Finally, Heffis the insulator-semiconductor energy barrier for minority carriers and E' means the carrier energy band edge at the insulator (Ec' for electrons and Ev' for hales). In the case of the SiNx:Hln-InP, H~ff=800 me V. Up till now we have only used this technique in arder to compare the interface quality of severa! sets of samples by complementing DLTS results. So, we have only recorded and processed room temperature-constant frequency (typically 200 KHz) conductance transients. In this work we report for the first time the DIGS spatial and energetical distribution obtained by recording conductance transients at severa! temperatures (ranging from 77 to 300 K) and severa! frequencies (ranging from 100 Hz to 200 KHz).

EXPERIMENTAL The MIS structures were fabricated by directly depositing silicon nitride films on InP wafers by the ECR-CVD plasma method. The InP substrates were (100) oriented undoped wafers with carrier concentration of 5xl 0 15 cm- 3. Samples were degreased with organic solvents; afterwards, they were wet-etched in a conventional chemical bath ofHI03:H20 (10% at. weight) for 1 min., and just befare being transferred to the vacuum deposition chamber, they were etched in HF: H 20 (1: 1O) for 15 sin a N2 filled glove chamber. Nitrogen plasma cleaning [5, 6] was R4.4.2

carried out just befare 500 A-thick insulator plasma deposition. Once the cleaning process was finished, the insulator deposition was carried out by using N 2 and pure SiH4 gases. The gas fluxes were varied to obtain severa! values of insulator composition, x=N/Si. The substrate temperature during the plasma cleaning and deposition process was kept constant at 200ºC. Afterwards, the top contact (Al) and later, the back contact (AuGe/Au) were evaporated and alloyed during 20 min at 300 ºC in Ar atmosphere. The area of finished devices was l .2x 10-3cm 2 . The experimental set-up consists of the HP 33120A arbitrary waveform generator to apply the bias pulses and the EG&G 5206 two phase lock-in analyzer to measure the conductance. An HP 54501A digitizing oscilloscope records the complete conductance transient. Samples were cooled in darkness from room tempera tu re to 77 K at O bias in an Oxford DN 171 O cryostat. An Oxford ITC 502 controller was used to keep constant the temperature during the measurements. RESUL TS AND DISCUSSION Figure 2(a) shows room temperature conductance transients at severa! frequencies corresponding to the Al/SiN 1.55 :H/InP MIS structure submitted to the following plasma cleaning conditions: Cleaning time duration: 60 s, microwave power: 60 W, and N 2 gas pressure: 0.07 Pa. These transients have been obtained by applying capture pulses to the samples and recording the conductance signal. As can be observed, conductance transients are increasing for low frequencies, whereas they are decreasing for high frequencies. According to the explanation suggested in a previous work [ 1], only the decreasing transients provide reliable information about the interface states profile. Then, we focus our attention on transients measured at frequencies between 65 KHz and 150 KHz. From these, we have obtained the three-dimensional defect map offigure 2(b). In this figure we can see that there are DIGS defects up to depths of around 100 A and they show a maximum for energies of 450 me V below the insulator conduction band.

(b)

(a)

8xl0 8x lff" 6x lff

10

150 KHz

----

6xl010 ~

12

!"

_,...-..

~ 4xlff"

'"'e:

12

~

o

8 2x10·

4xl0

2xl0'

-2,10· 12 -4x10· 12 + . - ~ - ~ ~ ~ ~ ~ ~ ~ ~ m ~ - ~ ~ ~.......... 10 0.1 1 log t (s)

110

Figure 2.- (a) Room temperature conductance transients at severa! frequencies and (b) three dimensional DIGS profile for a plasma-cleaned AI/SiN1.55 :H/lnP MIS structure

R4.4.3

10

0

z~

8x10w

6x10' 0 -;:-

)" 4x10' 0

g

z"' 2xl0

10

Figure 3. Three dimensional DIGS profile for a non plasmacleaned but RTA annealcd Al/SiN1.43 :H/lnP samplc

In contrast, we can see in Figure 3 the result obtained for a sample which has not undergo any nitrogen cleaning plasma previous to the dielectric deposition, but it has been submitted to a rapid thermal annealing (RTA) in Ar atmosphere at 600 ºC during 30 s after the dielectric deposition. We observe that the damage profile is wrinkled and deeper than for the plasma cleaned sample, and the DIGS maximum shifts to lower energies (600 me V below the insulator conduction band). On the other hand, we have obtained conductance transients at severa! temperatures. Figure 4 shows 1 MHz-C-V curves measured at room temperature (a) and at 77 K (b), for the Al/SiN 1.55:H/InP MIS structure submitted to the following plasma cleaning conditions: Cleaning time duration: 15 s, microwave power: 60 W, and N 2 gas pressure: 0.07 Pa. As can be seen, the C-V curves obtained at 77 K show a lower flat-band voltage displacement anda stretch-out with respect to room-temperature C-V ones, thus indicating that sorne traps in the material are frozen at low temperatures. Moreover, both room-temperature and 77 K C-V curves clearly exhibit hysteresis phenomena, thus indicating that the interface state distribution follows the DIGS model [7,8]. So, there are slow states at the insulator/semiconductor interface, i.e., defects that (a)

(b) 16)

100

Room Terrr,eran.re

140

140

120

120

U

100

4

G:' o.

100 80

T=77K

G:'

o. .......,

u

&)

ro 40

ro

~-J)

20 40+-~~~~~~~~~~~~~

4

-3

-2

-[

O

_j

2

4

V(Y)

-3

-2

-1

o

1

2

V(Y)

Figure 4.- Hysteresis in C-V curves at room temperature(a) and at 77 K (b) for an Al/SiN1. 55 :H/InP samplc

R4.4.4

(a)

(b)

8x10 12

_500 Hz

2x10-"

-i 'e:

s

o

6x10-

f=lOO KHz

12

T

215 K

=

l KHz

_,,..__ )~ 1x10-"

'g,

4x10-• 2

_§

c.'.)

~

5x10-' 2

~

2x10-• 2

O+..-.~~~ ~~~~~~~~~~---.-.-.-. o+.-,-~~~~~~~~~~~~~

0.1

1

time (s)

0.1

10

1

10

time (s)

Figure 5. Conductance transients obtained by (a) varying temperature at fixed frequency and (b) varying frequency at constant temperature

are distributed away from the interface to the insulator. Hence, as we have said before, the electron emission and capture processes involve both thermal excitation and tunnelling, producing a broad time constant dispersion. Hysteresis observed in C-V curves should be related to this effect. To study the effect of temperature in the conductance transient shape, we performed conductance transient measurements varying both temperature and frequency. The results are summarized in Figures 5 and 6. Figure 5(a) shows conductance transients obtained at 100 KHz, temperature ranging between 215 and 265 K: the lower temperature is, the faster the transient becomes. On the other hand, Figure 5(b) shows conductance transients obtained at 215 K, frequency ranging between 500 Hz and 100 KHz. When comparing figures 5(b) and 2(a) we can see that, at low temperatures, transients obtained at low frequencies are also decreasing, so they provide reliable values of DIGS damage. This is explained taking into account that at low temperatures states near the interface have high capture time constants, whereas at room temperature states contributing to low frequency transients are located farther away from the interface. Finally, from the set of transients corresponding to several frequencies and several temperatures, we have obtained the complete three-dimensional defect profile and the corresponding contour graph offigure 6. When comparing this figure with figures 2(b) and 3,

(b)

(a)

2.0x10

-

No1as (x 1011 cm-2eY-1)

11

1.5x10

800 750

11

' 7~ 650

11

5.0x10

8

._,

10

~

600

1

~u 550

O.O 80

-t-

800 º

"4_;

700

90

600

100

500 11 O

~e,r,