Design and Implementati esign and Implementation of

Innovative Systems Design and Engi Engineering ISSN 2222-1719 1719 (Paper) ISSN 2222 2222-2863 (Online) Vol X, No.X, 2012

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Design and Implementation of a Low Cost Digital Bus Passenger Counter Adamu Murtala Zungeru* School of Electrical and Electronics Engineering, University of Nottingham, Jalan Broga, 43500 Semenyih, Selangor Darul Ehsan, Malaysia E-mail: [email protected] Maidawa Kemba Deborah Deborah, Ambafi James Garba, Omokhafe James Tola Department of Electrical and Electronics Engineering, Federal University of Technology, Minna, Nigeria E-mails: [email protected] [email protected], [email protected], [email protected] Abstract Accountability is an important issue when buses are to be use for transport purposes. This research is principally aimed at the design and implementation of a simple and effective digital bus passenger counter. The work is mainly the design and construction of an electronics counter, counts the number of passengers going oing into or out of a bus or the number of cars going into or out of a gate. The set of methods and principles used in achieving the circuit are called the top top-down down methodology. The actual state of the entrance which coincides with the exit was noted. Two Two-switch switch system was employed in order to avoid double counting, thus, counting is done in one direction. The switches are connected in such a way that a pulse is sent only when they are triggered in one direction, this results to the introduction of a transistor transi for its switching ability. The output of the transistor is connected to the display driver, which in turn is connected to the seven segment display. The circuit counts a maximum of 999 after which it resets to zero. The real implementation of the devi devise is done on this work. Keywords: Decade Counter, Timing Circuit Circuit, Bus Passenger, Seven Segment Display, Electronic Circuit Design 1. Introduction The rapid development of today’s technology is as a result of the enormous expansion in the field of electronics ronics and the future has no apparent restrictions over it it. In keeping with this technological advancement, electronics has grown out uniquely to make human endeavor in many facets of life more meaningful. Digital devices operated automated are very iimportant mportant such that, they are useful in providing accuracy as well as saving human beings from constant monitoring of a given process of a system. Hence electronic indicators are useful without which, life of today’s man would encounter a serious setback, though t it is said, the human brain was the first processor and still reigns supreme, later version of synthetic processors only aid, and presumably at a faster rate, but still very much dependant on the brain. Generally, electronics lectronics have come a long way ove overr the past century to add to the development of man. In virtually every area of human endeavor electronics have found its place; reducing tedious work practices, saving working time, increasing efficiency with productivity and accomplishing jobs, that would woul otherwise have taken a life time to completely ompletely execute. In accounting for instance, computation and record keeping can be done using computer omputer and ordinary calculator. Furthermore, records of actual figures can also be taken at a particular time and stored store for referencing and record keeping. In most developing countries, electronics is fast finding its way into every

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home, office, even within the transport system employed by various individuals and corporate bodies. For example, the number of passengers th that at use a bus and the number of vehicles going into a parking lot within a period of time can be easily known with the use of electronic counter. In this work,, the actual number of passengers that use a commercial transport scheme and or a parking lot over a specified period of time is gotten. This can aid its accounting department in getting the actual figure to serve as a reference for the income generated over a set per period, and nd the management of a parking lot to know the maximum number of vehicles a parki parking ng lot can take. The Federal University of Technology Minna bus transport scheme for instance, employs the use of tickets sales, through which money is remitted to the school. Most passengers prefer to pay cash for the bus service whenever needed. In this way funds go unaccounted for, hence the reduction in the actual income to be generated. In order to solve this problem this research comes to be. The electronic circuit primarily counts the number of passengers that use the bus, which compels personnel's response esponse to revenue collection to balance income with the number of passengers that used the bus. By this, even the normal collection of money by the driver assistance can be employed. 2. Theoretical Background and Related Work This section provides the theory ory behind the design of our SMS based remote controller along side with some work related to this our work. It will also be notice in this section that several effort have been made in the design of counting systems for different purpose, but the cost, durability and effectiveness needs to be considered. 2.1 Related Work One would not truly appreciate the electronic means of counting that is all around us today, if there is no knowledge of how counting evolved. Man actually was the first counting machine tthat hat existed, from his basic small counting he discovered that the number of thing i.e. needed to number increased. This is why he needed help. The first counting equipment made is believed to be the Abacus. The Abacus is an ingenious counting device used onn the relative positions of two sets of beads moving on parallel strings, the first set contains five beads on each string and allows counting from 1 to 5, while the second set has only two beads per siring representing the numbers 5 and 10. The Abacus sys system tem seems to be based on a radix of five. Using a radix of five makes sense since humans started counting objects on their fingers Presently, not much has been done using a normal electronic counter in the area of passengers monitoring and information collection. ection. But in several ways basic electronic counters are used (Giogio-hill, (Gi 2000; Hollerith, 2012; Jones, 2012). An automation room light here once a person enters the room and the circuit registers a count (increments) it enables the light while if that same person leave, meaning there is no person in the room, the counters data is decreased by one and causes the light to switch off (Jobs, 2010). In most cases one switch is used because there is an entry separate from the exit door or the number of persons within a location at anytime is desired, ther therefore efore an up/down counter is used. But if restricted to one door for entry and exit some modification modification-has has to be done. Like in this case two switches were used in place of one .both connected through different pins of a switch which decide whether the counte counterr should count or not. In this way it is needless to count every person at the time of entry and exit then divide by two to get the number of passengers. The advantages of this circuit above existing ones (if any) is that, it is designed with full knowledge knowledg of the prevalent factors affecting the bus (People moving in and out of the bus while bus is idle and waiting for full load). Possibility of double counting is reduced to very near zero. 2.2 Theoretical Background In this subsection, we shall discuses tthe theory related to our work and the major components that we shall use during the design process. Generally speaking, the research centers on how passengers are counted as they make use of the buses themselves. To achieve this, component ranging from si simple mple resistors to small scale integrated circuits, neatly arranged to give a count for each passenger. For a good understanding of the circuit to be discussed



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in the next section, there is need to know the theory behind the various component used to achieve achiev it. 2.2.1 Counters Almost any complex digital system contains several counters. A counter's job is the obvious one of counting events or period of times or putting events into sequence. Counters also do some not to obvious jobs like dividing frequency, addressing ddressing and serving as memory units units. Counters are basically of two types (Hughes, 1995; Hurowitz et al., 1995, 1998) which we shall look at one after other. Firstly, ripple counters. These counters are the simplest type of binary counters, since they require the lowest components to produce a. given en counting operation. They do, however, have one major drawback, which is caused by their basic principle of operation; each FF is triggered by the transition of the preceding FF because of the inherent propagation delay time (Tpd) of each FF; this means that the second FF will not respond until a time Tpd after the first FF receives an active clock transition (that is a complete cycle, two pulses), the third will not respond until a time 2* Tpd after a clock transition an and so on. In other words, the propagation gation time of the FF accumulates so the FF will not respond until a time 2* Tpd after the clock transition occurs [2]. [ The above operation can be seen through the truth table table. J

K

SET

CLR

Q

J

Q

K

SET

CLR

Q

J

Q

K

SET

CLR

Q

J

Q

K

SET

CLR

Q

Q

fi

Figure 1. Asynchronous Ripple Counter The problem encountered with ripple (asynchronous) counters is associated with the fact that FF does not all change state simultaneously in synchronism with the input pulses. These limitation can be overcome with the use of synchronous or parallel counters in which al alll of the FFs are triggered simultaneously (in parallel) by the clock input pulses. Since all the inputs are applied at the same time, a means of control has to be in place to insure that each FF toggles only when it suppose to. This is accomplished by usingg the J and K inputs as illustrated in Figure 2 for a 4-bit bit (number of binary). MOD I6(having 16 different combination) synchronous counters, Note, if the diagram of the asynchronous and synchronous counter are carefully analyzed, It can be seen that the ssynchronous ynchronous counter is more complex, requiring additional ADD gale to control. The J and K input of the first FF are permanently at a high level while the clock input of all the FFs are connected in parallel. For the circuit in Figure 2 to count properly, oon n a given negative transition of the clock, only those FFs are supposed to toggle on the negative transition should have J=K=1 when that negative transition occurs. A B ABC

A

AB

C B

J

K

SET

CLR

Q

J

Q

K

SET

CLR

Q

J

Q

K

SET

CLR

Q

J

Q

K

SET

CLR

Q

Q

Figure 2. Synchronous Counter The counting sequence shows that a Flip flop must change at negative transition of the input clock for this reason its J and K input are put permanently at high level while the output of A is connected to J and K input of B making B to toggle only when the output of A is 1. That is it ha hass changed the negative transition. The counting sequence shows that flip flop C must change states on each negative transition that occurs while A =B=1. For example, when the count is 0011, the next must toggle C to the O state; and so on. By



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connecting thee logic signal AB to FF C's J and K inputs, this FF will toggle only when A=B=1. 2.2.2The Decade Counter In the previous Counter section, we saw that Asynchronous binary counters have 2n-1 counting states. But it is also possible to construct special count counters ers with states less than their maximum output number by forcing the counter to reset itself to zero at a pre pre-determined determined value and these are called "truncated sequences". If we take the modulo-16 16 ripple counter and modified it with additional logic gates iitt can be made to give a decade (divide-by-10) 10) counter output for use in standard decimal counting and arithmetic circuits. Such counters are generally referred to as Decade Counters.. A decade counter requires resetting to zero when the output count reaches the decimal value of 10. A counter with a count sequence from binary "0000" (BCD = "0") through to "1001" (BCD = "9") is generally referred to as a BCD Decade counter because its ten state sequence is that of a BCD code but binary decade counters are also available. An Asynchronous Decade (decimal 10) Counter is shown as follows:

Figure 3. An asynchronous Decade Counter The counter counts upwards on each leading edge of the input clock signal starting from "0000" until it reaches an output "1010" (decimall 10). Both outputs QB and QD are now equal to logic "1" and the output from the NAND gate changes state from logic "1" to a logic "0" level and whose output is also connected to the CLEAR (CLR) inputs of all the JJ-K Flip-flops. This causes all of the Q outputs tputs to be reset back to binary "0000" on the count of 10. Once QB and QD are both equal to logic "0" the output of the NAND gate returns back to a logic level "1" and the counter restarts again from "0000". We now have a decade or modulo-10 counter. Table 1. Truth Table of a Decade counter Output bit Pattern QC QB

Clock Count

QA

Decimal Value

QD

1

0

0

2

0

0

0

0

0

0

1

1

3

0

0

1

0

2

4

0

0

1

1

3

5

0

1

0

0

4

6

0

1

0

1

5

7

0

1

1

0

6

8

0

1

1

1

7

9

1

0

0

0

8

10

1

0

0

1

9

Counter Resets Outputs back to Zero Using the same idea of truncating counter output sequences, the above circuit could easily be adapted to other counting cycles by simply changing the connections to the AND gate. For example, a scale-of-twelve scale



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(modulo-12) 12) can easily be made by si simply mply taking the inputs to the AND gate from the outputs at "QC" and "QD", noting that the binary equivalent of 12 is "1100" and that output "QA" is the least significant bit (LSB). Standard i.e. asynchronous counter packages available are the TTL 74LS90 pr programmable ogrammable ripple counter/divider which can be configured as a divide divide-by-2, divide-by-5 5 or any combination of both (Ronald et al., 1998; Theraja et al., 1999;; Tokeim, 2004 2004).. The 74LS90 is a very flexible dual decade driver i.e. with a large number of "divide-by" by" combinations available ranging from 2, 4, 5, 10, 20 20,, 25, 50, and 100. 2.2.3 BCD-To To Seven Segment Decoder (7447) A decoder is a combinational circuit, which generates at its output all the 2n canonical product terms of the n-signal signal connected to its inputs. The basic function of a decoder is to detect the pr presence esence of a specified combination of bits (code) on its inputs and to indicate the presence of that code by a specific output level. One and only one output of the decoder is selected for any combination of input signals. The decoder converts coded information tion such as the binary numbers into a non non-coded coded form as the decimal form. The 7447 is used in this device to convert a 44-bit bit binary code into the appropriate decimal digits. It’s a BCD-to BCD 7 segment latch/decoder/driver, which is constructed with CMOS enha enhancement ncement mode device. The decoder accepts the BCD code (4 binary numbers) on its input and provides output to drive seven segment display device to produce a read out. The four inputs to the 7447 are gotten from the output of the up/down 74190. The output off the decoder is fed to the seven segment display, which indicates the decimal equivalent of the binary input. It helps in the decoding of the 44-bit bit BCD code into the seven outputs that are required to light the segments of the seven segment LED chip to pr produce a decimal readout. The SN54/ 74LS47 are Low Power Schottky BCD to 77-Segment Segment Decoder/Drivers consisting of NAND gates, input buffers and seven AND AND-OR-IN-VERT VERT gates. They offer active LOW, high sink current outputs for driving indicators directly. Seve Seven n NAND gates and one driver are connected in pairs to make BCD data and its complement available to the seven decoding AND AND-OR-INVERT INVERT gates. The remaining NAND gate and three input buffers provide lamp test, blanking input/ripple input/ripple-blanking blanking output and ripple-blanking ripple input. The circuit accepts 4-bit binary-coded coded-decimal decimal (BCD) and, depending on the state of the auxiliary inputs, decodes this data to drive a 7-segment segment display indicator. The relative positive positive-logic logic output levels, as well as conditions required at the auxiliary inputs, are shown in the truth tables. Output configurations of the SN54/ 74LS47 are designed to withstand the relatively high voltages required for 77-segment segment indicators. These outputs will withstand 15 V with a maximum reverse current of 25 250mA. 0mA. Indicator segments requiring up to 24 mA of current may be driven directly from the SN74LS47 high performance output transistors. Display patterns for BCD input counts above nine are unique symbols to authenticate input conditions. The SN54/ 74LS47 incorporate corporate automatic leading and/ or trailing trailing-edge zero-blanking blanking control (RBI and RBO). Lamp test (LT) may be performed at any time which the BI/RBO node is a HIGH level. This device also contains an overriding blanking input (BI) which can be used to contr control ol the lamp intensity by varying the frequency and duty cycle of the BI input signal or to inhibit the outputs. • Lamp Intensity Modulation Capability (BI/RBO) • Open Collector Outputs • Lamp Test Provision • Leading/ Trailing Zero Suppression • Input Clamp Diodes Limit High-Speed Speed Termination Effects Effects. 2.2.4 Transistors Transistors are active components used basically as amplifiers and switches. The two main types of transistors are; the bipolar transistors whose operations depends on the flow of both minority minori and majority carriers and the unipolar of field effect transistors (called FETs) in which current is due to majority carriers only (either electrons or holes). The transistor as a switch operates in a class ‘A’ mode. In this mode of bias



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the circuit is designed signed such that current flows without any signal present. The value of bias current either increased or decreased about its mean value by input signals (if operated as an amplifier), or ON and OFF by the input signal if operated as a switch Figure 4 shows the transistor as a switch. V+

IcRc

Ib Vin

V CE

Rb

V BE

Figure 4. Transistor as a switch For the transistor configuration, since the transistor is biased to saturation VCE = 0, when the transistor is ON, This implies that, V+ = ICRC + VCE

(1)

Vin = IBRB+ VBE

(2)

Ic = hfe Ib Rb =

Vin - VBE Ib

(3)

(4)

Where Ic = collector current Ib = base current Vin = input voltage V+ = Supply voltage VCE = collector emitter voltage Hfe = current gain VBE = Base emitter voltage. 2.2.5 Other Passive Components Passive components are components, which cannot power and require an external power source to operate. They include resistors, capacitors, indicators, transformers, etc their application rang rangee from potential divider to control of current (as in resistors), filtration of ripples voltages and blocking of unwanted D.C voltages (as in capacitors). They form the elements of the work circuit oscillator stages and are also used generally for signal conditioning onditioning in circuits. Their schematic diagram and symbols are shown in Figure 5.



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Resistor Transformer

Capacitor

Figure 5.. Physical appearance of some passive components

This is an image of some of the passive and active components placed on a solder less bread board. Diode

Resistor

Counter

IC Timer (555)

Relay LED (red) Connecting wires

Figure 6.. Image showing components on the bread board 3. System Design and Analysis In this section,, the design of the vario various units of the system build up and the theory of operations of the entire system are considered. The design iiss also based on the availability and cost implication of components to be used for the realization of this research. This section will discuss the design procedure and how it was implemented. The realization of the main objectives of counting the numbers of o passengers received in business over a period of time by the Federal University of Technology bus scheme is illustrated below.

POWER UNIT

SWITCHING UNIT

COUNTING UNIT

DISPLAY

DELAY UNIT

Figure 7. Modular odular representation of the bus passenger/vehicle counter The modules (units) will be explained in details in the coming subsection, after which the actual circuit diagram will be looked at. Designing of a prototype for an in house demonstration has some constrains. This will induce some modification of the circuit from the actual operation of the circuit in the bus. The



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modular description is explained thus. 3.1 Power Unit This unit consists of the following; car battery, a voltage regulator, and a power delay circuit. A normal bus battery is 24V with current rating of 110 to 200 amperes. T This his is far much more than is needed for a simple electronic circuit, therefore, the need to reduce the incoming power according to the circuit requirement. The battery is connected to voltage regulator as shown in F Figure 8 below. COUNTING AND DISPLAY CIRCUIT

BATTERY SUPPLY

VOLTAGE REGULATOR

DELAY CIRCUIT

IGNITION KEY

Figure 8.. Practical Application of Power Unit in the Bus The voltage regulator reduces the voltage to 5V and keeps it constant at that point, dissipating the excess power as heat (Reason for the reduction of voltage to 5V was a result of inability to gget et a CMOS driver for the display unit restricting the circuit to TTL), from this point supply is connected to two different points. The first is to the counting and displaying unit. This is to ensure that the data stored in the counter is not lost when the parts of the circuit is turned OFF. While the other goes to a delay circuit that has its trigger as the ignition key, the output thereof is connected to the main circuit, Another means of realizing this power unit (particularly for in in-house house presentation) requires little modifications. down the supply mains of 240, 50Hz to 12V, 50Hz supply. (The transformer A transformer is used to step-down employed is a 240/12V 1000mA), The 12V AC supply is then passed through a rectifier circuit which normally comes in the form fo of a single chip of 4 pins. The rectifier converts the Ac to DC of equivalent voltage (exc (except ept for the 0.6V reduction due too the forward voltage drop of a diode.) This now is connected to a filler circuit, in this case is in parallel with the resistive load oad (main circuit). The type of filter employed is a series series-connections connections filter which uses a large capacitor in parallel with the resistive load. All stages in the project uses 12V d.c, the power supply stage is a linear power supply type and involves a ste step-down transformer, a filter capacitor, capacitor and voltage regulator. To calculate the approximate value of the capacitor that will give a ripple factor of less or

equal to the desired value.

(5)

Where Ive = the total current to the resistive load F = Frequency =

Y = ripple factor V = Circuit operating voltage. Page | 8 www.iiste.org


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1

7805

3

V+

2

C1

C2

R

Figure 9. Power supply stage For this circuit, we would require uire a 7805 voltage regulator as shown in the figure above which gives a required output of +5V. The voltage regulator regulates above its required output voltage, if the voltage is below, its required output voltage would be passed out without been regula regulated. ted. For example for a 7805, if the unregulated input voltage is greater than 5V, it will be regulated to 5V, but if it’s less than 5V, for example 3V, the 3V unregulated will be outputted. 3.1.1 Design Analysis If the unregulated input of the 7805 is grea greater ter than the required output by a factor of 4, that is 5+4=9, the voltage regulator IC, starts getting hot and will be damaged. Hence we will need an input into the 7805 to be approximately 9V. Since, the diode drops 0.6V and we have 4 rectifying diodes fo forming rming the full wave bridge, the voltage drop will then be 0.6 ×4 = 2.4V For a peak voltage of 9+2.4=11.4V peak. For the r.m.s voltage =

18.4 18.4 = = 13.143V 2 1 .4

Hence a transformer of a preferred value of 15V was employed. i.e 220V/15V transformer Assuming a ripple voltage of 15% dv =

15 ×18.4V = 2.76 100

dt =

1 1 = = 0.01 2f 100

C1 =

1× 0.01 = 3.623 × 10-3F 2.76

C1 = 3300µF A preferred value of 3300µF was however eemployed. To reduce the ripple left, a compensating capacitor C2 was used and a 4065µF was employed employed.



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3.2 Delay Unit The delay unit comprises of the following, a push button (normally closed) switch, a 555 timer and combinational simple circuit of a capacito capacitor-resistor as shown in Figure 10. VCC

5V

8

U1

VCC

4

R2

RST

10kohm

6

R1 2

10kohm

3

7 OUT

DIS THR TRI

5 CON GND

sw

1

C1 200uF

LM555CN

C2 10nF

Figure 10. The delay circuit The diode is placed in between the 555 timer and the capacitor for two reasons reasons; to act as a protective device for 555 timers, and nd to force the capacitor to discharge in one direction, offerin offering very high resistance in the other direction. 3. 3 Switching Unit This unit is the centre of this whole circuit, which I call the decision section. Here it is expected to differentiate between a pulse that should be counted and those that should not. Look Looking ing at the characteristic of an AND gate that in high (1) when the two inputs are high (1) that can be seen in Table 2. Table 2. Truth Table of an AND gate A B OUTPUT 0 0 0 0 1 0 1 0 0 1 1 1 By varying the time of each pulse reaching th the AND gate, one can discriminate between etween the input A and B being high or alternating. This variation was achieved through the use of a transistor. Here the transistor acts as a switch. Working in a common emitter mode with input current (base current) coming comi from the delay circuit and a shape pulse coming from a push button switch connected to the collector terminal. It could be seen in Figure 11 that, the duration of the pulse that comes from the switch S is much shorter than that which comes from the inputt of the base terminal. In this way once the 200uF capacitor is charged it begins to discharge gradually through the transistor to the ground. But if during that discharge a pulse comes from the collector, only then will an output be seen at Vout. This is to say if the switch S is pushed first; the pulse comes into the collector and goes to the ground because there is no base current to complete the switching process. Whereas if the switch in the 555 timer is triggered first then it charges the delay circuitt that will hold enough charge to complete the switch at the arrival of the collector current.



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V+

IcRc

Ib Vin

VCE

Rb

VBE

Figure 11. A Transistor Switch The resistor R2 = 330 ohms acts as a pull down resistor dropping the internal voltage of the counter to less than 0.8 from its original value of 1.6V, 3. 3 Counting Unit It is expected to keep track of event event, in this case every pulse that comes out of Vout of the transistor. transistor To achieve this, three counters were employed; primarily to give a three digit count unt (up to 999). 999) the basic blocks of the counting unit involves, the 74LS90 decade counter, 74LS47 BCD BCD-to to-seven-segment decoder/driver, and Light emitting diode (LED) display of the common anode type. The 74LS90 is a high speed, monolithic decade counter cconsisting of four dual-rank rank Master-slave Master flip-flops internally interconnected to provide a divide divide-by-two two counter and a divide by five counters. The 74LS90 circuit is negative edge triggered. From the pin layout below,, it can be seen that the device has two clock inputs Ai and Bi and output are QA, QB, QC, and QD. The 7490 counter has four reset leads, Ro (1), Ro (2), R9 (1) and R9 (2). When the Ro leads are logic 1 together the counter output resets to decimal 0 or QDQCQBQA = 0000. On the other hand, making the R9 leads logic 1 causes the output to reset to decimal 9 or QDQCQBQA= 1001. Those leads can be used to change the count sequence. The 74LS47 integrated circuit is a standard decoder/driver. Its outputs are buffered to a voltage rating of 15V and current nt of 20mA to enable it drive a LED display directly. From the pin layout,, it can be seen that the decoder has four inputs A, B, C, and D where D is the most significant bit. There are seven output leads marked a through g. It has three control leads, RB1 is ripple-blanking input, and RB0 is for ripple blanking output and LT Lamp test. The 74LS47 is designed to drive the common anode LED when using it to drive the common cathode LED, the outputs are inverted. The display uses an array of seven light light-emitting g diodes to form numbers in the range from 0 to 9 and another diode to provide the decimal point. To operate the common anode LED display, all anode terminals must be supplied by a positive ve voltage of 5V, for a number to light; the correct cathode lead must be connected to ground. Usually, a resistor should be connected in series with each segment to limit the current in the respective diode segment. Below is the connection of the complete counting unit.



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Figure 12. 2. Pin connections of the complete counting unit 3. 3.1 Design Calculation of the Counting Unit Across the 555 timer, Total external resistance = 10k + 10k = 20k Voltage across the resistor = 5V Therefore, current flow to the 555 timer, I1 = V /R I1 = 5 /20k = 0.25m A. The current drop across the pull down resistor of 330 ohm, for a voltage drop of 1.6V, I2= 1.6/330 = 4.848mA The current drop across one of the resistor connecting the output of the decoder to the anode of seven segment ment display receiving a voltage drop of 5V is I3 = 5/330 = 0.0 15 A. Since there are seven connected in such a manner for each of the two decoder (meaning R x 14). I3T =l3Xl4 = 0.015x14 = 0.212A, and I3T =212mA. Being that the TTL, 1C family requires low milliwatts to operate. Current through the 1C is negligible. Hence, total current within the circuit IT will be given as: IT = 212mA + 4.845mA+.25mA = 217.095mA. With the knowledge of the expected circuit current consumption, the filter capacitor to be uused sed is calculated using the formula given below:

(6)

= 241.8mA/(4√3x50x5x0.07) = 1.994x 10−3 For which 220uF was chosen Recap: 1. The choice of 10k resistor between Pin 7 and source for the 555 alongside the 98.7 x 10−3 F was to achieve a delay of one second in tthe conducting part: T = 1.1 × 10k x 98.7 x 10 −3 = 1.085 7 sec. 2. The delay made by the resistor resistor-capacitor capacitor circuit will offer a delay of T = R x C. where, R = 20kohms and C - 1 x 10 −4 F Therefore, T = 20k x 10−4 = 2 seconds.



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4. Experimental Results and Discussions In this section, we itemized the steps and stages of procedure taken to verify the mathematical calculated results through the real time experimental results results. 4.1 Testing The physical realization of the project is very vital. This is wher wheree the fantasy of the whole idea meets reality. The designer will see his or her work not just on paper but also as a finished hardware. After carrying out all the paper design and analysis, the project was implemented and tested to ensure its working ability, abili and was finally constructed to meet desired specifications. The process of testing and implementation involved the use of some measuring equipments equipments. Table 3. Components Test results Component

Test

Result Remark

555 timer 1C Multimeter (V) 4.22 Diode Counter

VCC

Good

Multimeter (V) 3.55

Good

Multimeter (V)

Good

1.7

5V XMM1

8

R2 10kohm

G

RST 3

7 6

R1 2

10kohm

XSC1

U1

VCC

4

OUT

DIS THR TRI

5 CON GND

sw

1

C1 200uF

LM555CN

C2 10nF

Fig Figure 13. Simulation of the timer circuit

Figure ure 14. Graph of the one shot timer circuit


T A

B


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Figure 15.. Graph showing the one second (1s) triggers pulse

7805 A

220 V AC,5OHz

1 N2001

100 µF

2200 µF

TX 220/12V

1KΩ

Fig Figure 16. A complete power supply unit

V1 5V

CA

R5

U8

330Ω R6 J1

A B C D E F G

U2 14 1

Key = A 8

U1

VCC

R1 10kΩ

R2 10kΩ

4

DIS

6

THR

2

TRI

5

J3 Key = A

RST

7

OUT

3

Q1

2 3 6 7

R3

INA INB

10nF C2 100uF-POL

12 9 8 11

R91 R92

7 1 2 6

A B C D

3 5 4

~LT ~RBI ~BI/RBO

OA OB OC OD OE OF OG

13 12 11 10 9 15 14

74LS90N

2N2222

330Ω

R8 330Ω

R9

R10 330Ω

20kΩ

R11

74LS47N

330Ω

330Ω R12

CON GND

C1

QA QB QC QD

R01 R02

R7 330Ω

U5

1

LM555CM

R4 330Ω

U3 14 1

INA INB

2 3

R01 R02

6 7

R91 R92

QA QB QC QD

7 1 2 6

A B C D

3 5 4

~LT ~RBI ~BI/RBO

74LS90N


13 12 11 10 9 15 14

R14 330Ω 330Ω R15 R16 330Ω

330Ω

14 1 2 3 6 7

INA INB R01 R02 R91 R92

12 9 8 11

7 1 2 6

A B C D

3 5 4

~LT ~RBI ~BI/RBO

R18

R19 330Ω

U7 QA QB QC QD

U9 A B C D E F G

330Ω R17

74LS47N

U4

CA

R13

330Ω

U6 12 9 8 11


13 12 11 10 9 15 14

R20

330Ω

R21 330Ω 330Ω

CA

R22

U10

R23 330Ω A B C D E F G

74LS90N

74LS47N

330Ω R24 R25

330Ω

330Ω

Figure 17. A complete circuit diagram of the digital bus passenger system



www.iiste.org

4.1 Packaging house presentation, a wood wooden en frame was chosen. An illustration of the For the purpose of a small in-house physical appearance of the he prototype is shown in Fig Figure 18.

Figure ure 18. Physical appearance of the prototype The packaging is made up of eight exterior parts, which are indicated by the thick lines and dimensions. The flat plywood is used for the external coaling, and is held firmly to a structure of wood connected along the edge perpendicular to the horizon horizontal tal ground. Air vents are provided for ventilation, ventil to avoid over-heating heating due to extreme temperature prevalent in this period of the year. The display on the other hand was put at the right side of the prototype; mainly to case presentation and to avoid exposedd wires connecting the display tto o the firmly fixed display drivers mounted on the Vero board. 5. Conclusion This research was aimed at design and implementation of a low cost digital bus passenger counter system. The results obtained btained are presented and fully discussed. After carrying out the necessary test, it was observed obse that the aim of the work was achieved. Initially, the idea that counting the number of passengers that enter the bus can only be achieved with complex circuit due to all it constraints have been proven wrong. The fact that there is only one door for entry and exit of the bus, passengers at times behave radically (entering only to leave the next minute), and cannot be properly counted have also been proven wrong. wrong It is possible to achieve an accurate count of all the passengers that enter the school bus, and thereby, provide data upon which proper accounting can be effected. Given the constraint upon which this work was carried out, some additional features can bee included to give better and more precise count. In the switching unit, u a delay can be connected to the ignition to start the switch some minutes after the bus starts moving, moving a delay to be connected also to the ignition to stop the flow of energy to the sswitch and switching unit, the t addition of a de-bouncer bouncer to avoid any form of skipping is also necessary, of which is our next point of target. target Finally, I will recommend the use of this device only when workers are pproperly roperly remunerated at when due, due and a proper per reward system is put in place for the benefit of all stakeholders.



www.iiste.org

References Accessed 2012), “Transformers”, www.transformer-wikipedia,thefreeencyclopedie.htm wikipedia,thefreeencyclopedie.htm Darkwarriorblake, (Accessed Electronic Circuits (2011),, Projects, Electronics design, Circuit Diagrams, Electronics Hobby Kits and Schematics, online available at: http: http://www.electronic-circuits-diagram. Giorgio-Hill, (2000), “Principle Principle of Electrical Engineering Engineering”, McCraw-Hill Hill higher Education, Ohio, 360-392 Hollerith, H. (Accessed 2012), “An electric tabulating system”, Online Available at: http://www.columbia.edu/acis/history/hh/index.html/ Hughes, E. (1995), “Electrical Electrical Technology Technology”, Addison Wesley Longman Limited, England,, 198-206. 198 Hurowitz, P. Hill, W. (1988), “The art oof Electronics”, Cambridge University press, New York, 342-349 342 Hurowitz, P. Hill, W. (1995), “The art oof Electronics”, The Press syndicate of the University of Cambridge, Australia, 269-277. Integrated circuits (Chips), (Accessed 2012), online available at: www.kpe.freeuk.com/components/ie.htm Jobs S. (Accessed 2010), http://www.computerhistory.org/sitemap.html. Jones, O.R. (Accessed 2012), http://www.es.wowa.edu/jones/roling/ Ronald, J. Tocci, Widmer, N. Moss, G. (1998), “Digital Systems Principles and Application”, Application Prentice-Hall International Inc., New Jersey, 182 182-341. Theraja, B. L.. Theraja, A.K. (1999), “The Textbook of Electrical Technology”,, S. Chand and Company Ltd, New Delhi, 919- 1953 Tokeim, (2004), “Digital Electronics Electronics, Principles and Applications”, sixth Edition, McGraw-Hill McGraw Publishing company Limited, New-Delhi, elhi, 378 378-504. Tony V.R. (Accessed, 2012), “555 Timer tutorials”, available online at:www.555timer-oscillatortutorial.htm oscillatortutorial.htm


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