Design and implementation of a cost-effective quasi line ... - IEEE Xplore

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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 18, NO. 4, JULY 2003

Design and Implementation of a Cost-Effective Quasi Line-Interactive UPS With Novel Topology Ming Tsung Tsai, Member, IEEE, and Chia Hung Liu

Abstract—This paper presents an improved single-phase passive-standby uninterruptible power supply (UPS) for low cost applications. The proposed system includes an input rectifier/charger and a switching inverter. It is basically an off-line UPS structure, but has nearly the performance of a line-interactive UPS. It can continuously regulate the sustained voltage swells and sags by injecting a voltage in series with the source voltage in the normal mode, and can be switched smoothly to back-up mode when the utility voltage goes outside the specified range, or fails. The regulation range is also larger than conventional off-line and line-interactive UPSs. Additionally, the proposed system has no low frequency transformer, which would involve a heavy and bulky structure. Theoretical analysis has been achieved based on the power flow theory. Case study is demonstrated by means of a prototype experiment to prove its performance and effectiveness. Index Terms—Charger, off-line, power flow theory, transmission.

I. INTRODUCTION

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OLTAGE-SENSITIVE equipment requires a well-regulated load voltage. Uninterruptible power supplies (UPSs) are used to supply uninterrupted power to these critical loads. UPSs are classified into three topologies [1]–[11]: off-line UPS, line-interactive UPS, and online UPS, as shown in Fig. 1. These terms refer to UPS operation with respect to utility power. For the off-line UPS, the load is supplied with the utility line in normal mode, and the battery charging. When the utility voltage goes outside the specified tolerances or fails, the battery ensures continuous supply of power to the load with a very short switching time (generally less than 10 ms). The off-line UPS system may have the capability of voltage regulation, however, additional devices, such as a tap changing transformer, must be incorporated into the system to provide the function. Fig. 1(a) shows a simplified diagram of an off-line UPS with no voltage regulation ability, and Fig. 1(b) shows a similar topology that includes a voltage regulation function. The structure shown in Fig. 1(b) is sometimes called the passive-standby UPS [3]. The line-interactive UPS may include two feasible topologies: one consists of an inductor in series between the utility input and the load, and a bilateral inverter in parallel with the load, acting as a backup for the utility line, and interacting with the utility line when the energy is reversible, Fig. 1(c) shows a simplified diagram of this system. The other topology consists Manuscript received September 12, 2002; revised February 10, 2003. This work is supported by the National Science Council, R. O. C. under Research Project NSC90-2213-E-218-025. Recommended by Associate Editor C. K. Tse. The authors are with the Department of Electrical Engineering, Southern Taiwan University of Technology, Tainan, Taiwan, R.O.C. (email: [email protected]). Digital Object Identifier 10.1109/TPEL.2003.813764

of two converters, one is in series with the utility source, and the other is in parallel with the load. These two stages have the capability of bilateral energy transfer, therefore, the load voltage and the source input current can be controlled independently, Fig. 1(d) shows a simplified diagram of this system. The line-interactive UPS has the ability to include limited voltage regulation (dependent on the inductor or converter which is in series between the utility and load) and an active power filter function. However, the load frequency is dependent on the utility line. It is less costly than the on-line UPS, but this requires a complex control algorithm. The on-line UPS continuously supplies the load via the rectifier/charger and the inverter (ac-dc-ac) in both normal and abnormal utility conditions. As the energy goes through double-conversion, the load voltage, load frequency and the utility current can be controlled independently. When the utility line fails, the inverter and battery continue to support load power. Thus, this type of UPS system provides continuous protection against utility voltage changes, however, this topology is usually the most costly. Fig. 1(e) shows a simplified diagram of this system. The topology of the passive standby UPS shown in Fig. 1(b) has disadvantages, including a limited load voltage regulation capability, no ability to reduce the source voltage harmonics, and a long switching time, resulting in a system that can not accept certain sensitive loads. However its advantages of simple design, low cost and small size provide a compromise between an acceptable level of protection against utility line disturbances and cost, especially for power ratings of less than 1 kVA. In this paper, an improved single-phase passive standby UPS is proposed for low power and low cost applications. It has a simple power circuit configuration and control algorithm equal to the conventional off-line system, but with enhanced capabilities including bi-directional voltage regulation, voltage harmonics reduction, and a small transient time when the mode change occurs. Thus, its performance is approximately the same as the line-interactive UPS system. The proposed system is composed of a rectifier/charger, and an inverter, with or without a dc/dc boost stage according to one’s low battery voltage application. With the proposed control algorithm, it can be used to deal with both directions of voltage regulation, but only one direction of energy flow since the front stage is a rectifier/charger. II. SYSTEM ANALYSIS A. Normal Mode In normal utility voltage situations, the proposed inverter shown in Fig. 2 is connected in series with the utility input,

0885-8993/03$17.00 © 2003 IEEE

TSAI AND LIU: COST-EFFECTIVE QUASI LINE-INTERACTIVE UPS

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(a)

(b)

(c)

(d)

(e) Fig. 1 Simplified diagram of an (a) off-line UPS with no voltage regulation ability, (b) conventional passive-standby UPS, (c) line-interactive UPS with single converter structure, (d) line-interactive UPS with a two converter structure, and (e) on-line UPS.

based on the load power factor for voltage swells. The power delivered from the inverter in steady state can be shown as (1) (2) and denote where denotes the inverter output voltage, denotes inverter output the source voltage and load voltage, instantaneous power, denotes the inverter output current, and denote the load current and the capacitor current. Nor, thus the above equation can be expressed apmally, proximately as (3) Fig. 2.

Proposed passive-standby UPS system.

and acts to compensate for utility voltage fluctuations by maintaining a sinusoidal load voltage with a constant root mean square (RMS) value which is in phase with the utility voltage for voltage sags, and at a different angle from the utility voltage

Let to

be the complex power related to the . Thus

, and

be equal (4) (5)

and denote the related transferred average power where , and reactive power from the inverter stage,

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and denote the RMS values of the source voltage, load voltage and load current, denotes the phase difference and , and denotes the phase difference between between and . From (3), it is well-known that if one maintains in-quadrature with the load current the inverter voltage , regardless of source voltage variations (undervoltage, or overvoltage), the transferred real power from the inverter stage will be zero. Thus, the inverter will become a self-controlled dc bus reactive power compensator, with no need for a dc power supply, resulting in the simplest possible circuit design. However, from (4), it can be seen that this condition will result in the following constrain [11]:

(a)

(b)

(6) which shows that this control idea has a limited load power , and can not be factor for undervoltage condition used in all load voltage situations [11]. In opposition to this, a method that minimizes the inverter power rating instead of zeroing the real power flow can be obtained by maintaining the inverter output voltage in phase with the source voltage, regardless of source voltage variations. However, from the above equation, it is clear that the energy will be fed back into the proposed inverter if the load voltage is controlled in phase with the source . Thus, a bilatvoltage in the voltage swell situation eral two-stage solution will result so as to transfer the bilateral power flow, resulting in a complicated and expensive resolution. In order to simplify the rectifier/charger design, this paper proposes a control algorithm, adopting an in-phase control when voltage sags occur, and a phase-shift control when voltage swells occur, thereby supplying continuous power to the load from the rectifier/charger. This paper also utilizes the power balance concept to simplify the control algorithm whereby the inverter switches to the regulation mode only in relation to the detected dc bus voltage, and the inverter can regulate the load voltage continuously. Fig. 3(a) shows the phasor diagram of the proposed inverter shows the inoperating with source undervoltage, where shows the capacitance load. Regardless ductance load, and of load power factor, Fig. 3(a) shows the inverter voltage differs from the load current and with a phase angle smaller than 90 , thus, assuring the power flow from the rectifier/charger through the proposed inverter to the load. The load power flow in this situation includes two routes: 1) One passes from the utility and directly through the inverter to the load; 2) the other passes from the rectifier/charger, through the dc/dc boost stage (if used) and inverter, then to the load. When the voltage variation is larger than the rectifier/charger’s capability, the battery will support the insufficient energy. The voltage regulation capability in this situation has a maximum range of about zero to 100% of nominal utility voltage. This range is nearly the same as the on-line UPS performance, and is superior to the line-interactive UPS structure. When voltage swells occur, the inverter output voltage is regulated continuously in quadrature with the load current so as to zero the power flow through the inverter. The load power consumption in this situation is supported directly from the utility

(c)

(d) Fig. 3 Phasor diagram of the proposed inverter operating in the (a) undervoltage situation and (b) overvoltage situation. (c) The desired inverter output voltage in the minimum case and maximum case. (d) The phasor diagram when the phase-lag shift strategy is used for the capacitance load situation.

source. Thus, the switching loss in this case is smaller than the above situation. Fig. 3(b) shows the phase diagram including the , and the capacitance load . Based on inductance load Fig. 3(b), the following equations can be obtained: (7) (8) Thus, the amplitude of the desired inverter output voltage, is dependent on load power factors. The lower the load power amplitude; a maximum amplitude of factor, the smaller the occurs in the unity power factor, and a minimum amplitude occurs in the pure reactance load. Fig. 3(c) shows these two sitampliuations. Table I shows the maximum requirement of tude for the resistive load due to the load voltage swell ratio. Thus, the proposed UPS system has a large regulation ability of about 100% to 40% rated voltage. For a range of 20% overvoltage, the maximum requirement of amplitude will be 0.663 per-unit(PU) of the load. Since the inverter is certain to have some operating loss which will involve the dissipation of amplitude some energy to supplement the loss, the required is smaller than that which is shown in the above table. A different phase-shift strategy related to Fig. 2(b) may be used for


TABLE I MAXIMUM REQUIREMENT OF V AMPLITUDE DIFFERENT LOAD OVERVOLTAGE RATIO

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FOR

limited voltage variation ranges, such as those using only the phase-lag shift strategy for all load situations in order to simplify the phase-shift algorithm. Fig. 3(d) shows the case where the phase-lag algorithm is used in the capacitance load situation, thus the desired amplitude of the inverter output voltage will be as

(a)

(9) It is clear that the desired inverter output voltage is larger than that of (8). (b)

B. Backup Mode When the utility input fails or goes outside the specified tolerances (above 40% rated voltage), the relay connector will be changed-over and the proposed system will smoothly transfer to the backup mode. In this mode, the load power is supplied by the battery. As the proposed inverter does not change its control loop, resulting in a minimal transition response, the mode change has essentially no delay time, and the system continues to operate on battery power until the utility input recloses. III. CIRCUIT DESIGN A. Inverter Stage Fig. 4(a) shows the control block diagram of the proposed inverter stage. It is mainly composed of a dc voltage regulator (DCR) for the outer loop, and an ac voltage regulator (ACR) for the inner loop. In the outer loop, the average value of the load voltage is detected by the rectified circuit and sent to the DCR. The DCR is mainly a PI controller which is used to regulate the load voltage to ensure that the command is followed. The inner ACR loop is designed for reducing the variation effects of the load current and dc bus voltage, and enhancing system stability. The main control difference between voltage sag and voltage swell is the additional in-quadrature signal generation route which consists of a phase shifter control circuit to shift the source voltage signal to 90 . The phase shift control circuit generates a zero level signal in voltage sags, and a proportional dc control signal according to the dc bus voltage variations in voltage swells. This control strategy is based on the concept of energy balance. The proposed inverter operates in such a way that when the voltage swells, the in phase command of the ACR loop will cause the energy to feed back to the dc bus, resulting in a dc bus voltage increase. If the dc bus voltage increases above the permitted level, the phase shift control circuit will produce a dc level which corresponds to the error between the permitted dc bus voltage and the actual dc bus voltage, and is processed

Fig. 4 (a) Control block diagram of the proposed inverter stage and (b) phase shift control circuit.

by a proportional controller. Then, the resultant signal is sent to the multiplier, thus the in quadrature term is fed into the circuit to shift the ACR loop command. If the phase shift quantity of the command is insufficient, the energy will be fed back continuously to the dc capacitor, also resulting in an increase of dc bus voltage. A larger dc control signal will be generated, resulting in a larger in quadrature term being sent to shift the ACR loop command until the energy can no longer be fed back, thus a new status of energy balance is established. In contrast to conventional 90-degree phase shift control, the proposed idea has the merit of an optimum phase shift quantity, resulting in a minimum phase shift of load voltage. Fig. 4(b) shows the phase shift control circuit. By considering the system shown in Fig. 2, one can obtain the following equations: (10) (11) (12) is the inductance of the inductor, is the equivawhere lent series resistance of the inductor, is the capacitance of the is the equivalent series resistance of the cacapacitor, and pacitor. Using the average concept and taking the Laplace transformation of the above equations, the average model of the inverter stage can be reasonably represented by the block diagram shown in Fig. 5(a), and a simplified block diagram can be shown as Fig. 5(b), where (13)

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used in the ac regulator. Fig. 5(c) shows the control block diagram of the ac regulator loop, where is the gain of the and are related to the low pass PWM modulator, filter and the lag-lead compensator, which can be represented as (15) (16)

(a)

(17) is the peak value of the triangular wave, and is where the inverter dc bus voltage. The purpose of the lag section is to increase the low frequency gain, and the lead section increases the bandwidth and stability margins. The purpose of the low pass filter is to reduce the switching noise and high frequency noise. Thus, the control transfer function, the output impedance, and the audio susceptibility, respectively, become

(b)

(18) (19) (20) Fig. 5(d) shows the experimental lag-lead compensation circuit used in this paper, where (21)

(c)

(22) (23) thus

where

(d) Fig. 5 (a) Average model of the inverter stage. (b) The simplified block diagram corresponding to Fig. 5(a). (c) The control block diagram of the ac regulator loop. (d) The experimental lag-lead compensator circuit.

(14) Two considerations for designing the ac regulator must keep in mind. First, an integrator can not be used in the ac regulator loop as it will integrate a low level dc signal while a dc comexists due to the draft of circuit components, with ponent the result that the regulator will go to saturation during a time interval. Second, a large gain in the ac regulator can not be used, as it will also amplify the dc drifts of the operational amplifier

, ,

,

, ,

, , .Based on an interactive process, the , control parameters can be chosen as , , , Hz, . It is also shown in Fig. 4(a) that a low level dc voltage may exist in the inverter output due to the dc bus voltage variation and/or the draft of circuit components. To eliminate this condition, a dc balance regulator (DCB) is necessary. Due to the slow variation characteristic of the dc-bias voltage, the dc balance regulator should contain a low pass filter to pick up the dc component of the inverter output voltage caused by the low level dc voltage mentioned above. This paper uses an integrator to achieve this function, and can be shown as (24) Fig. 6(a) shows the closed-loop frequency response of corresponding to the above parameters, and includes the dc bal-


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(a) (a)

(b) Fig. 6 Closed-loop frequency response of (a) balance loop functions and (b) V = V .

1

V =V

including the dc

ance loop functions, which shows that the bandwidth is about , which 4 kHz. Fig. 6(b) shows the transfer function of shows that the dc balance loop has a good dc bias rejection capability. The dc voltage regulator shown in Fig. 4(a) is used to eliminate the existing steady state error. This is because the main frequency gain (50/60 Hz) of the ac regulation loop is insufficient to give full compensation for the battery voltage variation and full load change. It includes a precision rectifier, a low pass filter to smooth out the rectifier output, a 120 Hz notch filter, and a PI compensator. The notch filter is used to reduce the ripple voltage which comes from the precision rectifier. The effect of the ripple voltage can be shown in the following. Assuming that the output of the dc voltage regulator includes a 120 Hz ripple voltage, then it can be represented as (25) and denote the related dc value and the ripple where voltage of the DCR output, and denotes the fundamental frequency of the inverter. Thus, the ac voltage regulator input signal becomes as

(26) It can be seen that the ac voltage regulating input command signal is distorted by the ripple voltage. There are two strategies that can be used to reduce this effect: one is to use the notch filter; the other is to reduce the gain of the dc voltage regulator loop at frequencies higher than the fundamental frequency. Both of these methods are used in the dc voltage regulator design presented in this paper.

(b)

(c) Fig. 7 (a) Simplified control block diagram of the dc voltage regulator loop. (b) The frequency response of V =V corresponding to the change of Q. (c) The entire frequency response of the dc regulator loop corresponding to the change of Q.

Exact analysis of the dc regulating loop is difficult as it consists of nonlinear elements, such as a rectifier and a multiplier. Therefore, a simplified design procedure is adopted in this paper. Fig. 7(a) shows the simplified control block diagram of denotes the amplitude the dc voltage regulator loop, where denotes the turn ratio of the of the inverter output voltage, denotes the gain of the precision potential transformer, and rectifier. As the bandwidth of the ac voltage regulator loop is wider than the dc voltage regulator loop, it can be considered as a constant gain in the low frequency range, and is denoted . The output voltage is fed to the precision rectifier, as and can be represented as a constant gain and an additive disin Fig. 7(a). turbance of ripple voltage shown as represents the notch filter, and can be shown as (27)

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where denotes the notch frequency, and Q denotes the quality factor. The quality factor can have a significant effect . Fig. 7(b) shows on the ripple rejection capability, due to the change of Q. It the frequency response of shows that a small value of Q can have a significant notching effect. However, too small is not recommended because it can also influence the response of the dc voltage regulator. Fig. 7(c) shows the entire frequency response of the dc regulator loop due to the change of Q, note that the dynamic of the inner ac regulator loop has been contained. It shows that a small value of Q is adverse to the dc voltage regulator, thus, a trade-off must be made. B. Rectifier/Charger Stage The proposed rectifier/charger stage includes two functions: one is to support the insufficient power; The other is to charge the battery. The capacity of this stage is dependent on the expected regulation ability for sustained voltage sags, without using the battery. This paper adopts 20% of the voltage sag level for practical consideration. A voltage sag of about 20% will result in the use of the battery to fill the power demand. Thus, the proposed system has an enhanced voltage regulation ability to 100% of voltage sags, and enhanced battery energy as long as the sag lasts. This feature is superior to the conventional off-line UPS and line-interactive UPS systems which have only a limited voltage regulation ability which makes the proposed system an excellent voltage regulator. This paper uses the flyback structure for this stage as it has no requirement of a secondary output inductor, resulting in a significant advantage in cost and volume saving, however, any topology in accordance with the above functions can be used.

(a)

(b)

C. DC/DC Boost Stage When a low voltage level of the battery bank is expected, the dc/dc boost stage must be inserted between the battery bank and the inverter. This dc/dc stage has two functions: one is to route the insufficient power through the the battery in voltage sag situations in normal mode; the other is to supply battery energy in the backup mode. As it may be operated in rated load for the back up mode, efficiency is the main design a good choice for a low battery voltage system. The main advantage of a push-pull converter is that no more than one switch in series conducts at any one time. This is important for the low battery voltage system so as to avoid a reduction of efficiency. Also, it provides a common ground for control drivers. However, any feasible topology can be used here. IV. EXPERIMENTAL TEST In order to verify the proposed principle, a prototype of 1 kVA UPS is constructed. It includes a rectifier/charger stage V , a battery bank of 48 V, a dc/dc boost of (48 V/180 V), and an inverter stage. The parameters used in , nominally, the inverter stage are kHz, F, , switching frequency F. The control circuits are composed of analogue circuits including operation amplifiers and multipliers. The reference sine-wave signal is generated from the PLL circuit,

(c) Fig. 8. Experimental results of the corresponding source voltage and load voltage when the proposed system is operated in the normal mode: (a) source voltage sag, (b) normal source voltage, and (c) source voltage swell.

and the cosine-wave signal is obtained by shifting the sine-wave by 90 . Fig. 8 shows the experimental results when the proposed system is operated in the normal mode, including three cases of source voltage. Fig. 8(a) shows the corresponding source voltage and load voltage during a voltage sag. It shows that the source voltage has been boosted to the desired level. Fig. 8(b) shows the normal source voltage situation, where the source and load voltage havenearly the same amplitude. Fig. 8(c) shows the corresponding source and load voltage during voltage swells where the proposed inverter has decreased the


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(a)

(a)

(b)

(b) Fig. 10 (a) Experimental result of the RL load case when the load is changed from no load to R = 12 , L = 8 mH. (b) The experimental result of the case when the source voltage sagged to a very low voltage level of 10 V .

(c)

(d) Fig. 9 (a) Simulation result of the case where the source voltage contains some harmonics. (b) The harmonics comparison table corresponding to Fig. 9(a). (c) The experimental result of the case where the source voltage contains some harmonics. (d) The harmonics comparison table corresponding to Fig. 9(c).

source voltage amplitude, and a phase-lagging shift effect has been verified. Fig. 9 shows the case where the source voltage contains some harmonics. Fig. 9(a) shows the simulation result where the source harmonics have been reduced by the proposed inverter. Fig. 9(b) shows a comparison table in which the harmonic

reduction effect can be observed. Fig. 9(c) shows the experimental result where the proposed inverter has decreased the source voltage harmonics, thus, the proposed inverter also has a voltage harmonic cancellation capability. Fig. 9(d) shows a harmonic comparison table related to Fig. 9(c). Fig. 10(a) shows the system performance in the RL load case, , mH. when the load is changed from no load to It shows that the proposed inverter can maintain the load voltage in accordance with the load change. Fig. 10(b) show the case where the source voltage has sagged to a very low voltage level of . In this case, the battery will provide the load consumption, and shows the load voltage maintained at the desired level, thus the proposed system has a large voltage regulation range. Fig. 11 shows the transition response between the normal mode and backup mode. Fig. 11(a) shows the corresponding source voltage and load voltage in the voltage sag situation where the source voltage is boosted to the desired level, and the proposed system is maintaining the load voltage. Fig. 11(b) shows a similar case in the source voltage swell situation. Fig. 11(c) shows the transition response when the system goes from backup mode to normal mode. These cases show that the proposed system can maintain the load voltage when the source voltage is in blackout and/or recovery mode, and the performance is approximately the same as the line-interactive UPS system.

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(a)

(a)

(b)

(b)

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(c) Fig. 11. Experimental results of transition response between the normal mode and backup mode: (a) the corresponding source voltage and load voltage in the voltage sag situation while the utility source breakout, (b) the corresponding source voltage and load voltage in the voltage swell situation while the utility source breakout, and (c) the corresponding source voltage and load voltage when the system from backup mode to normal mode.

Fig. 12(a) shows the source voltage and load current in an RC load case. Fig. 12(b) shows the source voltage and the related rectifier/charger input current. Fig. 12(c) shows the source voltage and the corresponding source current. The source current is mainly dependent on the load current since most of the energy is directly supplied from the utility source through the

(d) Fig. 12 (a) Source voltage and load current in a RC load case. (b) The source voltage and the related rectifier/charger input current corresponding to Fig.12 (a). (c) The source voltage and the related source current corresponding to Fig. 12(a). (d) The measured efficiency including three types of source voltage for the resistance load case.

proposed inverter stage to the load. Thus, the total efficiency for the proposed system is dependent on the inverter stage efficiency. Fig. 12(d) shows measured efficiency results including


three types of source voltage ( , , ) for the resistance load case. As with the proposed control algorithm, all of the load power is directly supplied from the utility source through the inverter stage to the load in the case of overvoltage. Thus, the efficiency should be larger than the undervoltage case. This can be observed in Fig. 12(d). Comparing the proposed system with the related series voltage regulators presented in [1], [10], and [11], the distinct difference is that the proposed system replaces the bilateral rectifier presented in [1], [10], and [11] by the unidirectional rectifier. Therefor, one can say that the main structures presented in [10], [11], and [11] are similar to the two-converter structure shown in Fig. 1(d). The main structure presented in [11] has a larger dc bus voltage, and uses two low frequency transformers to reduce both the rectifier rating and inverter rating. The main structure presented in [10] is to replace the low frequency transformers presented in [11] with no transformer, and together with a three-arm rectifier-inverter topology to simplify the conventional two-stage topology. These two systems have the advantages of including a full range of voltage regulation (if the rating of the rectifier stage is the same as the inverter stage) and unity power factor control. However, these systems have a high dc bus voltage, thus additional charger and dc/dc boost stages are necessary for low battery UPS system applications, moreover, the control algorithms of the rectifier stages are complicated. In contrast to these, the main structure presented in [1] uses a lower dc bus voltage than that of [10], [11], and replaces the low frequency transformers presented in [11] with the push-pull based low frequency transformers. Thus, it is suitable for the low battery UPS system with no additional charger and dc/dc boost. However, this structure has a limited voltage regulation ability except that it uses a huge transformer for the rectifier stage, and the control algorithm presented in the rectifier stage is similar to the rectifiers presented in [10], [11]. The main structure presented in the proposed system combines these systems presented in [1], [10], and [11]. The proposed high frequency transformer based rectifier/charger stage allows the system to be suitable for both high and low battery voltages. This is achieved by a suitable design of the transformer turn ratios. Thus, if the low battery voltage UPS system is desired, the proposed rectifier/charger stage uses only one conversion stage to fulfill these two functions. The proposed inverter stage allows the system to have a full range of voltage regulation as it uses no low frequency transformer. However, one must point out that the proposed UPS can not replace all of the functions presented in [1], [10], and [11]. It shows only that the proposed system may be suitable for some UPS system applications, such as a lower battery voltage, a more compact volume (such as the use of a high frequency transformer), and a simpler control algorithm for the rectifier/charger stage. V. CONCLUSION In this paper, a cost-effective passive-standby UPS has been described. A novel and effective control strategy has been verified for the compensation of source voltage fluctuations in the normal mode, which can also be used in the backup mode. It is an off-line UPS structure, with the regulation performance of a line-interactive UPS. It provides benefits including:

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1) voltage harmonics reduction capability; 2) a very small transient time when switching to the back-up mode; 3) no need for a low-frequency transformer; 4) a large range of voltage swell and sag regulation; 5) high power density, low cost, and smaller size. Prototype experiments including different load cases have demonstrated that the performance of the proposed method is effective. It shows the developed method to be valuable for the power electronic industry. REFERENCES [1] B. H. Kwon, J. H. Cho, and T. W. Kim, “Improved single-phase lineinteractive UPS,” IEEE Trans. Ind. Electron., vol. 48, pp. 804–811, Aug. 2001. [2] G. Joos, “Three-phase static series voltage regulator control algorithm for dynamic sag compensation,” in Proc. IEEE Int. Symp. Ind. Electron., 1999, pp. 515–520. [3] S. Karve, “Three of a kind,” IEE Review, pp. 27–31, Mar. 2000. [4] Y. S. Lee, D. K. W. Chen, and Y. C. Cheng, “Design of a novel ac regulator,” IEEE Trans. Ind. Electron., vol. 38, pp. 89–94, Apr. 1991. [5] C. C. Chen and D. M. Divan, “Simple topologies for single phase ac line conditioning,” IEEE Trans. Ind. Applicat., vol. 30, no. 2, pp. 406–412, Mar./Apr. 1994. [6] X. Z. Zhang, “Analysis and design of a switched-mode ac/ac voltage regulator with series connected compensation,” in Proc. IEEE Power Electron. Variable-Speed Drives Conf., 1994, pp. 181–187. [7] S. Rathmann and H. A. Warner, “New generation UPS technology, the delta conversion principle,” in Proc. IEEE Ind. Applicat. Soc. Annu. Meeting, 1996, pp. 2389–2395. [8] S. J. Jeon and G. H. Cho, “A series-parallel compensated uninterruptible power supply with sinusoidal input current and sinusoidal output voltage,” in Proc. IEEE Power Electronics Spec. Conf., 1997, pp. 297–303. [9] W. E. Brumsickle, R. S. Schneider, G. A. Kuckjiff, D. M. Divan, and M. F. Mcgranaghan, “Dynamic sag correctors: cost-effective industrial power line conditioning,” IEEE Trans. Ind. Applicat., vol. 37, pp. 212–217, Jan./Feb. 2001. [10] S. J. Chiang, C. Y. Yen, and K. T. Chang, “A multimodule parallelable series-connected PWM voltage regulator,” IEEE Trans.Ind. Electron., vol. 48, pp. 506–516, June 2001. [11] A. Campos, G. Joos, P. D. Ziogas, and J. F. Lindsay, “Analysis and design of a series-connected PWM voltage regulator for single-phase ac sources,” IEEE Trans. Ind. Applicat., vol. 32, pp. 1285–1292, Nov./Dec. 1996.

Ming Tsung Tsai (M’99) was born in Tainan, Taiwan, R.O.C., in 1964. He received the M.S. and Ph.D. degrees in electrical engineering from National Cheng-Kung University, Tainan, Taiwan, in 1991 and 1996, respectively. He is currently an Associate Professor in the Electrical Engineering Department, Southern Taiwan University of Technology. His research interests include active power filters, battery energy storage systems, and residential photovoltaic power conditional systems.

Chia Hung Liu was born in Taoyuan, Taiwan, R.O.C., in 1977. He received the B.S. and M.S. degrees in electrical engineering from Southern Taiwan University of Technology, Tainan, Taiwan, in 2000. His research interests are in power electronics.