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Procedia Engineering
Procedia Engineering 00 (2011) 000–000 Procedia Engineering 29 (2012) 4035 – 4039 www.elsevier.com/locate/procedia
2012 International Workshop on Information and Electronics Engineering (IWIEE)
Design of CMOS Instrumentation Amplifier M.Y. Ren a *, C.X. Zhanga, D.S. Sunb a
School of Softwares, Harbin University of Science and Technology, Harbin 150080, China b Computer Center, Harbin University of Science and Technology, Harbin 150080, China
Abstract A low power CMOS instrumentation amplifier used for biomedical applications is presented in this paper. It consists of a low power operational amplifier with CMFC structure. By analysis and optimization of the parasitic effects and parameters, instrumentation amplifier has better performance in every aspect. This simulation result shows that, in the case of guaranteed bandwidth, the amplifier can suppress flicker noise interference effectively. The instrumentation amplifier designed in 0.5μm CMOS technology with 3.3V power supply shows a dynamic range of 70.1dB and 23.48ns settling time within 0.05% accuracy. The main amplifier dissipates 10.5mW power. It also includes a bias circuit that dissipates 2.2mW power.
© 2011 Published by Elsevier Ltd. Selection and/or peer-review under responsibility of Harbin University of Science and Technology Open access under CC BY-NC-ND license. Keywords: CMOS integrated circuits,instrumentation amplifier, CMFC
1. Introduction Instrumentation amplifiers are very important circuits in many sensor readout systems where there is a need to amplify small differential signals in the presence of large common-mode interference. Application examples include automotive transducers [1], industrial process control [2]–[4], linear position sensing [5], and biopotential acquisition systems [6]–[11]. In this paper, a new low power instrumentation amplifier with CMFC op-amp is proposed. The paper is organized as follows. In section II, principle of instrumentation amplifier is described. Sections III describe the architecture and the simulation of the proposed CMFC op-amp. Sections IV describe the * Mingyuan Ren. Tel.: +86-451-86397009; fax:+86-451-86397001. E-mail address:
[email protected].
1877-7058 © 2011 Published by Elsevier Ltd. Open access under CC BY-NC-ND license. doi:10.1016/j.proeng.2012.01.615
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simulation of the proposed instrumentation amplifier. Conclusions are given in sections V. 2. Principle of Instrumentation Amplifier An instrumentation amplifier is one that is used in electronic measuring instruments or in electronic systems in which the highest precision is required. A popular instrumentation amplifier is shown in Fig. 1. It can be built from three op amp integrated circuits but more often the three amplifiers are manufactured already connected on the same chip. As a ‘black box’ the instrumentation amplifier, or ‘in amp’, has the same input and output terminals as a single op amp, but its performance is superior. R= R= R7 , the signal transfer function can be simplified to When R= 4 5 6
AD=
VOU T R 2 + R3 ) = (1 + VIN + − VIN − R1
(1)
where R2 and R3 is generally set to the same value. Ideally, by simply adjusting the value of R1, the entire gain of the circuit can be adjusted to any value.
VIN+
R4
R5
OP1 R2 R3
R1
VIN- OP2
OP3 R6
VOUT
R7
Fig.1 A standard type of instrumentation amplifier comprises three op amps
To calculate the common mode gain, we assume the input common-mode voltage is VCM.
VIN + = VIN − = VCM
(2)
Therefore, no voltage drop across R1, OP1 and OP2 output voltage is equal to VCM. If we assume OP1、OP2 and OP3 is the ideal op amp, the amp's common-mode rejection ratio is
⎛A ⎞ CMRR (dB ) = 20 log ⎜ D ⎟ ⎝ AC ⎠
⎛ ⎜ Gain = 20 log ⎜ + R R R7 R5 ⎜ 5 4 − ⎜ R R6 + R7 R4 4 ⎝
⎞ ⎟ ⎟ ⎟ ⎟ ⎠
(3)
M.Y. Ren et al. / Procedia Engineering 29 (2012) 4035 – 4039 M.Y. Ren, et al. / Procedia Engineering 00 (2011) 000–000
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where amp's common-mode rejection ratio mainly is decided by matching of several resistance. The resistance of the relative accuracy can very high through the layout of symmetry techniques in CMOS process, so this structure is suitable for CMOS technology. 3. Design of the Operational Amplifier in Instrumentation Amplifier The operational amplifier plays an important role in performance of system. Because the amplification magnitude of the sensor with the electric bridge structure is quite big, good noise restriction and low offset voltage are desirable for an amplifier. In order to guarantee the linearity of system, the operational amplifier must have a gain high enough. Besides, the total power consumption of the integrated system is also needed to be considered. Three-stage operational amplifier with capacitor-multiplier frequency compensation meets all these requirements. It could effectively avoid the low DC gain and high power consumption, which are draw-backs of typical two-stage operational amplifier. The diagram of the threestage operational amplifier is shown in figure 2.
Fig.2 Three-stage operational amplifier with capacitor-multiplier frequency compensation
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Fig.3 Frequency responses of the CMFC amplifier
As shown in Fig.3, the frequency responses of the CMFC amplifier have been simulated with an input common-mode voltage of 1.65V. The dc gain, GBW, and phase margin are equal to120dB, 1.699MHz, and 64°, respectively. 4. Simulation of Instrumentation Amplifier Simulation results show that instrumentation amplifier with CMFC op-amp, operating voltage is 3.3V, supply current is 0.37mA, Bandwidth is 65kHz, differential-mode gain is 2, common-mode rejection ratio is 62dB, power supply rejection ratio is 73dB. The detailed performance of the instrumentation amplifier is summarized in Table 1. All these data suggest that CMFC structure can be used in low power instrumentation amplifier. Table 1 the performances of instrumentation amplifier Performance name
value
Bandwidth
65kHz
Common scope
0.7V~3.03V
Output swing
0.02V~3.24V
Input offset voltage
0.27mV
CMRR
62dB
PSRR
73dB
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5. Conclusion A low-voltage instrumentation amplifier with CMFC topology has been described. Simulation results shows that the circuit can achieve a 62 dB CMRR, while operating with a single 3.3 V power supply. The proposed circuit is suitable for a single-chip CMOS smart sensor. Acknowledgments This work is supported by National Natural Science Foundation of China under Grant Nos. 60903082, Chun-Hui Cooperated Project of the Ministry of Education of China under Grant Nos. S2009-1-15002, Young Science Foundation of Harbin University of Science and Technology under Grant Nos. 2011-21, Science and Technology Research Funds of Education Department in Heilongjiang Province under Grant Nos. 11541045. References [1] B. D.Miller and R. L. Sample, “Instrumentation amplifier IC designed for oxygen sensor interface requirements,” IEEE J. Solid-State Circuits, vol. 16, no. 6, pp. 677–681, Dec. 1981. [2] V. Schaffer, M. F. Snoeij, M. V. Ivanov, and D. T. Trifonov, “A 36 V programmable instrumentation amplifier with sub-20 V offset and a CMRR in excess of 120 dB at all gain settings,” IEEE J. Solid-State Circuits, vol. 44, no. 7, pp. 2036–2046, Jul. 2009. [3] J.-M. Redouté and M. Steyaert, “An instrumentation amplifier input circuit with a high immunity to EMI,” in Proc. 2008 Int. Symp. Electromagn. Compatibility—EMC Eur., Hamburg, Germany, Sep. 2008, pp. 1–6. [4] J. F. Witte, J. H. Huijsing, and K. A. A. Makinwa, “A current-feedback instrumentation amplifier with 5 V offset for bidirectional highside current-sensing,” IEEE J. Solid-State Circuits, vol. 43, no. 12, pp. 2769–2775, Dec. 2008. [5] M. Rahal and A. Demosthenous, “A synchronous chopping demodulator and implementation for high-frequency inductive position sensors,” IEEE Trans. Instrum.Meas., vol. 58, no. 10, pp. 3693–3701,Oct. 2009. [6] M. S. J. Steyaert, W. M. C. Sansen, and C. Zhongyuan, “A micropower low-noise monolithic instrumentation amplifier for medical purposes,” IEEE J. Solid-State Circuits, vol. SC-22, no. 6, pp. 1163–1168, Dec. 1987. [7] R. Martins, S. Selberherr, and F. A. Vaz, “A CMOS IC for portable EEG acquisition systems,” IEEE Trans. Instrum. Meas., vol. 47, no. 5, pp. 1191–1196, Oct. 1998. [8] C.-J. Yen, W.-Y. Chung, and M. C. Chi, “Micro-power low-offset instrumentation amplifier IC design for biomedical system applications,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 51, no. 4, pp. 691–699, Apr. 2004. [9] K. A. Ng and P. K. Chan, “A CMOS analog front-end IC for portable EEG/ECG monitoring applications,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 52, no. 11, pp. 2335–2347, Nov. 2005. [10] R. F. Yazicioglu, P. Merken, R. Puers, and C. V. Hoof, “A 60 W 60 nV Hz readout front-end for portable biopotential acquisition systems,” IEEE J. Solid-State Circuits, vol. 42, no. 5, pp. 1100–1110, May 2007. [11] C.-C. Wang, C.-C. Huang, J.-S. Liou, Y.-J. Ciou, I-Y. Huang, C.-P. Li, Y.-C. Lee, andW.-J.Wu, “A mini-invasive longterm bladder urine pressure measurement ASIC and system,” IEEE Trans. Biomed. Circuits Syst., vol. 2, no. 1, pp. 44–49, Mar. 2008.
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