Development of surface micro-machined binary logic

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Development of a surface micro-machined binary logic inverter for ultra-low frequency MEMS sensor applications

This article has been downloaded from IOPscience. Please scroll down to see the full text article. 2010 J. Micromech. Microeng. 20 105026 (http://iopscience.iop.org/0960-1317/20/10/105026) View the table of contents for this issue, or go to the journal homepage for more

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JOURNAL OF MICROMECHANICS AND MICROENGINEERING

doi:10.1088/0960-1317/20/10/105026

J. Micromech. Microeng. 20 (2010) 105026 (15pp)

Development of a surface micro-machined binary logic inverter for ultra-low frequency MEMS sensor applications S Chakraborty and T K Bhattacharyya Department of Electronics and Electrical Communication Engineering, Indian Institute of Technology, Kharagpur, India E-mail: [email protected]

Received 16 June 2010, in final form 12 August 2010 Published 29 September 2010 Online at stacks.iop.org/JMM/20/105026 Abstract This paper presents the development of surface micro-machined binary logic inverter for implementation in low-frequency signal processing applications in MEMS-based sensors. The micro-cantilever switch, which is the fundamental building block of the design, has been designed and optimized with an analytical method and validated with simulation. The working principle of the inverter has been comprehensively worked out. A thorough detail of the design and performance analysis of the inverter has been carried out and it has been verified using system level simulation. The PolyMUMPs surface micro-machining process has been used for implementing and fabricating the MEMS-based digital inverter. The mechanical response and the switching response of the beams used in the inverter have been extensively investigated. Thorough static and dynamic functional characterizations have been carried out on the inverter. (Some figures in this article are in colour only in the electronic version)

of the most crucial issues [4] because the high-temperature annealing process required for stress release in the deposited thin films may prove detrimental for the embedded CMOS circuits. Similarly the surface planarization required for the post-MEMS CMOS process and the interconnections between MEMS and circuit areas are among the most vital challenges. These non-compliances necessitate the investigation of a lowannealing temperature MEMS material like polycrystalline silicon-germanium as an alternative to polysilicon. In advanced CMOS technologies, low-permittivity dielectrics are used in metallization stack which are less tolerant to thermal stress. Although high thermal tolerant CMOS devices have been reported [3, 4], the packing density and performance of the circuits are compromised [4]. Although most of today’s MEMS applications do not essentially require highend CMOS electronics [4], the continued obsolescence of older CMOS technologies leads to the requirement of revolutionary efforts in integrating more advanced CMOS technology with the MEMS technology [4]. Again conventional CMOS passivation materials are either etched away by or are permeable to hydrofluoric acid, which is commonly used as etchant for sacrificial silicon dioxide used in MEMS; therefore,

1. Introduction Microelectromechanical systems (MEMS) have been an established technology in inertial, medical, biomedical, chemical, optical and radio frequency applications for years. It has proved to be an optimal solution in commercial as well as engineering trade-offs for miniaturized, low-cost, low-power and reliable sensor systems [1]. In every sensor system, the sensor block is usually followed by circuit components to condition and process the readout and finally digitize it for further communication. In most such cases the circuitry is implemented using CMOS technology [2, 3]. In order to reduce the number of off-chip components required for a particular sensing system, more and more CMOS-based building blocks are being integrated together with the microsensor on the same chip. Many research groups have worked on the subject of MEMS–CMOS integration over years and as a result great engineering and commercial successes in achieving such sensor system-on-chip (SSoC) have been reported [2–4]. In all such integration approaches the biggest challenge lies in the process and material compatibility. Thermal budget is one 0960-1317/10/105026+15$30.00

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J. Micromech. Microeng. 20 (2010) 105026

S Chakraborty and T K Bhattacharyya

it necessitates the use of an alternative sacrificial material [4]. Apart from that, the increased mask count for the modular integration processes reduces the process yield, and the added complexity and lower yield increase cost. Therefore inevitably, many engineering and commercial trade-offs are involved in the overall fabrication cost and device quality and it is the overall manufacturing budget that still remains the main determining factor for commercialization of integrated solutions [4]. While integration has long been a challenging issue in MEMS-based sensor applications, a parallel approach has been in the limelight to implement circuit components using MEMS technology itself. In this work, we present the detailed development of a MEMS-based digital inverter. A surface micro-machined cantilever-based digital inverter has been analysed, designed, fabricated and thoroughly characterized. This MEMS logic block can be co-fabricated with the MEMS sensor on the same wafer in the same process flow and therefore a complete MEMS sensor system on-chip can be fabricated [5] and the intricate issues of MEMS–CMOS integration can be avoided. These MEMS logic devices present low-power consumption, high isolation and negligible leakage current due to intrinsic advantages of MEMS technology over its solid state counterparts like transistors [5]. As they can perform Boolean functionalities, these MEMS logic gates can also be used for constructing a full-mechanical computer which can work in severe ranges of temperature and ionization radiation [5] where transistor-based functionalities go beyond control and reliability. Also CMOS-based circuits have a welldefined lower limit of achievable energy efficiency [6] and once this limit is reached, power constraints will put a limit on the throughput of the devices. These MEMS-based logic units provide alternative switching techniques which can take over from their transistorized counterparts [6]. Therefore in the near future MEMS-based logic circuits are likely to gain many applications and although the devices seem to require more real estate than the standard CMOS-based logic units, a thorough investigation of these MEMS logic units is unavoidable. MEMS-based logic circuits are among the very topical research subjects and different works in this field have been reported [5–14]. Hirata et al [5] had presented the development of a MEMS logic switch for controlling power supply to digital circuits. In [6], digital logic implementation has been demonstrated using a three-layer shuttle electrode and a two-layer torsional electrode. In [7], a digital inverter and NAND gate have been developed based on complementary configuration of such MEMS switches. Motorola has demonstrated implementation of different low-frequency logic operations using the MEMS switch in RTL configuration [8]. In [9] complementary nanomechanical cantilevers have been used for realizing digital inverter operation. Extensive studies of four-terminal nanoelectromechanical logic gates have been very recently reported [10–12]. Development of one-time [13] and multi-time [13, 14] programmable nonvolatile memory using an electrostatically actuated cantilever has also been demonstrated. However, a complete and extensive design methodology, performance analysis and experimental investigation have not been found in the literature

for the cantilever switch-based digital inverter. This work attempts to address these points with thorough detail. A systematic analytical design methodology has been presented and the performance evaluation has been carried out on the inverter based on the Euler–Bernoulli beam equation and the theoretical results have been verified with simulation. The device has been fabricated with standard surface micromachining technology and static and dynamic performance characterizations have been carried out. This inverter differs from the design of [6] in terms of its operating principle and actuation voltage, which is half of that presented in [6]. In [15, 16] the design approach and performance evaluation of the inverter have been presented using the PolyMUMPsPlus surface micro-machining process. In [17], the design and fabrication of a universal gate using the PolyMUMPs process have been reported. In this work we present thorough detail of the development of the inverter designed and fabricated using the PolyMUMPs process. The PolyMUMPs process has been explored over years. However, a comprehensive design methodology and functional analysis of cantilever-based inverters in the PolyMUMPs process is not in the literature. Also, in many such works related to the PolyMUMPs process, it has been observed that for electrostatically actuated microstructures in the PolyMUMPs process the experimentally observed capacitance between the two electrodes is widely different from the theoretically estimated value [18]. The substrate contribution to the capacitance being the main reason for this [18], a complete capacitance model has been presented for the inverter considering the different capacitances induced by the substrate and the total capacitance has been theoretically predicted based on this model, which shows reasonable agreement with the experimental values. Apart from that, the reported surface roughness parameters of the PolyMUMPs process have been extensively utilized in this work for determining the effects of different contact stiction forces on the switching characteristics of the inverter. In the next section the general operating principle of the inverter is presented. The detailed analytical design approach and its validation with the help of simulation are furnished in section 3. A thorough analytical performance estimation of the device is presented in section 4. The fabrication details and the complete characterization results are discussed in the subsequent sections.

2. Operating principle The proposed microelectromechanical logic gate inverter works on the principle of electrostatic actuation of cantilever beams. Figure 1 shows a cantilever beam with a pull-down electrode. The beam can be actuated or pulled down by applying voltage at the pull-down electrode. If a voltage difference V exists between the beam and the bottom electrode the electrostatic force of attraction per unit length that acts on the cantilever is governed by [15–17] Fe = 2

1 ε0 bV 2 , 2 (y0 − y)2

(1)

J. Micromech. Microeng. 20 (2010) 105026

S Chakraborty and T K Bhattacharyya

Figure 1. Schematic of the beam used as the switch in the inverter. It has a suspended cantilever and an actuation pad underneath. A small output pad is placed underneath the beam just at the free end. A dimple has been created underneath the beam at the free end. Table 1. Truth table for the cantilever beam. Voltage at the beam

Voltage at the electrode

Voltage between the beam and the electrode

Output condition

0 0 VON VON

0 VON 0 VON

0 VON VON 0

High impedance 0 VON High impedance

Figure 2. Schematic diagram of the MEMS inverter. The switches have been connected in complementary configuration for active pull-up and active pull-down.

where y0 is the initial distance between the beam and the electrode, y is the steady deflection of the beam due to the applied potential V, ε0 is the permittivity of free space, b is the width of the beam and the electrode. Due to this force the beam bends towards the bottom electrode and the deflection of the beam at any point, y, is a function of the distance from the clamped end, x. If an output pad is made towards the free end of the beam between x = a and x = L and the beam is allowed to touch the output pad by electrostatic actuation with certain voltage, the electrical contact between the beam and the output terminal can be achieved and this principle has been utilized in the design of the switches for the logic inverter. If VON is the required voltage for the cantilever to make contact, table 1 gives the truth table satisfied by the beam. The first two rows of the table reproduce the conditions of the nMOS transistor and the lower half of the table simulates the condition of the pMOS transistor. Therefore, similar to the CMOS circuit, two beams can be combined together as shown in figure 2 to work as a digital logic inverter. When the input i/p is at 0, the cantilever beam up is actuated because there is a voltage difference of VON between the beam and the electrode and it connects to the output o/p. But the beam down is not actuated and the switch stays at a high impedance state. Therefore the output voltage is pulled up to VON . When the input is at VON , the beam up is free and at the high impedance state whereas the beam down is actuated and therefore the output o/p is pulled down to 0. Thus the truth table satisfied by the MEMS circuit is as shown in table 2. It shows that the circuit acts as a logic inverter [15–17].

Table 2. Truth table of the MEMS inverter. Input i/p

Output o/p

0 VON

VON 0

PolyMUMPs surface micromachining process [20]. The PolyMUMPs process has been reproduced in the process editor of CoventorWare. The beams are constructed with doped polysilicon. Since the thicknesses of the different polysilicon layers are pre-defined by the process [20], the proper choice of the polysilicon layers and their length and width are the three basic parameters for optimizing the design. In order to start with a specification, an ON voltage VON = 5 V is assumed, which is compatible with transistor–transistor logic (TTL) in digital electronics [21]. Since in the PolyMUMPs process it is possible to create a 0.75 μm thick dimple in the Poly1 layer [20], this layer is chosen for creating the beams and accordingly the bottom electrode is created in the Poly0 layer. The dimple is required for achieving the electrical contact with the output pad. It is also very much an essential component in the releasing stage of the long cantilever fabrication process using surface micro-machining technology. The initial design parameters for the cantilevers are briefed in table 3. The primary design of the beams has been carried out analytically using the Euler–Bernoulli equation. The static solution of the equation is used for determining the length of the beams and the dynamic response for the beam width. The design is followed by validation using simulation in Saber Architect in the CoventorWare platform [19].

3. Design and simulation The micro-machined cantilevers for the inverter have been designed in the Coventorware platform [19] using the 3

J. Micromech. Microeng. 20 (2010) 105026

S Chakraborty and T K Bhattacharyya

Table 3. Initial design parameters for the cantilevers. Polysilicon layer for the beam Thickness of the layer and the beam, h Initial distance between the beam and the bottom electrode, y0 Displacement of the beam end limited by the dimple Density of the beam material, ρ Young’s modulus of the beam material, E Poisson’s ratio, υ ON voltage chosen, VON a b

Poly1 2 μma 2 μma 1.25 μma 2330 kg m−3a 160 GPaa 0.22a 5 Vb

Process defined. Assumed as specification.

3.1. Beam length determination The equation of motion of the beam under the force expressed in (1) is given by the Euler–Bernoulli equation

Figure 3. Variation of beam end deflection with beam length for the input voltage 5 V. It shows that for a deflection of 1.25 μm the required beam length is 400 μm.

∂ 4y ∂y ∂ 2y EI 4 + K (2) + ρA 2 = Fe , ∂x ∂t ∂t where E is Young’s modulus of the material of the beam, K is the damping coefficient taking into account all the damping mechanisms that affect the dynamics of the beam, y(x, t) is the deflection of the beam at time instant t at a distance x from the clamped end, A is the cross-sectional area of the beam given by A = bh,

This integro-differential equation has been solved using numerical integration technique [25]. In this approach the beam length is divided into 1000 equal intervals. The beam is assumed to be unactuated and straight to start the iteration with and the integral in the right-hand side of (8) is obtained by the trapezoidal integration technique. The summation has been assigned to the left-hand side, and using the first-order approximation of the Taylor series expansion, the first-order derivative of yx and then yx itself have been obtained. The boundary conditions on yx and the first-order derivative of yx at the clamped end of the beam have been utilized from (6) to initiate the results. This process has been performed for all the space intervals in the beam and has been repeated with the refreshed values of yx at all the intervals until the results converge to a stable value. The iterations have been performed in Matlab for different values of the beam length L with V = VON = 5 V. Figure 3 shows the obtained beam end deflection as a function of the beam length. Since the beam deflection is limited by the dimple to 1.25 μm, from figure 3 we find that the required beam length for achieving switch-on condition at 5 V is about 400 μm [17] and exactly 400 μm length shows a pull-in voltage of 4.85 V. This length is well within the maximum allowable limit of dimensions feasible in the PolyMUMPs process [27]. It is notable that since moment of inertia I is a linear function of the width b the solution of (7) is independent of the beam width and the length can be found without prior information about the beam width.

(3)

where h is the thickness of the beam, and I is the area moment of inertia of the beam given by bh3 . (4) 12 Since in digital application, the input signal is either at state ‘0’ or at state ‘1’, the steady state deflection of the beam is given by the solution, which is independent of time. Thus the steady deflection of the beam can be written as I=

d4 yx = Fe , (5) dx 4 where yx = y(x, ∞). The boundary conditions satisfied by the beam are as follows [22–24]:  dyx  yx |x=0 = 0; = 0; dx x=0   (6) d3 yx  d2 yx  = 0; = 0. dx 2 x=L dx 3 x=L EI

Equation (5) can be integrated and boundary conditions in (6) can be utilized to get  L ε0 bV 2 1 d3 yx dx  . (7) EI 3 = −  )]2 dx 2 [y − y (x 0 x x

3.2. Beam width determination

Equation (7) can once again be integrated using the Leibniz integration rule [25] and the boundary conditions in (6) to find the integro-differential form of the Euler–Bernoulli equation [26] as  L ε0 bV 2 1 d2 yx (x  − x) dx  . (8) EI 2 =  2 dx x 2 [y0 − yx (x )]

The beam width has its most significant effect on controlling the damping or quality factor of the cantilever while in motion. For surface micro-machined cantilevers vibrating outof-plane, the dominant source of damping is the squeezed film damping [28]. The quality factor associated with the squeezed 4

J. Micromech. Microeng. 20 (2010) 105026

S Chakraborty and T K Bhattacharyya

film damping for vibration of the cantilever in its fundamental mode is given by [28, 29] ρy03 hfn , (9) μb2 where μ is the dynamic viscosity of air and fn is the natural frequency of the beam. The quality factor is related to the damping ratio γ as [22] Q = 2π

Q=



1

2γ (1 − γ 2 )

.

(10)

Figure 4. Lumped representation of the beam in Saber Architect. One end is clamped and the free end is connected to a mechanical bus connector to detect the deflection.

The natural frequency fn can be found by solving the Euler–Bernoulli equation (2) in its homogeneous form using the separation of variables technique and boundary conditions (6) [22, 24] as   1/4  1/4  ρAfn2 ρAfn2 cos 2π L cosh 2π L + 1 = 0. EI EI (11) This can be solved to find the natural frequency as [30]  4  12   h E kn , (12) 2πfn = 2 12 L ρ where kn can be numerically obtained [30] to be 1.875. For the cantilever of length 400 μm and thickness 2 μm, the frequency of the fundamental mode of vibration can be obtained to be 16.5 kHz. Now when the input changes from state ‘0’ to state ‘1’ or vice versa the associated input step voltage excites modes in the structure, the amplitude of vibration of the fundamental mode being the strongest. In the worst case, if the repetition frequency of the input signal stream matches the natural frequency of the beam given by (11), the vibration in the fundamental mode becomes significant unless the beam is heavily damped. An overdamped response is on the other hand detrimental in terms of response time to changing input of the beam. Therefore the optimized beam design is the one that is critically damped. For critically damped √ forced vibration, the damping ratio can be written as γ = 1/ 2. Therefore from (10) and (9) the width can be determined for critically damped beams as ρy 3 hfn 2π 0 2 = 1. (13) μb

Figure 5. Vibration spectrum of the beam. It shows that the fundamental frequency of the beam is 17.1 kHz.

Small signal ac analysis has been performed on the beam to find its natural frequency and the fundamental frequency is obtained at 17.1 kHz, which validates the theoretical estimation to a reasonable extent. Figure 5 shows the vibration spectrum of the cantilever. Pull-in analysis has been performed on the beam to find the pull-in voltage and it has been found to take place at 5.15 V, which is very close to the assumed 5 V value. The corresponding beam end deflection for pull-in is nearly 800 nm. Figure 6 shows the pull-in curve obtained from Saber Architect simulation. Therefore the analytical design values are retained for the beams in the inverter and the final dimensions of the beams are furnished in table 4. The size of the dimple is chosen to be 2 μm × 2 μm, which is the minimum dimension supported by the PolyMUMPs process [20]. This is to ensure that the overlap area between the beam and the output pad is so small that the voltage at the output pad cannot produce sufficient torque to deflect the beam and also provide the minimum area of contact for stiction forces when the beam end touches the output pad.

With μ = 1.81 × 10−5 Pa s under normal conditions [29] the width can be found to be 14 μm. 3.3. Design validation using simulation After the dimensions of the beams are obtained from the analytical design approach, the design has been verified using Saber Architect simulation in CoventorWare platform [19]. The PolyMUMPs process has been incorporated in the Process Editor of CoventorWare from the existing foundry process and the beam has been designed with length 400 μm and width 14 μm in the Poly1 layer using the lumped Beam Electrode module [19] in Saber schematic. Figure 4 shows the Saber schematic representation of the cantilever.

4. Theoretical performance evaluation 4.1. Static performance estimation In order to estimate the static voltage transfer characteristics (VTC) of the inverter the deflection profile of the beam under electrostatic actuation is determined. Equation (8) has again 5

J. Micromech. Microeng. 20 (2010) 105026

S Chakraborty and T K Bhattacharyya

The pull-out voltage is different from the pull-in voltage because the beam is allowed to deflect more than the pull-in limit and its effective spring constant becomes negative [22]. However, it is imperative to mention that in the electrostatic model the only acting force on the beam is assumed to be the Coulombic electrostatic force. In the case of microstructure dynamics there are short-range stiction forces, namely, van der Waals force [31] and Casimir force [32] affecting the dynamics when two surfaces come very close to each other. An expression for the van der Waals force per unit area based on the Lennard-Jones potential model is given by [31]   AH 1 ε6 , (14) − FVdW (d) = 6π d 3 d9 where d is the gap between the beam and the dimple tip, AH is called the Hamaker constant and ε is the interatomic equilibrium distance. The typical value of AH lies between 10−20 and 10−19 J [33]. The Casimir force per unit area is written as [32]

Figure 6. Simulated pull-in curve from Saber. It shows that pull-in takes place at 5.15 V and at a beam end deflection of 800 nm.

h ¯ cπ 2 , (15) 240d 4 where η  1 is a constant that is unity for a perfectly conducting beam, h ¯ is the reduced Planck’s constant, c is the speed of light. The stiction forces are ignorable at micro-scale distances but are dominant at nano-scale ranges when the beam end comes in contact or in very close proximity with the bottom electrode or the output pad. Consequently, these forces have negligible effect on the pull-in voltage because pull-in takes place in the beam when the gap between the dimple tip and the output pad is nearly 450 nm, but they have strong effects on the pull-out voltage. For example, for a 2 μm thick highly conducting beam the effect of Casimir force for a gap of 400 nm is merely equal to the weight of the beam (which for the present beam is negligible); for 100 nm gap it is equivalent to an actuation voltage of 200 mV [32] and increases sharply with a further decrease in gap. Since the cantilever is allowed to touch the output pad only through the small dimple area Ad at the free end, these two forces act as end loading to the deflected cantilever. Considering the effects of the stiction forces on the static deflection profile of the cantilever after pull-in, (8) can be modified using (14) and (15) as  L ε0 bV 2 1 d2 yx (x  − x) dx  EI 2 =  )]2 dx 2 [y − y (x 0 x x   

h ¯ cπ 2 AH 1 ε6 Ad (L − x). + − 9 +η (16) 6π d 3 d 240d 4 When the beam is in contact with the output pad, due to surface roughness there are very small gaps distributed all over the contact area and the attractive stiction forces play a strong role there. The surface roughness is usually taken care of by assuming the Gaussian probabilistic distribution of local height of the surface [31]. From all the available PolyMUMPs run data [20] (run 5 to run 83) the root mean squared standard deviation of the height distribution of the Poly0 and Poly1 layers can be calculated to be 10.9 nm and 30.1 nm respectively. Therefore the root mean squared effective distance [31] between the Poly1 layer and the Poly0 FCas (d) = η

Figure 7. Deflection of the end of the beam with applied voltage. It shows pull-in and pull-out taking place at 4.85 V and 4.35 V respectively. The projected pull-out profile is an intuitively predicted curve taking into account different stiction forces when the beam tries to pull out. Table 4. Final dimensions of the cantilevers. Length of beam, L Thickness of the beam, h Width of the beam, b Initial distance between the beam and the bottom electrode, y0 Displacement of the beam end limited by the dimple Size of the dimple, Ad

400 μm 2 μm 14 μm 2 μm 1.25 μm 2 μm × 2 μm

been solved numerically for voltage V changing from 0 to 5 V and back and L = 400 μm and the deflection of the beam end is plotted. Figure 7 shows the deflection profile obtained from the solution. It shows that, as mentioned before, pull-in takes place when the beam is deflected to nearly 800 nm at a voltage of 4.85 V. When the voltage is reduced pull-out occurs at around 4.35 V. 6

J. Micromech. Microeng. 20 (2010) 105026

S Chakraborty and T K Bhattacharyya

Figure 9. Analytically predicted VTC of the inverter. The blue continuous curve shows the VTC based on simple electrostatic profile without considering the capacitive load. The dashed line presents the projected VTC based on electrostatic as well as stiction forces and considering capacitive load.

Figure 8. Analytically predicted pull-out voltage as a function of the gap between the dimple and the output pad. It shows that as the gap is below 25 nm the beam may not release once it has been pulled in. As the gap increases the pull-out voltage tends towards the electrostatically obtained 4.35 V.

beam down. If no capacitive load is assumed at the output, the output voltage is derived by the capacitive division of the supply voltage VON between the capacitances between the beams and the respective output pads. In figure 9 the estimated VTC based on the deflection profile of the cantilevers under only electrostatic force has been presented without assuming capacitive load. When the electrostatic as well as the stiction forces are considered and a large capacitive load is assumed at the output, the VTC is as shown with the dashed lines in figure 9. The projected VTC shows that the inversion takes place when the beams actually pull in. Pull-out does not have any effect on the nature of the VTC. This is because when one beam pulls out the charges are retained in the load capacitance and therefore the voltage does not change. It is also observed from the projected VTC that as in no condition are both the beams in the on state; there is no static current through the inverter unlike the case of the standard CMOS inverter [34]. It is also evident that the inverter has high noise immunity [34]. When the input is low, to reverse the inverter state the required amplitude for a noise spike is 4.85 V. Similarly when the input is high at 5 V, it requires a 4.85 V dip at the input for output to change its state.

layer when the beam comes in contact with the output pad is d = 32 nm. For a 32 nm gap and contact area of Ad = 2 μm × 2 μm between the beam and the output pad provided by the dimple, the Casimir force and the van der Waals force can be calculated as 49.0 nN and 6.4 nN from (15) and (14) respectively. Therefore the total end loading on the deflected cantilever is 55.4 nN. With this value of total stiction force (16) has been solved for finding the pull-out voltage in a method similar to the case of (8). Here the initial beam shape is taken as the beam shape beyond pull-in obtained from the solution of (8). The pull-out voltage has been obtained as 3.05 V, 1.3 V less than the electrostatically predicted pull-out voltage. However this value is estimated from a statistically chosen contact distance 32 nm. This effective gap is a random variable that varies widely from run to run [20] and therefore the pull-out voltage can be any value between 0 and 4.35 V, the electrostatic limit of the pull-out voltage obtained by solving (8). In figure 8 the variation of the pull-out voltage with the contact gap d has been plotted for the beam in the inverter and it shows that pull-out voltage can vary from 0 to 4.35 V. As the gap between the dimple and the output pad is below 25 nm, i.e. the surfaces are extremely smooth, the pull-out voltage is non-real leading to the inference that the beam may not release from contact once it is pulled in. As the gap increases due to roughness of the contact surfaces the pull-out voltage tends towards 4.35 V, the electrostatically obtained value from (8). As the effective gap is uncertain, the pull-out voltage is indeterministic and hence it has been shown as a projected dotted profile in figure 7.

5. Fabrication The MEMS-based inverter has been designed and fabricated using the PolyMUMPs surface micro-machining process. The final mask-layout for fabrication of the structures has been designed in the L-Edit Tanner tool. All electrical connections have been taken using the 0.5 μm thick Poly0 polysilicon layer. A 2.0 μm thick sacrificial oxide layer, Oxide1, has been utilized to create the air gap for electrostatic actuation. The actuation pad and output pad have been realized in the Poly0 layer. The beams are realized in a 2.0 μm thick Poly1

4.2. Voltage transfer characteristics of the inverter The static VTC of the inverter can be drawn based on the theoretically estimated deflection profile of the beam up and 7

J. Micromech. Microeng. 20 (2010) 105026

S Chakraborty and T K Bhattacharyya

Figure 10. SEM image of the inverter. It shows the different pads and the two beams in the inverter.

(a)

(b)

(c)

Figure 11. (a) SEM image of the common output section of the inverter. (b) A close-up SEM micrograph of the free end of the beam with dimple. (c) A close-up SEM micrograph of the anchor section of the beam.

polysilicon layer. Standard pads of dimensions 100 μm × 100 μm have been imported from the PolyMUMPs standard library. The dimple of height 0.75 μm has been incorporated underneath the beams at their free end in order to reduce the beam end deflection to 1.25 μm. The Anchor1 etch step has been utilized in order to fix one end of the beams to the base. In order to reduce while-release stiction, additional dimples at a regular distance of 100 μm have been included underneath the beam. In order to reduce the torque generated on the beam by the electrical path connecting the bottom electrode to the pad, the electrical connections to the electrode have been spaced as closely to the anchors as possible. Thirty samples of the inverter have been fabricated. The size of each die is 1 cm × 1 cm and it consists of several other devices along with the inverter. All the structures have been realized on top of the 0.6 μm thick silicon nitride (Si3 N4 ) layer over the 675 μm thick (1 0 0) n-type silicon wafer. The low-pressure chemical vapour deposition (LPCVD) technique has been used to deposit the sacrificial oxides and the polysilicon layers. Reactive ion etching (RIE) has been utilized in order to create the anchors and the dimple. In order to release the structure, 49% hydrofluoric acid (HF) solution has been used to etch away sacrificial oxides. In order to increase the possibility of release and reduce while-release stiction, an additional critical point drying (CPD) technique has been incorporated in the release steps. All these steps are standardized in the PolyMUMPs process [20]. Figure 10 shows the scanning electron micrograph of the fabricated inverter. In figures 11(a)–(c) highly magnified SEM images of the same have been presented to clearly demonstrate different sections of the inverter.

Junction box

Scanning head

Laser Source

Vibrometer controller

CPU

Optical microscope

Figure 12. Photograph of the LDV. Courtesy: CranesSci MEMS Lab, Indian Institute of Science. Available at http://www.mecheng.iisc.ernet.in/∼pratap/MEMS%20Lab.html.

6. Characterization and results Thorough mechanical and electrical characterizations have been performed on the inverter. The device has been taken under a laser Doppler vibrometer (LDV) for mechanical response characterization. The switching characteristics of the beams and the inverter have been found from LCR meter measurements and by the static transfer characteristic experiment. Finally, dynamic functional characterization of the inverter has been performed with a low-frequency square wave input. 6.1. Mechanical response characterization The inverter has been thoroughly characterized for mechanical response using a LDV shown in figure 12. A wafer prober has been utilized to provide electrical connection to the beam and 8

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Figure 13. Snapshot of the fundamental mode of vibration of the beam in the inverter. It clearly shows that the beam end freely moves in the out-of-plane direction. The resonance frequency is around 10.0 kHz.

Figure 14. Vibration spectrum of the beam in the inverter. It shows a resonance peak at 10.0 kHz.

Therefore from (9) we find that quality factor Q = 1.15 instead of 1 and the corresponding damping √ ratio can be found from (10) as γ = 0.497 instead of 1/ 2. Therefore the resonance frequency under forced vibration is [22]  fr = fn (1 − 2γ 2 ) = 11.3 kHz,

the electrode and sinusoidal voltage of frequency sweeping from 0 to 1 MHz has been applied at the bottom electrode to excite out-of-plane vibration modes in the beams. The amplitude of the ac signal is set to 100 mV, much smaller than the pull-in voltage of the beams in the inverter. A brief description of the set-up and its operating principle have been presented in [35]. It is a Polytec made LDV with MSA 400 Micro-motion Analyser, OFV 511 Laser Interferometer, an optical microscope with a CCD camera and OFV 3001 Vibrometer Controller [35, 36]. In figure 13 the shape of the fundamental mode of vibration of one of the beams as obtained from the LDV measurement is shown. It shows that the beam is properly released and is free at the end. The vibration spectrum of the beam is shown in figure 14. The beam shows resonance at 10.0 kHz although it was initially designed for critically damped dynamic response in which no resonance is expected. One legitimate reason for this can be drawn from rarefaction of the surrounding air medium [40]. The Knudsen number Kn for the airflow within the small actuation gap can be defined as [35] λ (17) Kn = , y0

which is very close to the experimentally obtained value keeping in mind that there are always process related uncertainties and tolerances in achieving the desired dimensions and performance of the microstructures. 6.2. Electrical characterization Electrical isolation between the free end of the beam switches and the output pad has been checked using an Agilent 4284A LCR meter with probe station [37]. Figure 15 shows the photograph of the set-up used for characterizing the switch. It contains a display unit and the probe station along with the LCR meter. The computer-based control unit is not shown in the figure. Two probes have been utilized to produce an electrical contact between the pads connected to the beam and the output terminal. A 1 MHz ac signal of amplitude 5 mV has been superimposed on a sweeping dc voltage applied on the output pad in order to measure the series impedance between the two probes. Initial open-circuit and short-circuit probe-tests have been performed for removing or deembedding the effects of the probes on the measurements [37]. It has been found that the series resistance and the capacitance between the beam and the output pad are around 530 and 1.2 pF respectively and they do not change with the sweep of voltage. The invariance of the capacitance with the voltage applied at the output pad

where λ is the mean free path of molecules in air. At ambient conditions λ has a value 64 nm [35]. Therefore the Knudsen number for the beams can be found to be Kn = 0.0325. Based on the value of Kn , the flow can be considered as rarefied [35]. Under this condition, the dynamic viscosity of air can be modified from the value μ = 1.81 ×10−5 Pa s to [35] μ

= 1.57 × 10−5 Pa s. μeff = 1 + 9.638Kn1.159 9

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Table 5. Different capacitances between the beam and the output pad in the inverter. Notation as given in figure 16

Figure 15. Photograph of the Agilent 4284A LCR meter with probe station. The probe station, display unit, LCR meter and the probes are marked. The interfacing computer is not shown in the figure.

asserts that the voltage at the output pad does not produce sufficient moment to bend the beams due to the small overlap area of the dimple with the output pad. This in turn validates the assumption made in designing the structures. In order to verify the value of series resistance between the probes, the beam resistance has been calculated from the latest available PolyMUMPs run-data (run 83) [20] and it is 340 . Noting that the resistivity of the Poly1 layer varies from run to run and additional resistances add up to the measured resistance from the connecting path, anchor, etc, the measured resistance is in reasonable compliance with estimation. In order to calculate the capacitance between the probes at the beam and the output terminal of the inverter, a simple capacitor model has been developed for the inverter. In the PolyMUMPs process, the top of the wafer is first heavily doped with phosphorus in order to reduce charge feed-through into the wafer, and then silicon nitride of 600 nm thickness is deposited [20]. Therefore this phosphorus layer acts as a conducting layer underneath the dielectric silicon nitride layer. Thus the complete capacitance model of the inverter

Description

Dielectric material

Capacitance calculated from total overlap area

Cbn+

Capacitance between the beam and the phosphorus layer

Silicon nitride (600 nm)

1.76 pF

Can+

Capacitance between the actuation pad and the phosphorus layer

Silicon nitride (600 nm)

1.95 pF

Con+

Capacitance between the output pad and the phosphorus layer

Silicon nitride (600 nm)

1.9 pF

Cba

Capacitance between the beam and the actuation pad

Air (2 μm)

24 fF

Cbo

Capacitance between the beam and the output pad

Air (2 μm)

150 aF

The total overlap areas between different sections have been thoroughly calculated from the designed layout and hence the capacitance values have been obtained.

looking between the beam and the output pad is as shown in figure 16. The different capacitors have been explained in table 5. In this model the series resistance and the effects of parasitic capacitances have been ignored for simplicity. The overlap area between different regions contributing to the capacitance has been evaluated from the actual layout of the inverter and subsequently the different capacitances have been calculated. The total equivalent capacitance between the two probes has been calculated from these capacitors and it has been obtained to be 890 fF. Noting that we have ignored the resistance of the beam, anchor, connecting paths, etc, and

Figure 16. Complete capacitance model of the inverter. Here the series resistance has been ignored. The dark lines represent the schematic of the beams and the thin lines represent the electrical path. 10

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Bond wire

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Die

Figure 17. Image of the PCB with the MEMS die glued on it (left) and the PCB under the in-house electrical test (right).

Figure 19. VTC of the single beam used in the inverter. It shows pull-in at around 5.4 V and the switch closes when the voltage is increased. When the input voltage is decreased pull-out takes place at around 800 mV.

figure 19. It shows that the switch turns on at around 5.4 V input voltage, which complies very well with the estimated 5 V pull-in voltage considering the facts that in the analytical design approach the parasitc capacitances and initial nonuniformity of shape, if any, due to residual stress, etc, have not been considered. When the input voltage is reduced from around 6 V, figure 19 shows that pull-out takes place at around 800 mV, which, as predicted, is much less than the electrostatically estimated pull-out voltage. As this pull-out voltage is fitted in the pull-out voltage versus the gap plot in figure 8, the mean gap between the dimple and the output pad is obtained to be 26 nm when the switch is closed. It is therefore observed that when the switch is turned on, the beam shows low contact resistance at the dimple–output pad contact. The contact is made of multiple contact spots. The contact resistance associated with each spot is given by [39] 

4ρe λp 1 + 0.83(λp /a) ρe Rc = , (18) + 3π a 2 1 + 1.33(λp /a) 2a

Figure 18. Inverter with bond-wire connected to its pads. A wedge bond has been used on the pads while a bonding ball has been formed on the pad on the PCB (not shown here).

parasitic capacitances in this calculation, this result conforms with the experimental results to a justifiable extent. These results validate the open switch characteristics satisfactorily. 6.3. In-house electrical functionality testing In order to characterize the devices for their inverter functionality a general-purpose printed circuit board (PCB) has been fabricated. The PCB contains a place where the entire 1 cm × 1 cm die has been glued on the PCB. Figure 17 shows the image of the fabricated PCB with the MEMS die stuck on it. The connections to the PCB metal connections from the inverter have been taken using a wire bonder. A Hybond model 626 wire bonder [38] with a 25 μm diameter gold wire have been used. Ball and wedge bonding has been used for bonding the gold wire to the pads on the PCB and the pads on the die respectively. In figure 18 a close-in optical view of the wire bonded inverter has been shown.

where ρ e is the electrical resistivity, λp is the mean free path of electron and a is the radius of a single spot for contact. Typically, this expression gives results accurate to about 1%. Since a is indeterministic, a statistical account of the contact spot is given by fractal modeling of the contact surface and it can be shown that for smooth surfaces the largest contact spot area is nearly equal to the total contact area [40]. Since smaller contact areas produce larger contact resistance parallel to the largest contact area, the effects of the smaller contacts can be ignored [40]. A similar analysis has been presented in [40] and [41]. It has been reported that for gold–gold contact of dimple size 10 μm2 and contact roughness 20 nm the contact resistance is only 1.5 with resistivity ρ e = 3.6 × 10−6 m and mean free path λp = 38 nm. For the Poly1 layer in the PolyMUMPs process the resistivity of doped polysilicon is 2 × 10−5 m [20], the Dimple cross-section is 4 μm2

6.3.1. Single switch static transfer characterization. In order to verify the switching characteristics of the individual switches in the inverter, a sweeping dc voltage has been applied to the beam and the bottom electrode has been grounded. A standard digital multimeter has been connected to the output pad and the voltage at the beam is increased in small steps. The experiment has been conducted very slowly so that the sweep of the voltage takes place quasi-statically and the beam gets enough time to settle once the voltage changes. The VTC of the switch as obtained from the experiment is shown in 11

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and the experimentally estimated contact roughness is around 26 nm. Therefore it is obvious that for the dimple–output pad contact resistance is not more than one or two orders of magnitude higher than the reported contact resistance in [40]. As this contact resistance adds in series with the resistance of the beam 530 measured in section 6.2, the total resistance between the power supply or ground point and the output pad is only around 1 k , not too large to restrict electrical signals. A meticulous observation of the results displayed in figure 19 reveals that when the beam turns on a stable condition is attained where the output voltage is around 2.5 V when the input is at 5.2 V. Also when the beam is in on condition, there is a potential difference of nearly 0.6 V between the beam and the output pad although they are supposed to be at the same potential level. For a cantilever switch this appears to be uncharcteristic as it can be either on or off without any intermediate steady state. One rational explanation for this could be the growth of native oxide on the polysilicon electrode and output pad. As the growth of native oxide is unavoidable under ambient conditions, the bottom electrode and the output pad are likely to develop such native oxide and as a result when the cantilever switch turns on the oxide creates a dielectric gap between the beam and the output pad. Conduction mechanisms through such a thin oxide layer have been studied over years [42, 43]. When the beam touches the output pad the thin oxide layer creates a potential barrier and current can pass through the barrier by Frenkel–Pool conduction or Fowler–Nordheim tunnelling [42]. As the experiment is conducted very slowly there is a time stressed breakdown of the oxide layer [44] suddenly creating the highly conducting contact between the beam and the output pad. The nearly constant 0.6 V difference between the beam and the output appears to be the breakdown voltage of the oxide layer. It is essential to mention that in the design of the beams, the size of the dimple was made as small as achievable in the PolyMUMPs process. This reduction in the contact area may lead to arcing or discharge [45] due to a large current density at the small contact area. However, in the experiemnts we did not find any visible sign of such undesirable phenomenon under microscopic observation during the tests. For discharge or arcing to take place the air gap requires to break down, which can happen if two criteria are satisfied: there must be a suitably placed initiatory electron, and a mechanism of ionization must occur to produce amplification of ions or electrons [45]. In the cantilevers the air gap between the dimple tip and the bottom pad is only 1.25 μm and as the evaluated Knudsen number suggests, there is insufficient number of electrons in the small air gap to produce the avalanche for arcing to take place. Paschen’s curves also suggest that at such micrometric air gaps the breakdown voltage is too high for discharge to take place.

Figure 20. VTC of the inverter. It shows inversion from state ‘1’ to state ‘0’ at around 5.4 V input and from state ‘0’ to state ‘1’ at around 0.6 V.

6.0 V and then slowly decreased to 0. Figure 20 shows the experimentally obtained VTC of the inverter. It is observed that the output voltage is around 0.6 V for a output state ‘0’ and around 5.4 V in the case of a output state ‘1’. The state ‘0’ corresponds to the same 0.6 V drop across the switch down when it is on and the 5.4 V output at state ‘1’ corresponds to the 0.6 V drop across the switch up in its on state. It also shows that when the output is at state ‘1’ it requried nearly 5.4 V for an input to change the output to ‘0’ and when the output is at state ‘0’ it requires the input to fall below 0.6 V from around 6 V for the swing. Therefore the device provides high noise immunity due to its intrinsic hysteresis property. 6.3.3. Dynamic testing of the inverter. The device has been tested with very low-frequency square wave input for evaluating its dynamic functionality as inverter. A 10 Hz square wave with amplitude 6 V has been applied to the input keeping the power supply to 6 V and the other beam at ground. The output signal is detected using a standard digital phosphor oscilloscope. Figure 21 shows the different stages of the captured output signal. As the power supply is turned on, the initial shape of the output waveform shows an initial tri-state nature. For some duration within one complete input cycle the beam up is on while the beam down is off and vice versa, on par with the estimated inverter functionality; but for some duration within the cycle, both the beams are either turned on or turned off due to sluggish mechanical response of the beams. A 2.4 V output is obtained from the potential division of the 6.0 V power supply between the two identical beams during this non-ideal response duration. After a few such initial responses the inverter shows perfect inversion property as shown in figure 21(b). The output is an exact inversion of the input signal and the output level is limited to around 0.6 V and 5.4 V, as predicted and discussed in the previous sub-section. After nearly 100 s the inverter has shown failure by not responding to the input and staying at nearly 2.7 V as shown in figure 21(c). This region of the time response shows that both the beams have succumbed to stiction-induced failure

6.3.2. Static voltage transfer characteristics of the inverter. From the transfer characteristics of the switch it is evident that switching takes place at a voltage around VON = 5.4 V. Therefore the power supply to the inverter is kept at 6.0 V for ensured operation and the input is slowly increased from 0 to 12

J. Micromech. Microeng. 20 (2010) 105026

(a)

S Chakraborty and T K Bhattacharyya

(b)

(c)

Figure 21. (a) Input and output waveforms of the MEMS inverter immediately after start with 10 Hz square wave input. It shows the tri-state output. (b) Input–output waveforms of the MEMS inverter after 50 s from start. It shows the perfect inverter output. (c) Input–output waveforms of the MEMS inverter after 100 s from the start. It shows in-use stiction-induced failure of the device

and as a result the output is nearly half of the power supply due to potential division between the two beams. From the results it can be inferred that the device designed, analysed and implemented in this work can work as an inverter at low frequency. The response of the inverter is within a reasonable tolerance limit of the estimated response. It is essential to mention here that although the beams may not have the ideal response time to the digital input, this cannot lead to damage of the device due to probable power supply to ground shorting. When the differential voltage across of the beam changes from state ‘0’ to state ‘1’, the beam responds to it depending on its stiffness and ambient damping. Since it is nearly critically damped, the beam takes significant time to turn on. On the other hand, when the input changes from state ‘1’ to state ‘0’, the beam is already bent and in high energy state and as soon as the input force zeroes down, the beam immediately detaches from the output pad. Therefore it is likely to expect that, when the inverter is functioning, each of the two switches in the inverter ‘breaks’ before the other switch ‘makes’ and as a result, under no conditions, are they both under switched-on condition which could result in subsequent shorting of the power supply to ground. However, it has been found that the inverter stopped working after nearly 1000 cycles of square wave input. When the tests were repeated after 2 days the device once again showed short-term response with results complying with the previously measured values. There was a 0.3 V increase in the pull-in voltage of one of the switches and accordingly the input–output waveforms have also shown corresponding changes. The response was again stable for a few seconds before succumbing to stiction once again.

The device has been fabricated using the PolyMUMPs fabrication process. A behavioral characterization of the device has been performed. It has been found that the inverter shows satisfactory results in terms of its static response as well as short-term dynamic functionality. The static characteristic curves of the individual switch as well as that of the inverter have been experimentally obtained and the results comply with the theoretical predictions to a reasonable extent. The dynamic characteristics of the inverter have also been experimentally observed and reported. The results suggest that the structure can indubitably be used as a micromechanical inverter. However there are a few aspects where more care can be taken for a better performing device. The first is definitely the stiction related issues. It has been explained from the study of pull-out voltage of the beams that the design is nearly at the margin of stiction-induced collapse. The non-uniformity of the different poly layers is an indeterminate parameter that determines the functionality of the switches once they are pulled in. The observed time-stressed failure of the inverter is attributed to the in-use stiction mechanisms in the device. A stiffer beam can reduce the probabilities of sticition-induced failure, but that inevitably leads to higher pull-in voltage if the thickness or the length is accordingly modified to increase stiffness. The width can also be a parameter to adjust for higher stiffness, but at the cost of increased damping, and resulting slowing of operation. Therefore the design has to be an optimal one with respect to switching voltage, damping and chances of stiction. Another mechanism that may lead to failure of the device is the hard contact of the beam with the pad when the switch closes. As the beam is allowed to enter the electrostatic unstable region, its speed keeps on increasing to exceedingly high values until the beam touches the output pad. Due to such high speed the contact force exerted on the beam is very large and there is high probability of failure with time. This can be reduced if the beam is allowed to deflect less, preferably below its pull-in limit. However, such an option leads to a requirement for process modification or switching to another process from PolyMUMPs. The speed can be reduced by increasing the width of the beam or by adding a series resistance between the bottom electrode and the input signal

7. Conclusions In this work, design, analysis, fabrication and characterization of a surface micro-machined binary inverter have been presented. An extensive analytical approach for design optimization of the inverter has been carried out and it has been consolidated using simulation results. The different issues that affect the static performance of the inverter have been considered and the characteristics of the cantilever switches and hence of the inverter have been analytically established. 13

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[5], but the reduction of speed leads to increased sluggishness of the beams to changing input resulting in large turn-on and turn-off time. In summary, the design of the inverter can be improved in terms of reliability if the aspects like contact damage and in-use stiction are properly and carefully manipulated. However, this present work has aimed at the development and implementation of the MEMS inverter and the device has been found to demonstrate the inverter functionality complying with the theoretical estimation to a satisfactory extent.

[13]

[14] [15]

[16]

Acknowledgment The authors would like to express their profound gratitude to Professor Rudra Pratap and his research group in the Department of Mechanical Engineering, Indian Institute of Science, Bangalore, and Professor Navakanta Bhat and his research group and facility technologists in the Department of Electrical Communication Engineering, Indian Institute of Science, Bangalore, for their help in characterizing the devices using their facilities. They also thank National Programme on Micro and Smart Systems (NPMASS), the Government of India for sponsorship.

[17]

[18]

[19] [20]

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