DIGITAL DATA INPUT & CONTROL INTERFACES

ISSN 0157-5104

DIGITAL DATA INPUT & CONTROL INTERFACES FOR SOLAR COLLECTOR & SOLAR SYSTEM PERFORMANCE MONITORING by G.L. MORRISON & G.M. WITTIG UNSW Report No. 1980/FMT/5

November,1980

ACKNOWLEDGEMENTS

Financial support for this project was provided by NATIONAL ENERGY RESE^ffiCH DEVELOPMENT AND DEMONSTRATION PROJECT.

"Long :erm performance of Solar Collectors"

grant.

G. M. Wittig was supported by a combined National Energy Research Development and Demonstration Project and the Energy Authority o:f N.S.W. "Solar System Testing"

grant.

1. Introduction The two basic inputs to any solar design are irrac iation data for the installation location and collector efficiency data.

Once a system has been designed additional

system factors need to be evaluated in order to determine performance of the complete system.

To validate a design or

to compare relative performance of a number of similar systems it is necessary to operate complete systems (collector and enercy store) under typical load conditions so that actual operation can be determined. This report describes the computer interfacing and contiol interfaces that have been developed at the University of N.S.W. School of Mechanical

& Industrial Engineering to

obtain data on solar irradiation, solar collector performance and to operate solar systems with a controlled load pattern so that comparative performance of different systems may be evaluated. Due to the long time scale of solar irradiation monitoring and the need to carry out repeated load applications on sclar systems, it is essential that some form of automatic data logging and control capability be built into any solar laboiatory instrumentation. To utilize the advantages .of on-line computation available with computer based data logging, the instrumentation and c:ontrol described in this report, have been designed to be compc.table with standard interfaces available for micro-processors and mini-computers.

The installation at the University of N.S.W.

Solar Laboratory has been built around a 16 bit computer (PD 31/03 MING) however the devices described in this report could be interfaced to an 8 bit computer with only minor modifications.

-2-

2. Collector Testing A major problem with collector performance testing is the need to have continuous intelligent monitoring of the data so that periods of steady radiation and collector operation can be determined. Due to the wide range of parameter values encountered during collector testing it is necessary to carry out efficiency calculations as the data is obtained, so that steady state operation can be defined in terms of collector efficiency over a test period (ref.l). When a valid measurement of steady state efficiency is obtained the inlet temperature to the collector must be changed so that the collector can be tested at a different operating point. To reduce the very large amount of operator time needed to perform this test the complete measurement sequence and steady state operation checks have been programmed into an on-line computer (ref.2.).

T.o provide automatic control

capability into the system, the program can also operate the collector tracking rig and switch high power heaters or drain solenoids in the supply tank, so that the inlet temperature to the collector can be changed without the need for operator intervention.

Details of the interface between the computer

and pumps, motors, heaters etc. are given in section 5 of this paper; the instrumentation and program for evaluating collector performance is given in ref.2.

3. Solar Systems Testing To obtain information on the operation of complete solar systems (collectors and energy store) it is necessary to control the energy draw off from the store in a manner similar to actual operation in a working installation.

To apply a

specified load pattern a control system is required that can:

-3-

1)

initiate the load at specified time of day,

2)

j.ntegrate energy or volume draw off from the store,

3)

shut down the load when the energy or volume reaches a specified limit. To provide information on energy quality the measure-

ment system should be able to bin the temperature levels.

load energy into specified

Also the control system should be able to

impose any required daily, weekly or monthly load pattern so variations of energy or volume draw off can be simulated.

Such

a measurement and control system has been programmed in an on-line computer and is described in ref.3.

Details of the interface

between the computer and the load control solenoids are given in section 5 of this report and computer addressable counters used to integrate irradiation incident on the collectors and auxiliary energy consumption used in boosting the solar energy systems is described in section 6.

Solar Irradiation The major requirement of the irradiation record system is to provide very stable low drift integration of the pyranometer or silicon cell transducers and to minimise noise associated with the transmission of low level signals {max.10 mV) over long cables. This problem of noise in the transmission lines was minimised by .implifying the signal at the transducers so that a 10V signal is transmitted rather than the direct 10 mV signal produced by the transducer, fig.l.

As the amplifiers are mounted

outside the building it was necessary to shield them from direct solar irradia ion and to use a thermal oven voltage reference, a very low offs t temperature coefficient amplifier and metal film resistors to i inimise temperature drift. T e amplified transducer signal is converted to a pulse train b-

a voltage to frequency converter and then integrated

-4-

in a 16 bit counter, fig.2.

The count rate for

pyranometer transducers is set to 0.1 Hz/mV which gives a rt

resolution of 1 count/(kJ/m ) for a transducer sensitivity of 10 mV/{kW/m2).

As specified the voltage

to frequency converter and 16 bit binary counters have sufficient range to avoid over flowing for transducer sensitivities up to 20 mV/kW/m2).

However the V/F

converter can be scaled to suit higher transducer sensitivities. The system also incorporates a quartz crystal clock and day of the year counter which, along with 6 integrater channels can be output 4 bits at a time to a 'facit' paper tape punch.

The recording sequence can be initiated

automatically every ten (10)minutes or one (l)hour, and at any time by pressing a 'start' button.

All data and

handshake lines to the punch are optically coupled for reliable operation. Circuit diagrams for the voltage to frequency converters and the recording system are given in figs. 2 to 6. Clock in fig.4, counter in fig. 5 and power supply in fig.6.

5. Programmable Load Controller For fully automated testing,the switching of loads applied to systems and control of collector operating conditions must be software controllable.

A load control interface should

be able to switch loads ranging from solenoid valves to high power

heaters and pump motors in response to commands from

the computer, or do so manually via operator

intervention.

The system designed for this installation

consists

of two parts: i) ii)

the controller and computer interface remote opto-coupled triac static switches.

-5-

The controller (control board fig. 7 and 8 channel static register boards fig.8) outputs a 0 or 20ma current sign il to the triac drivers which are shown in fig.9.

Details of addressing codes for changing or reading

the state of a particular switch are given in Appendix 1.

Digital Multiplexer & Counters To enable storage of data derived from power meters, monitoring of auxiliary energy usage during system tests, run of wind or any other serial integrating equipment, a series of computer readable counters have been designed. These counters are also used to determine the average value of a signal (eg temperature rise across a collector) by converting the transducer voltage output to a pulse train using the circuit of fig.2.

These pulses are accumulated in the

multiplexer, allowing the average or integrated value of many signals to be available without continuous attention of the processor. Details of the 2 channel 16 bit counter cards are shown in fig.10, and circuits for rotation sensors used in mechanical power meters or wind anemometers, are given in fig.11. The multiplexer control card which enables remote and manual channel addressing and display of data is shown in figs. 12 and 13. Individual channels may be addressed by the processor, the 16 bit data word being presented at the multiplexer's output port.

Manual accessing is affected by counting up or

down to the required channel as indicated on the channel number display.

The data is presented as four hexadecimal digits on

the data display.

Remote access always takes priority over

manual chanrel selection, but as control is always referred to the manually selected channel after completion, it is usually invisible to the user. Appendix 1.

Details of addressing codes are given in

7, Flowmeter The low leve.'. sine wave output from pulsed output flowmeters (eg turbine or the displacement flowmeters) must be amplified and sc.aled to voltage levels compatable with the computer and other interfaces. The circuit shown in fig.14 gives a digital output of turbine revolutions vhich can be used to integrate the flow in conjunction with the multiplexer.

In addition,

through the use of a voltage to frequency converter and a phase lock loop it provides an analog output of instantaneous flow rate.

This is scaled to be compatable with the ± 5 volt

range of the computer's analog input modules.

-7-

REFERENCES 1.

Standards Association of Australia "Flat Plate Solar Collector Test Standard".

2.

Morrison, G.L. Sapsford, C.M. Donnelly, E.W. Wittig, G.M. & Litvak, A. "Automated Solar Collector Test Facility" University of N.S.W. Report 1980/FMT/4 September,1980.

3.

Morrison, G.L. Sapsford, C.M. Donnelly, E.W Wittig, G.M. & Litvak, A. "Solar System Performance Evaluation" University of N.S.W. Report 1980/FMT/6. December, 1980.

4.

Digital Equipment Corporation Real - 11/MNC Fortran Programmer's Manual AA - D631 A-TC 1978.

-8-

APPENDIX 1

Control & Data Logic for Load Controller S Digital Multiplexer

The load controller and digital multiplexer have both been designed to operate with the MINC's 16 bit input and output data bus. Output Data Bus The output data bm; from the computer is used to select the appropriate device, the particular channel required, and to specify read, write or reset information. The 16 bits of the output data bus are divided into three functional groups: a)

bits 0 to 7

: data, channel select

b)

bits 8,9,10,11

: device select

c)

bits 12,13,14,15

:

options.

Data Lines These eight bits a3:e used to select up to 256 channels on the device being addressed.

They can also be used to send data to external

devices in eight bit bytes. Device Select Bits 8 to 11 enable the selection of up to 16 instruments connected to the output lines.

Assigned addresses are given in Table 1.

Options These lines allow n number of optional commands, e.g. reset, read, write to be issued to the device. Software Control of Output Data Bus For the PDPll/Fortran installation described in this report the data on the output bus is; set by the following routine, (ref.4) DOUT (A, B, C, D) where

A specifies the appropriate output card in the computer,

B

sets up a mask on the output card so that lines corresponding to an "0" in the binary value of B cannot be altered,

C

is an error indicator,

D

is the decimal value of the output data word, 'D' is calculated as: D = (channel) +(256 * device) + (4096 * (01 + (02 x 2)

+ (03 * 4) + (04 x 8))

[OX = Option (= 0 or ljT] Input Data Bus The input data bus to the computer transfers 16 bits of data from the device and channel selected by the output data bus. The date input can be read via the following command: DINP (A, B, C,D) where

A

specifies the appropriate input card in the computer,

B

sets up a mask on the input card so that lines corresponding to an "O" in the binary value of B are read as 'O1 ,

C

is an error indicator,

D

is the binary data obtained after "anding" the input data bus values with the mask.

Operation Table 1 shows devices, addresses, number of channels and options.

Device Address

Description

No. of Channels

Bits Input

1

Multiplexer

32

16

2

Load Control ler

32

2

Options

01 to reset but hold data 01

= read/write

02

= 0 = off 1 = on

[for 1 [write]

-10-

Multiplexer Addressing the multiplexer will cause the data in the selected channel to be latched onto the input data bus to the computer.

The data on the input bus may then be read into the

computer via the DINP command. e.g. to read the data in channel X of the multiplexer the following commands must be issued. Call DOUT (0,32767, IERROR, 256 + X) Call DINP (0,32767, JERROR, IN) where

input card "O" and output card "0" are used, all 16 bits of input and output data are used, i.e. MASK = 2

-1

Error states are registered via IERROR and JERROR Output code 256 + X causes device 1 channel X to be addressed (i.e. multiplexer) for read access only. To avoid the possibility of the output address lines being switched away from the selected channel (e.g. by a timer interrupt) before the input data is read, it is necessary to ensure that the multiplexer is correctly addressed both before and after the input data bus is read.

The following commands carry out the necessary checks and

repeat the device addressing until the correct device and channel have been accessed. 10 Call

DOUT

(0,32767, IERROR, O)

Call

DOUT

(0,32757, IERROR,256 + X) Address channel X in Multiplexer

Call

DINP

(0,32767, IERROR, IN)

Read data into IN

IOUT

=

Read data on output bus to IOUT

If

IDOUT (0,0,IERROR,O)

(IOUT.NE.256 + X) GO TO 10

Reset output lines

Repeat addressing and data input if channel has been switched during attempt to read input data.

As well as reading the data in any channel in the multiplexer, Option I allows resetting of the channel selected whilst preserving the data that it contained.

This option requires resetting the output

-11card for multiple resets to reduce the chance of accidentially resetting channels subsequently accessed. i.e. to read and reset channels 2 and 3 Device

=

1

01

= 1

IDATA

=

2 + (Device x 256) + (4096 x 01)

Address of channel 2 of multiplexer and reset code.

Call DOUT (0, IERROR, IDATA)

Latch data in channel 2 output bus and reset.

Call DINP (0, IERROR, IN2)

Read old contents of channel 2.

Call DOUT (0,32767, IERROR, 0)

Reset output data bus prior to next reset.

IDATA = 3 + (Device x 256) + (4096 x 01) Call DOUT (0, 32767, IERROR, IDATA)

Reset channel 3

Call DINP (0, 32767, IERROR, INS)

Read old contents of channel 3.

Call DOUT (0, 32767, IEREOR, 0) Note;

Reset output data bus.

Address checking before and after the DIN command cannot be used in this excinple since the data is lost if the channel is re-addressed after the latch and reset command. To ensure that the channel addressing is not lost before the

DIN command, the above procedure could be changed to a DIN command with channel address checking as previously outlined, followed by a reset command.

However the separate read and reset commands would take

longer to execute than the combined latch and reset command.

The

combined operation allows frequency measurements to be made via a read/reset command every second.

The frequency in cycles per second

would thus be obtained without subtractions from previous inputs. Load Controller Addressing the load controller will cause two data bits to be latched to the input data bus. Bit 0 represents the state of the switch addressed (i

= =

off on

-12-

Bit 1 indicates the state of the enable/disable switch on the load controller 1

=

enabled

0

=

disabled

The disable function prevents program controlled alterations to the switch patterns. Multiple reads without resetting the output card are permitted. to read the state of switches 1 to 16: DIMENSION I switch DEVICE

=

2

MASK

=

1

(16)

DO 10 K =

1,16

IDATA

K + DEVICE x 256

=

Call DOUT (0,32767, IERROR, IDATA) 10 Call DINP (0, MASK, IERROR, ISWITCH (K)) Note;

MASK 1 = specifies that only bit 0 in the input data bus is to be read Option 1 and 2 allow changing the state of a switch (enable

switch allowing) Option 1

selects write mode

01 =

0 read

01 =

1 write

Option 2 is the data to be written into the selected switch if 01 = 1 and

02

=

0 switch turned off

or

02

=

1 switch turned on

To cause multiple write operations the output part must be reset before the second and subsequent operations. accidental alteration of switch positions.

This prevents

-13-

e.g.

to change switches 1 - 7 to positions stored in an array IPOS

printing error messages if unsuccessful

IZERO

=

0

DEVICE

=

2

01

=

1 i.e. write

MASK

=

1

DO 100 I = 0,7 IDATA

=

I + (256 x Device) + 4096 x (01 + 2 x IPOS (I))

Call DOUT

(0, MASK, IERROR, IDATA)

Call DINP

(0, MASK, IS)

If (IS, NE, IPOS (I)) Go to 200 100 C

Call DOUT (0, MASK, IERROR, 0) reset stop check why switch could not be changed

200 MASK

=

2

Call DINP (0, MASK, IERROR, IX) If (IX.EQ.2) Go to 300 - Bit 1 set If (IX.EQ.O) Go to 400 - Bit 1 zero 300

Type 301

301

FORMAT ('System Malfunction1) stop

400

Type 401

401

FORMAT ('Load Controller disabled') stop

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