Nov 28, 2005 - Perpustakaan Universiti Teknologi Malaysia dibenarkan membuat salinan untuk tujuan pengajian sahaja. 3. ...... The same material specification is used to design this hybrid coupler. Again, ...... handling electrostatic sensitive ...
DIRECT CONVERSION RECEIVER FOR ACTIVE INTEGRATED ANTENNA
MOHD HAIZAL BIN JAMALUDDIN
UNIVERSITI TEKNOLOGI MALAYSIA
PSZ 19 :16 (Pind. 1/97)
UNIVERSITI TEKNOLOGI MALAYSIA
BORANG PENGESAHAN STATUS TESIS*** JUDUL: DIRECT CONVERSION RECEIVER FOR ACTIVE INTEGRATED ANTENNA SESI PENGAJIAN : 2005/2006
MOHD HAIZAL BIN JAMALUDDIN______________
Saya
(HURUF BESAR) mengaku membenarkan tesis (PSM/Sarjana/Doktor Falsafah)* ini disimpan di Perpustakaan Universiti Teknologi Malaysia dengan syarat-syarat kegunaannya seperti berikut: 1. 2. 3. 4.
Tesis adalah hak milik Universiti Teknologi Malaysia. Perpustakaan Universiti Teknologi Malaysia dibenarkan membuat salinan untuk tujuan pengajian sahaja. Perpustakaan dibenarkan membuat salinan tesis ini sebagai bahan pertukaran antara institusi pengajian tinggi. * * Sila tandakan ( 9 )
9
SULIT
(Mengandungi maklumat yang berdarjah keselamatan atau kepentingan Malaysia seperti yang termaktub di dalam AKTA RAHSIA RASMI 1972)
TERHAD
(Mengandungi maklumat terhad yang telah ditentukan oleh organisasi / badan di mana penyelidikan dijalankan)
TIDAK TERHAD
Disahkan oleh
________________________________
______________________________
(TANDATANGAN PENULIS) 23, JALAN PALAS 14 TAMAN TERATAI 81110 SKUDAI, JOHOR Tarikh
: 28 NOVEMBER 2005
CATATAN :
(TANDATANGAN PENYELIA) DR MOHAMAD KAMAL BIN ABD RAHIM Nama penyelia
Tarikh :
28 NOVEMBER 2005
* Potong yang tidak berkenaan ** Jika tesis ini SULIT atau TERHAD, sila lampirkan surat daripada pihak berkuasa/organisasi berkenaan dengan menyatakan sekali sebab dan tempoh tesis ini perlu dikelaskan sebagai SULIT atau TERHAD. *** Tesis dimaksudkan sebagai tesis bagi Ijazah Doktor Falsafah dan Sarjana secara penyelidikan, atau disertai bagi pengajian secara kerja kursus atau penyelidikan, atau Laporan Projek Sarjana Muda (PSM).
“I hereby declare that I have read this thesis and in my opinion this thesis is sufficient in terms of scope and quality for the award of the degree of Master of Engineering (Electrical-Electronic & Telecommunication)”
Signature
: ....................................................
Name of Supervisor : DR. MOHAMAD KAMAL BIN ABD RAHIM
Date
: 28 NOVEMBER 2005
DIRECT CONVERSION RECEIVER FOR ACTIVE INTEGRATED ANTENNA
MOHD HAIZAL BIN JAMALUDDIN
A thesis submitted in fulfillment of the requirements for the award of the degree of Master of Engineering (Electrical-Electronic & Telecommunication)
Fakulti Kejuruteraan Elektrik Universiti Teknologi Malaysia
NOVEMBER, 2005
I declare that this thesis entitled “Direct Conversion Receiver for Active Integrated Antenna” is the result of my own research except as cited in the references. The thesis has not been accepted for any degree and is not concurrently submitted in candidature of any other degree.
Signature
:
_______________________________
Name
:
MOHD HAIZAL BIN JAMALUDDIN.
Date
:
28 NOVEMBER 2005
iii
To my parents and family, for their guidance, support, love and enthusiasm. Without these things this thesis could not have been possible.
iv
ACKNOWLEDGEMENT
Praise is to Allah who has given me the strength, physically and mentally in order for me to complete this thesis.
I extend my sincere gratitude and appreciation to many people who made this master’s project possible. Special thanks to my supervisor Dr. Mohamad Kamal Abd Rahim for their invaluable guidance, suggestions and full support in all aspects during the whole process of the project. The thank goes also to my lecturer Assoc. Prof. Dr Jafri Din that was indirectly involved in this project.
Many thanks go to Mr. Mohamad Zoinol Abidin and Mr. Azhari Asrokin from the Wireless Communication Centre for their suggestions and help in fabricating the final device.
Finally, I would also like to thanks my entire friend and whoever involved for their valuable help during my project and for providing me with useful information.
v
ABSTRACT
This thesis describes the design of a compact miniature and low cost microstrip dipole antenna integrated with 900 hybrid coupler, oscillator and diodes for direct conversion, or zero IF receiver. The frequency chosen is at 2.4 GHz, which is of particular interest for RFID application. In this receiver design, Agilent’s ADS software using momentum simulation and circuit simulation is employed to analyze the entire structure. In the fabrication process, the proposed receiver element is printed on a FR4 substrate with a dielectric constant of 4.7, a thickness of 1.6 mm and a conductor loss of 0.019. Microstrip dipole antenna that is presented here has a wide bandwidth up to 24% bandwidth. The 900 hybrid coupler can act as a phase shifter to provide the necessary 900 characteristics to operate with I/Q signal for direct conversions. Two schottky diodes (HSMS 8101) are mounted onto each of two coupler’s output port to act as a mixer. One kHz sinusoidal signal act as a baseband have been generated and modulated using signal generator. The demodulated signal is detected using direct conversion receiver circuit and the baseband signal at the output ports should be detected using oscilloscope.
vi
ABSTRAK
Tesis ini menerangkan mengenai rekaan padat antena mikrostrip dipole digabungkan bersama 900 hybrid coupler, oscillator dan diod untuk penerima Direct .Conversion atau Zero-IF. Frekuensi yang digunakan adalah pada 2.4 GHz dimana ia banyak digunakan untuk aplikasi RF ID. Di dalam rekaan penerima ini, perisian Agilent ADS menggunakan simulasi momentum dan litar telah digunakan untuk menganalisa seluruh struktur litar. Antena microstrip dipole ini mempunyai lebarjalur sehingga 24 %. 900 hybrid coupler pula akan bertindak sebagai penganjak fasa, supaya mencapai ciri 900 untuk operasi bersama isyarat I/Q. Dua diod Schottky (HSMS 8101) dilekapkan bersama setiap pasangan port keluaran untuk bertindak sebagai pengadun. Satu pin daripada diod itu disambungkan pada hujung port keluaran dan satu pin lagi dibumikan di atas satah bumi. Satu kilohertz isyarat sinus bertindak sebagai isyarat baseband telah dijana dan dimodulat menggunakan penjana isyarat. Isyarat yang telah termodulat kemudian dikesan menggunakan litar penerima Direct Conversion dan isyarat baseband kemudiannya berjaya dikesan pada port keluaran menggunakan osiloskop.
vii
TABLE OF CONTENTS
CHAPTER
TITLE
PAGE
DECLARATION
1
DEDICATION
iii
ACKNOWLEDGEMENT
iv
ABSTRACT
v
ABSTRAK
vi
TABLE OF CONTENTS
vii
LIST OF FIGURES
xi
LIST OF ABBREVIATIONS
xiii
LIST OF APPENDICES
xiv
INTRODUCTION
1
1.1
Introduction
1
1.2
Objective
2
1.3
Project Background
2
1.4
Scope Of Project
4
1.5
Thesis Structure
4
1.6
Summary
5
viii
2
RECEIVER ARCHITECTURE
6
2.1
Introduction
6
2.2
Types Of Receiver
6
2.2.1
The Superheterodyne Receiver
7
2.2.2
Image Reject- Receivers
10
2.3.3
Low IF Single Conversion Receiver
2.2.4
2.2.5 2.3
2.4
2.5
3
11
Wideband IF with Double Conversion
12
Direct Conversion Receiver
13
Direct Conversion Receiver concept
14
2.3.1 DCR Architecture
15
2.3.2 DCR Design Consideration
17
2.3.3 DC Offset
18
2.3.4
I/Q Mismatch
19
2.3.5
Even Order Distortion
21
2.3.6
LO Leakage
23
Active Integrated Antenna (AIA)
23
2.4.1
Definition of AIA
24
2.4.2 Previous research on AIA
24
Summary
27
DESIGN AND SIMULATION OF DCR
28
3.1
Introduction
28
3.2
Design Flow Chart
28
3.3
Design and Selection of DCR Components
29
ix
3.3.1
Microstrip Dipole Antenna 0
4
5
30
3.3.2 Quadrature 90 Hybrid Coupler
33
3.3.3
Voltage Tuned Oscillator (VTO)
38
3.3.4
Diode Mixer
39
3.4
Simulation of DCR Circuit
40
3.5
Fabrication
43
3.6
Summary
45
RESULTS AND DISCUSSION
46
4.1
Introduction
46
4.2
DCR Components Simulation & Measurement Results
46
4.2.1
Microstrip Dipole Antenna
47
4.2.2
900 Hybrid Coupler
47
4.3
AIA DCR Simulation Results
51
4.4
AIA DCR Measurement Results
53
4.5
Summary
56
CONCLUSION
57
5.1
Future Works
58
5.2
Summary
58
REFERENCES
59
Appendices A-B
62-75
x
LIST OF FIGURES
NO. OF FIGURES
TITLE
Figure 2.1
The Superheterodyne Receiver
Figure 2.2
Image Rejection and selectivity in
PAGE
8
a Superheterodyne receiver (high-side LO injection)
9
Figure 2.3
The Hartley image-reject architecture
11
Figure 2.4
The Weaver image-reject architecture
11
Figure 2.5
Low IF single conversion receiver
12
Figure 2.6
Wideband IF with double conversion
13
Figure 2.7
Direct Conversion Architecture
16
Figure 2.8
Spectrum before and after direct-conversion
17
Figure 2.9
Self-mixing of (a) LO. (b) Interferers
19
Figure 2.10
Quadrature generation in a) RF path and b) LO path
20
Figure 2.11
Effect of I=Q mismatch. Constellation (a) with gain error.; (b) with phase error. Time-domain waveforms (c) with gain error; (d) with phase error.
21
Figure 2.12
Single Balanced Mixer
22
Figure 2.13
Downconversion of signal harmonics.
22
Figure 2.14
Two-element active antenna configuration
25
Figure 2.15
Direct Conversion Receiver
25
Figure 2.16
Circuit architecture of the integrated antenna with direct conversion circuitry
26
xi
Figure 2.17
Ring AIA construction
27
Figure 3.1
Design Flow Chart
29
Figure 3.2
Microstrip Dipole Antenna Layout
30
Figure 3.3
Layout Environment of Microstrip Dipole Antenna using Method of Moment (MOM) simulation
32
Figure 3.4
Fabricated Microstrip Dipole.
33
Figure 3.5
Geometry of Branch-line coupler
34
Figure 3.6
Calculation of width and length for Zo = 50 Ω.
35
Figure 3.7
Calculation of width and length for Zo = 50 /√2 Ω.
35
Figure 3.8
Line Calculator of width and length for Zo=50 and Zo=50 /√2Ω
Figure 3.9
36
Layout Environment of Quadrature 900 Hybrid Coupler using Method of Moment (MOM) simulation
37
Figure 3.10
Fabricated 90 degree hybrid coupler
37
Figure 3.11
VTO–8150 Power Output, Frequency and Modulation Sensitivity vs. Tuning Voltage.
38
Figure 3.12
VTO-8150
38
Figure 3.13
Typical Forward Current vs. Forward Voltage at Three Temperatures.
39
Figure 3.14
Fabricated diode mixer with microstrip line
40
Figure 3.15
Circuit Simulation Design of DCR
41
Figure 3.16
Modulated Signal Generations
42
Figure 3.17
AIA Direct Conversion Receiver Circuit
42
Figure 3.18
The flow chart of fabrication process
43
Figure 3.19
The Layout generated in ADS layout environment
44
Figure 4.1
Input Return Loss for Microstrip Dipole Antenna.
47
Figure 4.2
Hybrid Coupler S parameter results a) Simulation b) Measurement
49
xii
Figure 4.3
Output phase different at port 2 and port 3 for a) Simulation b) Measurement
Figure 4.4
50
Comparison of original baseband signal from modulator and detected baseband signal at I/Q output
52
Figure 4.5
Detected demodulated spectrum at output port
52
Figure 4.6
Fabricated Direct Conversion Receiver
53
Figure 4.7
Experimental setup of DCR circuit
54
Figure 4.8
Detected baseband signal at I & Q Output Port
55
Figure 4.9
Comparison of transmitted sinusoidal wave and detected baseband signal
55
xiii
LIST OF ABBREVIATIONS
ADS
-
Advanced Design System
AIA
-
Active Integrated Antenna
BW
-
Bandwidth
CAD
-
Computer Aided Design
dB
-
Decibel
DCR
-
Direct Conversion Receiver
G
-
Gap
GHz
-
Giga Hertz
IF
-
Intermediate Frequency
kHz
-
Kilo Hertz
L
-
Length
LAN
-
Local Area Network
LO
-
Local Oscillator
MHz
-
Mega Hertz
Mm
-
Milimeter
o
C
-
Celcius
o
K
-
Kelvin
RF
-
Radio Frequency
VTO
-
Voltage Tuned Oscillator
W
-
Width
WCC
-
Wireless Communication Centre
Zo
-
Characteristic Impedance
εr
-
Material substrate
Λ
-
Wavelength
Ω
-
Ohm
xiv
LIST OF APPENDICES
APPENDIX
TITLE
A
Varactor Tuned Oscillator
B
Surface Mount Microwave Schottky Mixer Diodes
PAGE
61
69
CHAPTER I
INTRODUCTION
1.1
Introduction
The wireless industry has experienced a significant growth in the past several years. In order to have smaller products with more features, lower power consumption, and shorter design cycles, the size and complexity of the RF section of the product must be reduced. To explain this impact on the RF section one must briefly examine radio receiver architecture [1].
There are several types of receiver architecture that have been implemented in the wireless industry. However, in this thesis, five types of receiver will be discussed in the next chapter. The these are Superheterodyne Receiver, Image-Reject Receiver, Low IF Single Conversion receiver, Wideband IF with Double Conversion and Direct Conversion Receiver.
Superheterodyne receiver is the most widely used reception technique. However, it has several disadvantages that will be discussed later in the next chapter. The second type of receiver is Image Reject Receiver, which proposed is to remove image without the need of any post-LNA image-reject filtering. The third type of receiver is Low IF Single Conversion Receiver purpose is to protect the receiver from all the DC-related problems that pertain to DCR, while retaining the DCR's benefit of elimination of high Q IF filters. The fourth type of receiver is Wideband IF
2 with Double Conversion is very similar to the superheterodyne configuration. The last type of receiver which is particularly topic of interest in this project is Direct Conversion Receiver (DCR) or Zero IF Receiver. This DCR is implemented to overcome the problem that occurred in superheterodyne receiver such as problem of image and complex circuitry.
Direct Conversion Receiver (DCR) can be implemented with Active Integrated Antenna (AIA). AIA is Active Integrated Antenna is used to classify a combined antenna and front end where the antenna and active device interact to produce the overall circuit’s response. The implementation of DCR and AIA gives advantages such as simple circuitry, compact size and lower manufacturing cost. These make the DCR technique popular choice for implementation in majority of wireless products [2].
1.2
Objective
The objective of this project is to design and fabricate a compact and low cost Direct Conversion Receiver (DCR) at frequency 2.4 GHz.
1.3
Project Background
Most of radio receivers adopt superheterodyne technique, which can provide high selectivity and sensitivity.
Superheterodyne receiver contains RF, IF and
baseband stages. The system has many advantages such as good stability, high gain, low noise and flexibility for channel selection. However, superheterodyne receiver
3 has some disadvantages such as high power consumption, complex circuitry and the existence of an image frequency signal.
To overcome this problem, direct
conversion or zero-IF detection has been proposed as alternative receiver architecture [2-4]. Zero IF or direct conversion detection is a kind of coherent detection method. A modulated signal is mixed with the unmodulated carrier to produce zero IF signal.
The output signal contains the baseband signal’s amplitude and phase information [4]. This kind of receiver can eliminate the IF stage and the band pass and band reject filters, thereby reducing the circuit complexity.
A compact miniature direct conversion receiver constructed with microstrip dipole antenna, a local oscillator (LO), diodes mixer and hybrid coupler has been designed for this research. This design can be realized in an active integration antenna (AIA) [6-9]. AIA can be regarded as an active microwave circuit in which the output or input port is free space instead of a conventional 50Ω interface [10]. In this case, the antenna can provide certain circuit functions such as resonating, filtering, and duplexing, in addition to its original role as a radiating element. On the other hand, from an antenna designer’s point-of-view, the AIA is an antenna that possesses built-in signal- and wave-processing capabilities such as mixing and amplification.
Miniature size, low cost and simple circuitry is the main advantages to implement this AIA design using direct conversion technique. 2.4 GHz frequency is chosen since it is within the license free frequency bands, Industrial, Scientific and Medical (ISM) bands [10]. In this thesis simulation and measurement results of DCR components and DCR itself will be discussed in this thesis.
4 1.4
Scope Of Project
The scope of this project describes the design of a compact miniature microstrip dipole antenna integrated with 900 hybrid coupler, oscillator and diodes for direct conversion, or zero IF receiver. The frequency chosen is at 2.4 GHz, which is of particular interest for RFID application. In this receiver design, Agilent’s ADS software using momentum simulation and circuit simulation is employed to analyze the entire structure. DCR components which are dipole antenna and 900 hybrid coupler are needed to be design part by part. A suitable oscillator and mixer diodes selection should be done for DCR at 2.4 GHz. All of the DCR components are then being assembled and tested. This DCR should be able to detect baseband signal that has been transmitted throughout signal generator. A compact DCR are then fabricated in one board and again will be tested using signal generator.
1.5
Thesis Structure
The thesis is divided into five chapters and covers the research works that have been through for Direct Conversion Receiver design.
Chapter II reports the literature review of the basic concept of Direct Conversion Receiver and implementation with Active Integrated Antenna. Chapter III describes the design, simulation and fabrication process. Using Advanced Design System (ADS) software will do this process. The simulation and measurement results are reported in Chapter IV. This chapter also includes discussion from simulation and measurement results. Chapter V concludes the research work and gives suggestion for future development of the research project.
5 1.6
Summary
This chapter is an introduction for objective and research scope of the project. The research background and importance of the project also be explained. Besides, the thesis structure is highlighted. The research work performed will be reported in the following chapter.
CHAPTER 2
RECEIVER ARCHITECTURE
2.1
Introduction
This chapter will discuss on several types of receiver. There are five type of receiver described in this chapter. However the main focus of interest is on Direct Conversion Receiver. Some definition and background research on Active Integrated Antenna (AIA) also will be discussed in this chapter. Besides that, some DCR components theory that will be used in this project also will be discussed in this chapter.
2.2
Types Of Receiver
Superheterodyne receiver counterpart was first established and introduced in 1918 by Armstrong [11]. The origins of the direct conversion receiver (DCR) date back to the first half of last century when a single down-conversion receiver was first described by F.M. Colebrook in 1924 [12], and the term homodyne was applied. Additional developments in 1947 led to the publication of an article by D.G. Tucker, [13] which first coined the term synchrodyne, for a receiver which was designed as a precision demodulator for measurement equipment rather than a radio. Another paper by Tucker in 1954 [14] reports the various single down-conversion receivers
7 published at the time and clarifies the difference between the homodyne (sometimes referred to as coherent detector) and the synchrodyne receivers. The homodyne receiver obtains the LO directly (from the transmitter, for example), whereas the synchrodyne receiver synchronizes a free-running LO to the incoming carrier.
Over the last decade or so, the drive of the wireless market and enabling monolithic integration technology have triggered research activities on direct conversion receivers, which integrated with the remaining analog and digital sections of the transceiver, have the potential to reach the "one-chip radio" goal. Besides, it favors multi-mode, multi-standard applications and thereby constitutes another step towards software radio.
The present section refers to several recent publications [1-2] which provide a thorough survey and insight, and display renewed interest in direct conversion receivers.
Overcoming some of the problems associated with the traditional
superheterodyne and being more prone to integration, DCR has nevertheless an array of inherent challenges. After a brief description of alternative and well-established receiver architectures, this article presents the direct conversion reception technique and highlights some of the system level issues associated with DCR.
2.2.1
The Superheterodyne Receiver
The superheterodyne or heterodyne receiver is the most widely used reception technique and finds numerous applications from personal communication devices to radio and TV tuners. It has been used extensively and is well understood. It comes in a variety of combinations, [2,15-16] but essentially relies on the same principle. The RF signal is first amplified in a frequency selective low noise stage, then translated to a lower intermediate frequency (IF) with significant amplification
8 and additional filtering, and finally down-converted to baseband with either a phase discriminator or straight mixer, depending on the modulation format. This technique is illustrated in the schematic of Figure 2.1.
Figure 2.1:
The Superheterodyne Receiver
The use of a superheterodyne technique entails several trade-offs. Image rejection is a prevailing concern in this architecture. During the first downconversion to IF, any unwanted activity at a frequency spaced at fIF offset from the LO frequency (fLO ) on the opposite side of fLO from the desired RF channel, will produce a mixing product falling right into the down-converted channel at fIF . In practice, a RF bandpass filter, usually a surface acoustic wave (SAW) device, is utilized to perform band selection ahead of the low noise amplifier (LNA), while a second filter follows the LNA to perform image rejection. If these filters are identical they share the burden of the two functions. But some amount of image rejection must follow the LNA, for without it, the LNA's noise figure will effectively double due to the mixing of amplified image noise into the IF channel. Instead of the RF SAW filter, other passive filtering technologies such as dielectric or ceramic resonators can also be featured. The higher the IF, the more relaxed the requirements on the cut-off frequency of the image reject filter. Once at the IF, the presence of an interfering signal in the vicinity of the channel mandates sharp filtering around the channel; this filtering is performed after the first mixer by the channel select filter, which is also often an IF SAW filter. Figure 2.2 shows this filtering process.
9 Essentially, the exercise is that of a carefully engineered balance among several variables, including the rejection provided by the various filters, frequency planning and linearity of the active stages. Dual IFs provide additional room to maneuver with filter selectivity, but somewhat complicate the frequency planning.
Figure 2.2:
Image Rejection and selectivity in a Superheterodyne receiver (high-
side LO injection)
The selectivity required of the two aforementioned filters (in terms of fractional bandwidth) makes them unsuitable candidates in the foreseeable future for integration, due to the low Qs of current silicon processes, and have to be implemented by bulky off-chip components. The IF channel filter in particular requires high Q resonators for its implementation the higher the IF, the lesser the filter's fractional bandwidth (that is, its ratio of bandwidth to center frequency), necessitating ever-higher Q. This high Q requirement is most commonly met by the use of piezoelectric SAW and crystal filters.
This introduces additional constraints, as those filters often require inconvenient terminating impedances, and matching may impinge on such issues as noise, gain, linearity and power dissipation of the adjoining active stages. The narrower the fractional bandwidth, the more likely the filter's passband shape will exhibit an extreme sensitivity to variations in matching element values. Additionally, the specificity of the IF filter to the bandwidth of the signal and hence the standard used makes superheterodyne receivers unsuitable for multi-standard
10 operation.
Nonetheless, superheterodyne is known for its high selectivity and
sensitivity.
2.2.2
Image Reject- Receivers
Alternatively, by smart use of trigonometric identities, the image can be removed without the need of any post-LNA image-reject filtering.
This is the
principle of image-reject receivers [2, 17], the first of which is the Hartley architecture, introduced in 1928 [18]. It makes use of two mixers with their local oscillators in a quadrature phase relationship; this separates the IF signal into inphase (I) and quadrature (Q) components. It then shifts the Q component by 90° before recombining the two paths, where the desired signal, present in both paths with identical polarities, is reinforced, while the image, present in both paths with opposite polarities, is cancelled out. The dual of the Hartley architecture, known as the Weaver image-reject receiver [19], achieves the relative phase shift of one path by 90° by the use of a second LO enroute to another IF or to baseband. The same result is achieved. However, the reliability of these receivers heavily depends on the accuracy of the I/Q paths, that is, the gain and phase imbalance between the two branches. Figures 2.3 and 2.4 show diagrams of the Hartley and Weaver imagereject architectures, respectively (high frequency mixing products are removed by low-pass filtering not shown on figures).
11
Figure 2.3:
The Hartley image-reject architecture
Figure 2.4:
The Weaver image-reject architecture
2.2.3
Low IF Single Conversion Receiver
Low IF single conversion, shown in Figure 2.5, is an offspring of the DCR. Its main purpose is to protect the receiver from all the DC-related problems that pertain to DCR, while retaining the DCR's benefit of elimination of high Q IF filters. As its name indicates, instead of directly converting the signal to baseband, the LO is slightly offset from the RF carrier, typically one to two channels. The low IF means that the fractional bandwidth of the IF bandpass filtering is large, making it possible to implement it with low Q components. The IF SAW or crystal filter needed in the
12 high IF case can be replaced with an active RC filter or other filter suitable for low frequency operation, that is also conducive to silicon integration. The low IF signal may be translated to baseband through another mixer, or preferably, in the digital domain following analog-to-digital (A/D) conversion. Of course, this comes at the expense of faster and higher resolution A/D converters. If the IF frequency is equal to only one or two channel widths, then it is not possible to provide image rejection at RF, as the RF filter must be wide enough to pass all channels of the system. In this case, all image rejection must come from the quadrature down-conversion to the low IF, which itself resembles the Hartley architecture, once the baseband conversion is added.
Figure 2.5:
2.2.4
Low IF single conversion receiver
Wideband IF with Double Conversion
This architecture, shown in Figure 2.6, is very similar to the superheterodyne configuration. In this case, the first mixer utilizes an LO that is at a fixed frequency, and all channels in the RF band are translated to IF, retaining their positions relative to one another. The second mixer utilizes a tunable LO, thus selecting the desired channel to be translated to baseband. A subsequent lowpass filter suppresses adjacent channels.
13
Figure 2.6:
2.2.5
Wideband IF with double conversion
Direct Conversion Receiver Direct conversion reception is also referred to as homodyne, or zero-IF, is the
most natural solution to receiving information transmitted by a carrier. However, it has only been over the past decade or so that this type of reception has found applications other than pagers. Direct conversion reception has several qualities which make it very suitable for integration as well as multi-band, multi-standard operation, but there are severe inherent obstacles that have for a long time kept it in the shadow of the superheterodyne technique. The next section will described more details on DCR concept and some design consideration of implementing DCR
14 2.3
Direct Conversion Receiver Concept
The wireless industry has experienced a significant growth in the past several years [20]. In order to have smaller products with more features, lower power consumption, and shorter design cycles, the size and complexity of the RF section of the product must be reduced. To explain this impact on the RF section one must briefly examine radio receiver architecture [1].
A radio receives signals at RF containing useful voice or data information. In order to extract this information the RF signal must be down converted by a mixing process. A traditional method is to mix the RF signal with a signal generated by a local oscillator (LO) to produce a signal at an intermediate frequency (IF), which still contains the useful information. This IF signal can be amplified and filtered with moderate quality components and then demodulated to extract the useful information. A receiver utilizing this method is known as a superheterodyne receiver. Although the superheterodyne system was patented in 1917 by Edwin Armstrong, it is still considered state-of-the-art in mobile communications.
However, this architecture requires two frequency synthesizers to generate the LO signals required for the frequency conversion from RF to IF and then from IF to baseband. As well, image-reject and IF filters are required, which have typically been implemented with off-chip surface acoustic wave (SAW) filters.
The image-reject filter, located before the mixer, eliminates the signal at the frequency that is twice the IF away from the RF, which would also be mixed to the IF. The IF filter allows channel selection. The requirement of these filters increases the cost of the receiver because of: a) the filter cost, b) higher packaging costs (a package with 2 more pins is required because the signal must be routed off the chip to the filter and then back onto the chip), and c) the additional space required on the printed circuit board.
15 Recently, two approaches have been used to overcome this. Image filtering has been successfully implemented on-chip. A second approach is a direct downconversion architecture in which the radio frequency (RF) signal is mixed with a LO signal at the radio frequency with the result that the RF signal is downconverted directly to the baseband without an IF step and this is call direct conversion receiver technique.
Direct conversion was invented many decades ago, has been tried many times, and has failed almost every time. Nevertheless, this architecture has recently become the topic of active research again, perhaps to a much greater extent than before. Several reasons account for this renaissance [2]: 1) DCR, in principle, lends itself to monolithic integration much more easily than do heterodyne receivers; 2) DCR suffers much less from mismatch-induced effects than do image-reject architectures; 3) DCR past failures arose primarily from effects that could not be removed in discrete implementations, but may be controlled and suppressed in integrated circuits. In other words, DCR is one of few reception techniques whose drawbacks can be remedied through the use of only more transistors.
2.3.1 DCR Architecture
Direct conversion, also called zero-IF or homodyne conversion, is the natural approach to downconverting a signal from RF to baseband [6]. A DCR translates the band of interest directly to zero frequency and employs low-pass filtering to suppress nearby interferers, as shown in Figure 2.7. The quadrature I and Q channels are necessary in typical phase and frequency-modulated signals because the two sidebands of the RF spectrum contain different information and result in irreversible corruption if they overlap each other without being separated into two phases.
16
Figure 2.7:
Direct Conversion Architecture
Suppose that the IF in a superheterodyne is reduced to zero. The LO will then translate the center of the desired channel to 0 Hz, and the portion of the channel translated to the negative frequency half-axis becomes the image to the other half of the same channel translated to the positive frequency half-axis (Figure 2.8). The downconverted signal must be reconstituted by a phasing method of the type described above, otherwise the negative-frequency half-channel will fold over and superpose on to the positive-frequency half-channel. Zero-IF, therefore, mandates quadrature downconversion into two arms and a vector-detection scheme.
However, this scheme does not suffer from the strong-image problem when the image-reject downconverter is used in a nonzero IF heterodyne receiver, and the typical gain mismatches and phase errors in the two branches cause only a small loss in detected SNR. A lowpass filter, which is in effect a bandpass centered at dc when the negative frequency axis is included, may be used to select the desired channel and to reject all adjacent channels.
Therefore, RF preselection may in principle be eliminated because there is no image channel. In practice, it is still required to suppress strong out-of-band signals that may create large intermodulation distortion in the front-end prior to baseband channel selection and to avoid harmonic downconversion. There is also the advantage that if a high-order active filter is used for channel selection, it will dissipate lower power and occupy a smaller chip area at a given dynamic range than an
17 active bandpass filter with the same selectivity centered at a high IF.
All
amplification past the front-end is also at baseband, and therefore consumes a small power.
This zero-IF scheme is also called direct-conversion. When the local
oscillator is synchronized in phase with the incoming carrier frequency, the receiver is called a homodyne.
As early as 1924, radio pioneers had considered use of homodyne architectures for single vacuum-tube receivers, but it was a homodyne-measuring instrument for carrier-based telephony built in 1947 that first employed a highorder low pass filter for channel-selection [4]. Thereafter, the concept lay dormant, until it was revived in 1980 in the radio-paging receiver, the first miniature digital wireless device for personal communication to attain widespread consumer use.
Figure 2.8:
Spectrum before and after direct-conversion
2.3.2 DCR Design Consideration There are a few design issues that are needed to be considered when designing direct conversion receiver. This section will discuss about a few issues that involved with DCR [2, 5-8].
18 2.3.3 DC Offset
Since in a DCR architecture the downconverted band extends to zero frequency, extraneous offset voltages can corrupt the signal and, more importantly, saturate the following stages.
To understand the origin and impact of offsets,
consider the receiver shown in figure 2.9, where the LPF is followed by an amplifier and an analog-to-digital converter (ADC). Let us make two observations.
First, the isolation between the LO port and the inputs of the mixer and the LNA is not perfect, i.e., a finite amount of feed through exists from the LO port to points A and B [Figure 2.9(a)]. Called "LO leakage," this effect arises from capacitive and substrate coupling and, if the LO signal is provided externally, bond wire coupling. The leakage signal appearing at the inputs of the LNA and the mixer is now mixed with the LO signal, thus producing a dc component at point C. This phenomenon is called "self-mixing." A similar effect occurs if a large interferer leaks from the LNA or mixer input to the LO port and is multiplied by itself [figure 2.9(b)].
Second, the total gain from the antenna to point X is typically around 100 dB so as to amplify the microvolt input signal to a level that can be digitized by a low cost, low power ADC. Of this gain, typically 25 to 30 dB is contributed by the LNA/mixer combination.
The problem of offset is exacerbated if self-mixing varies with time. This occurs when the LO signal leaks to the antenna and is radiated and subsequently reflected from moving objects back to the receiver. For example, when a car moves at a high speed, the reflections may change rapidly.
19 From the above discussion, we infer that DCR's require some means of offset removal or cancellation. AC Coupling and Offset Cancellation are among the technique proposed to overcome the problem in DC Offset. This is further discussed in [2].
Figure 2.9:
Self-mixing of (a) LO. (b) Interferers
2.3.4 I/Q Mismatch
As shown in Figure 2.1, for most phase and frequency modulation schemes, a DCR must incorporate quadrature downcon-version. This requires shifting either the RF signal or the LO output by 90° (Figure 2.10. Since shifting the RF signal generally entails severe noise-power-gain tradeoffs, it is desirable to use the topology in figure 2.10 (b). In either case, the errors in the nominally 90° phase shift and mismatches between the amplitudes of the / and Q signals corrupt the downconverted signal constellation, thereby raising the bit error rate. Note that all sections of the circuit in the I and Q paths contribute gain and phase error.
20 Figure 2.11(a) and (b) shows the resulting signal constellation with finite e or θ. This effect can be better seen by examining the downconverted signals in the time domain [Figure 2.11(c) and (d)]. Gain error simply appears as a nonunity scale factor in the amplitude. Phase imbalance, on the other hand, corrupts one channel with a fraction of the data pulses in the other channel; in essence degrading the signal-tonoise ratio if the I and Q data streams are uncorrelated.
The problem of I/Q mismatch has been a major obstacle in discrete designs, but it tends to decrease with higher levels of integration. The key point, however, is that I/Q mismatch is much less troublesome in DCR's than in image-reject architectures. A 5° phase imbalance degrades the SNR by roughly 1 dB in the former while yielding an image rejection of only 27 dB in the latter.
Figure 2.10:
Quadrature generation in a) RF path and b) LO path
21
Figure 2.11:
Effect of I=Q mismatch. Constellation (a) with gain error.; (b) with
phase error. Time-domain waveforms (c) with gain error; (d) with phase error.
2.3.5 Even Order Distortion
Typical RF receivers are susceptible to only odd-order intermodulation effects. In direct conversion, on the other hand, even-order distortion also becomes problematic. Suppose, as illustrated in figure 2.11, two strong interferers close to the channel of interest experience a nonlinearity such as y(t) = a1x(t) + a2x2{t) in the LNA. If x{t) = A1 cos ωt + A2 cos ω2t, then y(t) contains a term: a2A1A2 cos (ω1 ω2)t, indicating that two high-frequency interferers generate a low-frequency beat in the presence of even-order distortion.
Upon multiplication by cos ωLo in an ideal mixer, such a term is translated to high frequencies and hence becomes unimportant. In reality, however, mixers exhibit a finite direct feedthrough from the RF input to the IF output. For example, in the single-balanced mixer of Figure 2.12, mismatches between M2 and M3 and
22 the deviation of the LO duty cycle from 50% create asymmetry in the circuit, thereby producing an output signal such as vRF(t)(a + AcosωLo). Thus, a fraction of VRF(t) on the order of 1% in IC technologies—appears at the output with no frequency translation.
Another manifestation of second-order nonlinearity is the second harmonic of the desired RF signal, which is downconverted to the baseband if mixed with the second harmonic of the LO output (Figure 2.13).
This effect arises for higher
harmonics as well, but it is negligible in differential mixers because the magnitude of the harmonics of both the RF signal and the LO is inversely proportional to the frequency.
Figure 2.12:
Figure 2.13:
Single Balanced Mixer
Downconversion of signal harmonics.
23 2.3.6
LO Leakage
In addition to introducing dc offsets, leakage of the LO signal to the antenna and radiation therefrom creates interference in the band of other receivers [3]. Each wireless standard and the regulations of the Federal Communications Commission (FCC) impose upper bounds on the amount of in-band LO radiation, typically between -50 and -80 dBm. The issue is less severe in heterodyne and imagereject mixers because their LO frequency usually falls out of the reception band.
The problem of LO leakage becomes less serious as more sections of RF transceivers are fabricated on the same chip. With differential local oscillators, the net coupling to the antenna can approach acceptably low levels.
2.4
Active Integrated Antenna (AIA) The role of antennas is increasing and diversifying as the wireless
applications proliferated.
Active integrated antennas are new technology that
integrates planar antennas with active solid state devices so that a number of interesting functions can be accomplished [21]. This section will introduce some basic concept of AIA and some previous research on AIA with direct conversion technique.
24 2.4.1
Definition of AIA
The term Active Integrated Antenna (AIA) is used to classify a combined antenna and front end where the antenna and active device interact to produce the overall circuits response. Viewed from the antenna point of view the AIA is a device that possesses built-in signal and wave processing capabilities such as mixing, amplification and detection. From a microwave circuit viewpoint the AIA is an active circuit where some I/O ports are fiee-space rather than conventional 50 ohm interfaces. A typical AIA would consist of active devices such as:-IMPATT or Gunn diodes; Schottky diodes; MESFET, pHEMT, HBT and other 3 terminal devices. These would be linked (using microstrip or coplanar transmission lines) to a range of planar antennas such as:- dipoles; slots; patches; bow-ties; slot-rings etc [22]. The significant difference between these antennas and traditional antennas connected to active fiont-ends is the dependence of the antennas electromagnetic performance on:the properties of the detector/source; on the way it is mounted in the planar circuit; and on how this circuit is matched to the planar antenna
2.4.2
Previous research on AIA
There are several research have implemented AIA with direct conversion detection. Several papers that have been referred for implementation of this AIA are on [5-8]. In [5-6], two active integrated antennas are implemented to act as directconversion receivers. This is shown in figure 2.14.
These active antennas can be
applied for Doppler frequency detection, I&Q demodulation and direction finding. They used direct conversion detection principle which direct-conversion receiver or I&Q demodulator, is shown in figure 2.15. It is assumed that a modulated signal, I(t)~coso,t+Q(t)~sinw,t, is received at the input port. The local oscillator (LO) frequency is exactly tuned to the carrier frequency and is divided into two branches with a 90" phase difference. When a small voltage is biased on mixer, for example
25 Schottky diode, the output of diode is dominated by a square term. For verification, baseband signal have been generated and detected at both the in phase and quadrature branches of the modulation signal. This 1 MHz sinusoidal wave, can be detected at the oscilloscope
Figure 2.14:
Two-element active antenna configuration
Figure 2.15:
Direct Conversion Receiver
26
In [7], using EHMs based on a pair of APDPs, the direct conversion circuitry is realized to provide both I/Q phase channels. The direct conversion circuitry is integrated with a 40-GHz planar patch antenna with impedance matched to 50Ω. With two such front-ends, a communication link including a transmitter and receiver is built. The circuit architecture is shown in figure 2.16. The proposed approach has a threefold advantage. First, directly integrating the antenna with the front-end RF circuits
realizes
a
compact
millimeter-wave
front-end
and
reduces
the
interconnection loss between the antenna and circuits, which is an important issue at millimeter-wave frequencies. Secondly, the circuit provides the direct conversion capability for digitally modulated signals, which eliminates the need of items such as an IF mixer, image rejection filters, and saves printed circuit board space]. More importantly, the existence of I/Q channels for direct conversion is suited for various frequency- and phase-modulation systems such as binary phase-shift keying (BPSK), QPSK, QAM, frequency-shift keying (FSK), etc. Furthermore, I/Q channels can naturally
Figure 2.16: Circuit architecture of the integrated antenna with direct conversion circuitry
27 In [8], a compact active ring antenna integrated with diodes for direct conversion, or zero-IF detection, is implemented. The circular aperture ring antenna exhibits a wide bandwidth and a high gain performance. The ring can act as a phase shifter to provide the necessary 90 degrees characteristics to operate with I/Q signals for direct conversions. Two Schottky diodes can be connected to the ring structure and are used as a mixer. The frequency focus is at 2.44GHz, which is of particular interest for home networking communication systems. The construction of this AIA ring antenna/phase is shown in figure 2.17.
Figure 2.17:
2.5
Ring AIA construction
Summary
In this chapter, the basic concept of several kinds of receiver has been reviewed. The focused of the reviewed are mainly on Direct Conversion Receiver (DCR). DCR architecture and design consideration of DCR is presented in this review. In addition of DCR, active integration antenna (AIA) concept is also being discussed here. Some previous research is also presented in this chapter.
CHAPTER 3
DESIGN AND SIMULATION OF DCR
3.1
Introduction This chapter will discuss the design, simulation and fabrication of two types
of DCR components which are microstrip dipole antenna and 90 degree hybrid coupler. Besides that, selection of another two components of DCR which are Voltage Tuned Oscillator (VTO) and diode mixer will be discussed here. Simulation of DCR using ADS software is also presented here. The design process begins with calculation and followed by simulation and fabrication. Computer Aided Design (CAD) tools such as Advanced Design System (ADS) software, MathCAD and AutoCAD is required to fulfill the design task.
3.2
Design Flow Chart
The design flowchart is shown in figure 3.1. The process is beginning with calculation for the formula in microstrip dipole antenna and hybrid coupler. Next, is to do some simulation using ADS software. After simulation is successfully implemented, these two components of DCR are tested for their own performance. Suitable selection of VTO and diode mixer is also needed before we can integrate it to perform DCR.
29
Simulation of DCR circuit is also implemented in ADS software. It is tested to detect baseband signal transmitted from I and Q modulator.
Part by part
integration to perform DCR circuit is then tested to detect baseband signal. After this process has successfully detected baseband signal, all of this DCR components are then integrated on one circuit board (FR-4 Board). DCR circuit implementation is complete, when its successfully detected baseband signal from signal generator.
Design of Microstrip Dipole Antenna & Hybrid Coupler
Simulation
Selection of VTO & Mixer Diode
Integr ation Simulation NO
OK
NO
YES
OK
Fabrication YES
Fabrication
Measureme t Tested OK?
Tested OK? DCR Circuit Successful Figure 3.1:
3.3
Design Flow Chart
Design and Selection of DCR Components This section will discuss on the design and selection of all four DCR
components.
30 3.3.1
Microstrip Dipole Antenna
The approach proposed in this part is to design microstrip dipole resonance at 2.4 GHz frequency band. Figure 3.2 shows the structure of a microstrip dipole of length L, width W and gap G that were used in simulation. The proposed antenna element is printed on a FR4 substrate with a dielectric constant of 4.7, a thickness of 1.6 mm and a conductor loss of 0.019. The two hatched rectangular pieces in Figure 3.2 are copper on the top of the substrate. Each of it is connected with the microstrip bend. The gap between the two pieces is G and the microstrip dipole is fed at the middle of the gap. One piece of the hatched is fed with connector and another one is connected to the ground.
Figure 3.2:
Microstrip Dipole Antenna Layout
Microstrip dipole of rectangular hatched or rectangular geometry as shown in figure 3.2 can be designed for the lowest resonant frequency using transmission line model. The formula to calculate the value of λ, L2 and W can be found through formulation as follows [23]: The effective dielectric constant (εe) constant of a microstrip line:
(3.1)
31 Where
εr = Dieletric Constant d = substrate thickness W= width of microstrip line
(Approximation is made for the simulation) The length (L1 and L2) of microstrip line using formula:
λ=
where
c f ε eff
(3.2)
λ= wavelength C= velocity of light f = frequency
Thus L1= L2 = λ/4
(3.3)
The simulation process is done using Metod of Moment ( MoM). The environment of MoM using ADS software is shown in figure 3.3. Optimization has been done by varying the calculated parameters and to get a better result of S11 parameter.
32
Figure 3.3:
Layout Environment of Microstrip Dipole Antenna using Method of
Moment (MOM) simulation
The length of each hatched rectangular is about quarter-wavelength. In this case the length of rectangular hatched, L1=L2= λ/4=16.52 mm and the gap between the two pieces, G = 0.9mm. At the designed frequency, approximation of the width W is made and it is equal to 2.90 mm. Overall, the length of the dipole is about, L = 47mm. In addition the microstrip bend is added between the two rectangular hatched which has length and width is equal to 7 mm. The photograph of the fabricated microstrip dipole prototype can be shown in figure 3.4
33
Figure 3.4: Fabricated Microstrip Dipole.
The design procedure of microstrip dipole antenna design can be carried out in a few steps as follows: •
The resonance frequency is chosen and for this case resonance frequency at 2.4GHz is chosen.
•
Calculate the correct dipole dimension (L1, L2 and W) by using microstrip transmission line formula.
•
Connect the rectangular hatched with microstrip bend and chooses the suitable gap G between the two hatched pieces on the substrate.
•
The gap between the two traces is G and the microstrip dipole is fed at the middle of the gap.
3.3.2
Quadrature 900 Hybrid Coupler
Quadrature hybrids are 3 dB directional couplers with a 90° phase difference in the outputs of the through and coupled arms. This type of hybrid is often made in microstrip or stripline form as shown in figure 3.5, and is also known as a branch-line hybrid. Other 3 dB couplers, such as coupled line couplers or Lange couplers, can also be used as quadrature couplers [24].
34
With reference to Figure 3.5 the basic operation of the branch-line coupler is as follows. With all ports matched, power-entering port 1 is evenly divided between ports 2 and 3, with a 90° phase shift between these outputs. No power is coupled to port 4 (the isolated port).
Figure 3.5:
Geometry of Branch-line coupler
The same material specification is used to design this hybrid coupler. Again, the important parameters that are needed for the design are width (W) and length (L). There are two calculation value are needed for Zo = 50 Ω and Zo = 50 /√2 Ω. The calculation value is shown in MathCAD Professional in figure 3.6 and 3.7. The value of width (W1) = 2.91 mm and (W2) = 5mm while the value of length (L1) and (L2) = 16.65mm. ADS software also has a built in Microstrip line calculator. This is shown in figure 3.8. The value of width and length will be dependent on the formula utilized and as a whole will be estimation. What’s important to note is, that the value of λg will not vary much with the change in width from the respective formula. From the line calculator, we get the value of width (W1) = 2.91 mm and (W2) =16.52 mm while the value of length (L1) = 16.52 mm and (L2) = 16.08 mm. This is shown in figure 4.8 and this parameters are inserted for the design of hybrid coupler.
35
Figure 3.6:
Calculation of width and length for Zo = 50 Ω.
Figure 3.7:
Calculation of width and length for Zo = 50 /√2 Ω.
36
Figure 3.8: Line Calculator of width and length for Zo=50 and Zo=50 /√2Ω
The simulation process is done using Metod of Moment ( MoM). The environment of MoM using ADS software is shown in figure 3.9. Optimization has been done by varying the calculated parameters and to get a better result of S parameter. The photograph of the fabricated hybrid coupler prototype can be shown in figure 3.10
37
Figure 3.9:
Layout Environment of Quadrature 900 Hybrid Coupler using Method
of Moment (MOM) simulation
Figure 3.10:
Fabricated 90 degree hybrid coupler
38 3.3.3
Voltage Tuned Oscillator (VTO)
A suitable VTO must be selected before it can be integrated to perform DCR circuit. Frequency of interest here is at 2.4 GHz, which mean suitable VTO must be selected within that range. Oscillator that is used in this project is Agilent’s Model VTO-8150. The voltage can be tuned up to 2.5 GHz frequency. The Tuning Voltage is shown in figure 3.11. From, the graph is shown that the tuning voltage is about 34 Volt at 2.4 GHz and power output is about 13 dBm. The picture of VTO is shown in figure 3.12. Overall specification is shown in Appendix A.
Figure 3.11:
VTO–8150 Power Output, Frequency and Modulation Sensitivity vs.
Tuning Voltage.
Figure 3.12:
VTO-8150
39 3.3.4
Diode Mixer.
Mixer circuits may be used whenever there is a need to translate signals between frequency bands. When two signals of differing frequencies are fed into a non-linear element such as a diode, numerous intermodulation products are produced, including the sum and difference frequencies of the signals. Mixer circuits are often configured in the form of balanced mixers with two mixer diodes connected to two mutually isolated ports of a 3dB hybrid network [22]. Hybrids that are used in this connection are invariably one of two types: the 90° or quadrature hybrid and the 180° hybrid. For this project, diode mixer that has been chosen to be connected with 90° hybrid coupler is schottky diodes Model HSMS-8101. The diode is biased at 0.15 as shown in figure 3.13. The photograph of the diodes that has been fabricated with microstrip line is shown in figure 3.14 and the overall specification can be found in Appendix B.
Figure 3.13:
Typical Forward Current vs. Forward Voltage at Three Temperatures.
40
Figure 3.14: Fabricated diode mixer with microstrip line
3.4
Simulation of DCR Circuit
All of DCR components are then integrated to perform DCR circuit. This is done by using circuit simulation environment as shown in figure 3.15. This design is divided into 2 sections. One section is for modulating part and the other section is for the receiving section of AIA DCR circuit.
For the modulating section, I & Q modulator is used to transmit signal. I & Q signal are generated in bits.
The signals are then mixed with oscillator and
modulated through MOD module. More details figure of modulating section is shown in figure 3.16.
At the receiving part, the signals from modulating part are then propagate through AIA DCR circuit. Its then demodulated and mixed with oscillator at the mixer diodes. The baseband signal will be detected at the two output port. I signal will be detected at the I output port and Q signal will be detected at Q output port. Details figure of demodulating part is shown in figure 3.17
Figure 3.15: Qdua IQ_ModTuned Idua MOD1 Fnom=2.4 GHz Rout=50 Ohm LP F_RaisedCos LP F_RaisedCos LP F1 LP F3 A lpha=0.35 A lpha=0.35 S ymbolRate=S ymRate ymRate S ymbolRate=S DelayS ymbols=0 DelayS ymbols=0 E xponent=0.5 E xponent=0.5 DutyCycle=1000 DutyCycle=1000 S incE =no S incE =no
Circuit Simulation Design of DCR
MSU B MSub1 H =1.6 mm Er=4.7 Mur=1 C ond=1.0E+50 H u=3.9e+034 mil T=0 mil TanD =0.019 R ough=0 mil
t
Va r Eq n
VAR V A R1 S ymRate=10 MHz TimeS tep=1/(10* S ymRate) S topTime=1000* TimeS tep
E nvelope E nv1 Freq[1]=2.4 GHz Order[1]=5 FundOversample=1 S top=S topTime S tep=TimeS tep
MLIN TL5 Subs t="MSub1" W =2.910190 mm L=10 mm
MLIN TL9 Subs t="MSub1" W =2.910190 mm L=20 mm MSOBN D _MD S Bend1 Subs t="MSub1" RF W =2.910190 mm
P_1Tone POR T2 N um=2 Z=50 Ohm P=dbmtow (8) Freq=2.4 GH z
LO
MLIN TL6 Subs t="MSub1" W =2.910190 mm L=15 mm
LOCAL OSCILLATO R (LO )
V low=-.005 V V high=.005 V Rate=S ymRate Rise=1 nsec Fall=1 nsec B itS eq="0101"
V tB itS eq
R Fin
Qs atuS RC3
ENVELOPE
VARIABLE PARAMETER
t
Is atu
Meas Eqn Meas 1 R Fin_Fund=R Fin[1] I_Fund1=Is atu[0] I_Fund2=Idua[0] Q_Fund2=Qdua[0] Q_Fund1=Qs atu[0] Iout_BB=real(Iout[0]) Iout_BB1=Iout[1] Qout_BB=real(Qout[0]) Qout_BB1=Qout[1]
MSub
M eas Eq n
V tB itS eq S RC1 V low=-.005 V V high=.005 V Rate=S ymRate Rise=1 nsec Fall=1 nsec B itS eq="1010"
P_1Tone LO_ref1 N um=1 Z=50 Ohm P=dbmtow (0) Freq=2.4 GH z
MO DULATED SIG NAL G ENERATION
MTEE_AD S Tee2 Subs t="MSub1" W 1=5.000860 mm W 2=2.910190 mm W 3=2.910190 mm
MLIN TL4 Subs t="MSub1" W =2.910189 mm L=16.62 mm
MTEE_AD S Tee1 Subs t="MSub1" W 1=2.910190 mm W 2=5.000860 mm W 3=2.910190 mm
MLIN TL2 Subs t="MSub1" W =5.000860 mm L=13.17211 mm
MLIN TL1 Subs t="MSub1" W =5.000860 mm L=13.17211 mm
Iout
O UTPUT1
Qout
OUTPUT2
MTEE_AD S MLIN Tee3 TL8 Subs t="MSub1" Subs t="MSub1" W 1=2.910190 mmW =2.910190 mm W 2=5.000860 mmL=10 mm W 3=2.910190 mm di_hp_H SMS8101_20000301 D5
MLIN TL3 Subs t="MSub1" W =2.91019 mm L=16.62 mm
MLIN TL7 MTEE_AD S Subs t="MSub1" Tee4 W =2.910190 mm Subs t="MSub1" L=10 mm W 1=5.000860 mm W 2=2.910190 mm di_hp_H SMS8101_20000301 W 3=2.910190 mm D4
AIA DIRECT CONVERSION RECEIVER
Term Qout Num=4 Z=50 Ohm
Term Iout Num=3 Z=50 Ohm
41
42
MODULATED SIGNAL GENERATION
P_1Tone LO_ref1 Num=1 Z=50 Ohm P=dbmtow(0) Freq=2.4 GHz
Qdua IQ_ModTuned Idua MOD1 Fnom=2.4 GHz Rout=50 Ohm Isatu LPF_RaisedCos LPF_RaisedCos LPF1 LPF3 Alpha=0.35 Alpha=0.35 SymbolRate=SymRate SymbolRate=SymRate t DelaySymbols=0 DelaySymbols=0 Exponent=0.5 Exponent=0.5 DutyCycle=1000 DutyCycle=1000 SincE=no SincE=no
VtBitSeq SRC1 Vlow=-.005 V Vhigh=.005 V Rate=SymRate Rise=1 nsec Fall=1 nsec BitSeq="1010"
Figure 3.16:
MLIN TL9 Subst="MSub1" W=2.910190 mm L=20 mm MSOBND_MDS Bend1 Subst="MSub1" RF W=2.910190 mm MLIN T L5 Subst="MSub1" W=2.910190 mm L=10 mm
VtBitSeq
QsatuSRC3
Vlow=-.005 V Vhigh=.005 V Rate=SymRate Rise=1 nsec Fall=1 nsec BitSeq="0101"
t
Modulated Signal Generations
AIA DIRECT CONVERSION RECEIVER OUTPUT1
Iout
MT EE_ADS T ee1 Subst="MSub1" W1=2.910190 mm W2=5.000860 mm W3=2.910190 mm
MLIN T L1 Subst="MSub1" W=5.000860 mm L=13.17211 mm
MLIN T L7 MT EE_ADS Subst="MSub1" T ee4 W=2.910190 mm Subst="MSub1" L=10 mm W1=5.000860 mm W2=2.910190 mm W3=2.910190 mm
Term Iout Num=3 Z=50 Ohm
di_hp_HSMS8101_20000301 D4
MLIN T L3 Subst="MSub1" W=2.91019 mm L=16.62 mm
MLIN T L4 Subst="MSub1" W=2.910189 mm L=16.62 mm
LOCAL OSCILLATOR (LO) OUTPUT2 Qout LO
P_1T one PORT 2 Num=2 Z=50 Ohm P=dbmtow(8) Freq=2.4 GHz
MLIN T L6 Subst="MSub1" W=2.910190 mm L=15 mm
MT EE_ADS T ee2 Subst="MSub1" W1=5.000860 mm W2=2.910190 mm W3=2.910190 mm
MLIN T L2 Subst="MSub1" W=5.000860 mm L=13.17211 mm
MT EE_ADS T ee3 Subst="MSub1" W1=2.910190 mm W2=5.000860 mm W3=2.910190 mm
MLIN T L8 Subst="MSub1" W=2.910190 mm L=10 mm di_hp_HSMS8101_20000301 D5
Figure 3.17:
AIA Direct Conversion Receiver Circuit
Term Qout Num=4 Z=50 Ohm
43 3.5 Fabrication
This section will discuss in general about the fabrication process of DCR circuit. Although the fabrication process involved with fabrication of DCR components part by part, this section will discuss the fabrication of final DCR circuit.
The fabrication processes are done manually using an etching technique. FR4 microstrip board with 1.6 mm thickness is used. Figure 3.18 show the flow chart of the fabrication process.
Layout Prepared
Ultraviolet Process
Film Remove Process Etching Process
Soldering Process Figure 3.18:
The flow chart of fabrication process
44
Designed layout is generated from ADS layout tools. This is shown in figure 3.19. Small pad is included to connect it with VTO pin. All microstrip line used in this layout is made of double-sided FR4 material.
Figure 3.19: The Layout generated in ADS layout environment
The layout in figure 3.19 is exported to DXF file format for printing. Using AutoCAD, the DXF (drawing enhancement file) will be printed on transparency in actual size. Modification is needed to ensure the layout is very clear on the transparency.
The upper side of FR4 microstrip board is exposed to ultraviolet for 135 seconds using layout from transparency. This ultraviolet (UV) process is done in a
45 dark room to avoid the film layer exposed to light; instead Red Bulb is used for lighting purpose. After the UV process is completed, the microstrip board is put into a small square container, which contained a universal developer liquid solution (50 g universal developer for 1 liter water). Then, the container is sieve to remove the exposed film layer for about 2 minutes.
The sieved microstrip board is put into
another small square container, which contains a stain remover liquid.
Ferric
Chloride chemical substance is selected as the stain remover agent (100g Ferric Chloride for 200 ml water). Again, the container is sieved to remove the uncovered copper layer. The sieved process took about 30 minutes to 1 hour to complete. Lastly, the soldering process commenced on the work piece.
3.5
Summary
This chapter is about DCR circuit design process at 2.4 GHz frequency. DCR circuit is built from part by part design of four types of DCR components which are microstrip dipole antenna, 90 degree hybrid coupler, VTO and mixer diode. This four type of DCR components are then integrated to perform DCR circuit. The designed process begins with calculation then followed by simulation. The designed DCR is then fabricated.
Brief description of ADS in performing circuit
development, simulation setup and data analysis is covered.
CHAPTER 4
RESULTS AND DISCUSSION
4.1
Introduction
This chapter discusses the result obtain from the research works. The discussion covers the results of S parameter of microstrip dipole antenna and hybrid coupler. Both simulation and measurement results will be compared and analyzed. Finally, the results of simulation and measurement of DCR circuit will be analyzed.
4.2
DCR Components Simulation & Measurement Results
This section will discuss on the results of microstrip dipole antenna and 90 degree hybrid coupler.
47 4.2.1
Microstrip Dipole Antenna Results
The result of microstrip dipole antenna has been discussed in term of bandwidth response and return loss of the antenna. The simulation and measurement results of the antenna return loss is shown in figure 4.1. The resonance of the antenna can be seen by observing the dip in the return loss. The dip of antenna can be seen at 2.4 GHz frequency. The bandwidth from simulation result is 13.4% and for measurement is about 23.85 %. The experimental result shows the frequency has been shifted down by 100 MHz. From the graph, it is shown that the bandwidth of measurement result is much higher than the simulation result.
MAgnitude (dB)
Simulation and Measurement of Microstrip DipoleAntenna 0 -2 -4 -6 -8 -10 -12 -14 -16 -18
Measurement
Simulation
2
Figure 4.1:
2,2
2,4 2,6 2,8 Frequency (GHz)
3
Input Return Loss for Microstrip Dipole Antenna.
48 4.2.2
Quadrature 900 Hybrid Coupler Results
In this section the results of measurement of hybrid coupler has been discussed in term of S parameter and output phase at the two output port.
S parameter measurement of the hybrid coupler is shown in figure 4.2 and the output phase between port 2 and port 3 is shown in figure 4.3. From figure 4.2 a, measurement return loss, S11 = -40.1 dB and the isolation between port 1 and port 4, S14 = -24.3 dB. The gain at the output port 2, S12 = -4.59 dB and the gain at the output port 3, S13 = -4.4 dB. While for simulation results in figure 4.2b it shown that simulated return loss, S11 = -32.809 dB and the isolation between port 1 and port 4, S14 = -41.775 dB. The gain at the output port 2, S12 = -3.322 dB and the gain at the output port 3, S13 = -3.838 dB.
Figure 4.3 shows a 900 phase different between port 2 and port 3. Overall the measurement results of S parameters follow the simulation results. This proof that the hybrid coupler can be integrated with dipole antenna and is suitable for I and Q signals that keep 900 phase different.
49
S-PARAMETER 0
m4 m3 -5
-10
Mag. [dB]
-15
m4 freq=2.400GHz dB(S(1,2))=-3.322
-20
m3 freq=2.400GHz dB(S(1,3))=-3.838 m2 freq=2.400GHz dB(S(1,1))=-32.809
-25
-30
m2
m1 freq=2.400GHz dB(S(1,4))=-41.775
-35
m1
-40
-45 2.0
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
3.1
3.2
Frequency (GHz)
a) Simulation Result
S-Parameter of Hybrid Coupler 0 -5 M a g n itu d e (d B )
-10 -15 -20 -25
s11 s12 s13 s14
-30 -35 -40 -45 2
2,1 2,2 2,3 2,4 2,5 2,6 2,7 2,8 2,9
3
3,1 3,2
Frequency (GHz)
b) Measurement Figure 4.2: Hybrid Coupler S parameter results a) Simulation b) Measurement
50
Output phase 150
m5
100 Phase [deg]
m5 freq=2.400GHz phase(S(1,2))=80.561 m6 freq=2.400GHz phase(S(1,3))=-8.708
50
m6
0 -50 -100 -150
2.0
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
3.1
Frequency (GHz)
a) Phase different for simulation Output phase (Measurement) 250 200 Phase (Degree)
150 Phase (S31)
100
Phase (S21)
50 0 -50 -100 -150 -200 -250 2,39
2,4
2,41
2,42
2,43
2,44
2,45
Frequency (GHz)
a) Phase different for Measurement Figure 4.3: Output phase different at port 2 and port 3 for a) Simulation b) Measurement
3.2
51 4.3
AIA DCR Simulation Results
The modulated source data is generated using I and Q modulator. I and Q modulator have three input ports. One is connected to the carrier and the other two go to the in-phase and quadrature branches. The modulated signal is then demodulated through the coupler and mix out with LO at the schottky diodes. The baseband signal is then detected at the two end of the output port as what has been described in previous chapter.
The simulation of the schematic is base on circuit envelope simulation. The baseband signal detected at the port 1 and port 2 follows the sinusoidal wave that generated at the I and Q modulation source. It shown that this schematic design is suitable for I and Q demodulation. The baseband signals that have been detected is shown in figure 4.4. The upper part of the graph had shown the original I & Q signal and the lower part shown the detected. It’s also shown that the detected signal follows the original sinusoidal wave but the amplitude is attenuated. Figure 4.5 shows the demodulated spectrum that has been detected throughout the receiver. The carrier and sidebands of the spectrum can be clearly observed.
52
c i rc u i t_ Ii n
-0.014
-0.016
-0.018
-0.020
c i rc u i t_ Io u t
-0.034696 -0.034698 -0.034700 -0.034702 -0.034704
c i rc u i t_ Qi n
-0.078
-0.080
-0.082
-0.084
c i rc u i t_ Qo u t
-0.034695
-0.034700
-0.034705 0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
time, usec
Figure 4.4: Comparison of original baseband signal from modulator and detected baseband signal at I/Q output
D emodulated S pectrum 10
m6 m6 fre q = 0 .0 0 0 0 Hz d B m (sp e ctru m )= 3 .3 6 8
0 -1 0
m7 fre q = -5 .0 0 0 M H z d B m (sp e ctru m )= -5 2 .8 9 3
-2 0 -3 0
dBm(spectrum)
-4 0
m7
-5 0
m8 fre q = 5 .0 0 0 M H z d B m (sp e ctru m )= -5 2 .9 0 3
m8
-6 0 -7 0 -8 0 -9 0 -1 0 0 -1 1 0 -1 2 0 -1 3 0 -1 4 0 -5 0
-4 5
-4 0
-3 5
-3 0
-2 5
-2 0
-1 5
-1 0
-5
0
5
10
15
20
25
30
35
40
f req , MH z
Figure 4.5:
Detected demodulated spectrum at output port
45
50
1.5
53
4.4
AIA DCR Measurement Results
The fabricated of Direct Conversion Receiver circuit is shown in figure 4.6. All of the DCR components are integrated on one FR-4 Board. The experimental setup is shown in figure 4.7. Synthesizer Signal Generator is used to transmit the baseband signal. The baseband signal is than radiated from monopole antenna. The DCR circuit is placed in front of the transmitting antenna with 1 meter separation. When the diodes are forward biased by a voltage 0.1 -0.25 V, the LO signal will be mixed with the RF signals received by microstrip dipole antenna. The down conversion components of the mixer include all the baseband signals information.
Figure 4.6: Fabricated Direct Conversion Receiver
1 kHz sinusoidal baseband signal have been generated and detected at DCR circuit. The baseband signal can be detected using oscilloscope. The baseband signal at the output port 1 and port 2 of the circuit can be seen as figure 4.8. Since the transmitting side does not use I/Q modulator, the signal detected at output port 1 and 2 are the same.
54
Figure 4.7: Experimental setup of DCR circuit
From figure 4.8, it can be observed that the sinusoidal wave that detected at the two output ports have the same voltage peak to peak which is 4 Volt. From the figure, it also shown that the output ports have the same sinusoidal wave. Figure 4.9 shows the comparison of original transmitted signal with the detected baseband signal. It is shown that the original sin wave signal is measured on channel 1 of the oscilloscope, while the other channel is measured for DCR circuit output port. The original signal Vpp is equal to 0.75 V while the detected baseband signal Vpp is equal to 0.75 mV. It is shown that the sin wave signal is attenuated from the original signal. As conclusion, this designated DCR circuit has successfully implemented when it successfully detected baseband signal using oscilloscope. The objective of this thesis has been achieved.
55 Freq : 1 kHz I output : Vpp= 4 mVolt Q output : Vpp = 4 mVolt
Figure 4.8:
Detected baseband signal at I & Q Output Port
Freq : 1 kHz Output channel 1 : Vpp= 0.75 Volt Output channel 2: Vpp = 0.75m Volt
Figure 4.9:
Comparison of transmitted sinusoidal wave and detected baseband signal
56 4.5
Summary
A low cost and compact integrated receiver at 2.4 GHz band for direct conversion has been proposed.
The proposed microstrip dipole antenna with a
narrow width is easy to implement. The hybrid coupler provides the required 900 characteristics to operate with the I and Q signal for direct conversion. Overall, the microstrip dipole antenna, coupler and mixer can be integrated into one board which allows a low cost receiver. Simulation and measurement for testing DCR circuit have been implemented as discussed in this chapter. In experimental setup, 1 kHz sinusoidal signal act as a baseband have been generated and modulated using signal generator.
The demodulated signal is detected using direct conversion receiver
circuit and the baseband signal at the output ports is successfully detected using oscilloscope.
CHAPTER 5
CONCLUSION
Five types of receiver have been discussed in this thesis. However, Direct Conversion Receiver (DCR) techniques have been chosen to be implemented with Active Integrated Antenna (AIA). The research work has design a DCR circuit for frequency at 2.4 GHz and circuit simulation was done in ADS. The proposed microstrip dipole antenna with a bandwidth up to 24% bandwidth is implemented. The hybrid coupler provides the required 90° characteristics to operate with the I and Q signal for direct conversion. Two schottky diodes are connected at the end of the coupler’s output ports are used as the mixer.
Overall, the microstrip dipole antenna, coupler and mixer can be integrated into one board which allows a low cost receiver. In the simulation mode, sinusoidal wave have been successfully modulated and detected throughout the receiver. In the measurement mode, the designed DCR circuit is tested to receive baseband signal from Synthesized Signal generator. This DCR circuit with AIA has successfully developed when it successfully detected baseband signal using oscilloscope.
58 5.1
Future Work
The following suggestions are made to possibly complement and further extend results: •
Use I&Q Modulator to transmit baseband signal. This can be used to detect I & Q signal at the DCR circuit
•
Design of Direct Conversion Transceiver in one circuit board. Implementation of transceiver circuit in one circuit board is needed. This idea is used for RF ID application.
•
Use different type of antenna to perform AIA with direct conversion technique. Different type of antenna such as circular patch antenna, triangular patch antenna and others type of antenna can be implemented as AIA and perform DCR.
5.2
Summary
This chapter concluded the research work. Some extension work is already under progress.
The research project will further improved and enhanced as
explained in the previous section suggestion.
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Varactor-Tuned Oscillators Technical Data VTO-8000 Series
Features • 600 MHz to 10.85 GHz Coverage • Fast Tuning • +7 to +13 dBm Output Power • ±1.5 dB Output Flatness • Hermetic Thin-film Construction
Description Agilent Technologies’s VTO-8000 Series oscillators use a silicon transistor chip as a negative resistance oscillator. The oscillation frequency is determined by a silicon abrupt varactor diode acting as a voltage-variable capacitor in a thin-film microstripline resonator. This provides extremely fast tuning speed, limited primarily by the internal impedance of the user-supplied voltage driver. Fast settling is another feature of the Agilent VTO-8000 Series oscillators. Typical settling times for the VTO-8090 are
