DIRECT CONVERSION RECEIVER FOR GSM900, DCS1800, PCS1900, AND WCDMA Jussi Ryynänen, Kalle Kivekäs1, Jarkko Jussila, Aarno Pärssinen1, Kari Halonen Electronic Circuit Design Laboratory, Helsinki University of Technology, Helsinki, Finland P.O. Box 3000, FIN-02015 HUT, Finland
[email protected] 1 Nokia Research Center, Helsinki, Finland
ABSTRACT 2. LOW NOISE AMPLIFIER A single-chip, multi-mode direct conversion receiver designed for GSM900, DCS1800, PCS1900, and UTRA/FDD WCDMA, applications is described. The low-noise amplifier uses only four on-chip inductors. The downconversion mixers include a method to improve the receiver IIP2 to over +40dBm. The baseband circuit achieves over +90dBV IIP2. The noise figure of the SiGe BiCMOS receiver is less than 4.8dB in all GSM modes, and 3.5dB in WCDMA. The power consumption in all GSM modes is 42mW and in WCDMA 50mW. The silicon area is 10mm2.
1. INTRODUCTION The demand for single-chip multi-mode transceivers is evident, as 3G cellular systems will coexist with the current systems. The straightforward way to design a multi-mode transceiver is to use parallel signal paths [1,2]. However, for cost efficiency, multi-mode transceivers must share as many building blocks as possible both at RF and at baseband. Thus, in addition to multimode capability at radio frequency, channel bandwidths and other necessary parameters at baseband should be programmable. Furthermore, the performance compared to single-system transceivers should not degrade. The single-chip multi-mode receiver shown in Fig. 1 includes a variable gain low-noise amplifier (LNA), downconversion mixers, quadrature LO generation, channel selection filters, and programmable gain amplifiers (PGA)[3]. The direct conversion receiver (DCR) is designed for WCDMA, GSM900, DCS1800, and PCS1900 systems. The IIP2 of this DCR can be improved by balancing the second-order distortion of the mixers. In addition the transients related to gain changes in discrete steps at RF in a DCR are discussed.
The single-ended LNA shown in Fig. 2 has separate input devices for each system. Depending on the selected mode, one of the four inputs is activated while the other inputs are connected to ground. In high gain mode, the active system uses one of the common-emitter transistors Q1-Q4 as input transistor. Alternatively, the gain of the amplifier can be lowered by approximately 30dB using a resistively degenerated common-base stage to improve linearity with high signal levels. In addition to using the common-base configuration, the LNA gain can be controlled with cascode transistor pairs Q51-Q72. These pairs perform two 6-dB gain steps by steering part of the signal current to the non-operational output. Altogether, six gains can be selected in the LNA. In WCDMA, PCS1900, and DCS1800 modes, the LNA uses resonator L1 as load and RF1 as output. In GSM900 mode, L2 and RF2 operate as load and signal output, respectively. The resonance frequency for resonator L1 can be lowered for DCS1800 and PCS1900 systems by adding a capacitor Cs1 with switch Mp1. In addition, the switch Mp2 is opened, which compensates for the Q-value reduction caused by Mp1 and increases the LNA gain to an acceptable level. In WCDMA, PCS1900, and DCS1800 modes the LNA shares the matching inductor Le1.
L2 RF2
RF1 Vb
Vb Q51
Vb
Vb
Q52
Q61
Vb2 Q1 GND
GND
Vb3
WCDMA
GND
CG19
LbG19
CommonBase Q3
LbG18
Vb4 GND
Q4
CG18 Off chip
LbW
Q72 GND
CommonBase Q2
OUT I
Vb Q71
GND GND
CommonBase
CommonBase Vb1
Vb
Q62
GND GND
GND
CW
GSM900 DCS1800 PCS1900 WCDMA
LI2 CI2 RI2
Rs1
Cs1 L1
GSM/DCS/PCS
1
VDD
CI1 LI1 Mp2
Mp1
Ctrl1
CG9
Le1
Le2
LbG9
RF1
2
GND
GSM/DCS/PCS
RF2
WCDMAin
1
OUT
PCS1900in
DCS1800in
GSM900in
Fig. 2. Schematics of the LNA in GSM900 high gain mode.
WCDMA
LO
Fig. 1. Block diagram of the receiver.
In direct conversion receivers, the gain adjustment in discrete steps at RF is beneficial compared to baseband because the transients due to gain changes are upconverted in the mixers. In addition, at RF the transients can be filtered out using a highpass filter (HPF) with a significantly smaller time constant. However, the LO leakage to the RF input causes problems in direct conversion receivers if the RF gain is
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frequency in the trimmed branch in the channel. This makes the trimming in WCDMA sensitive to the IF frequency unless the shift in the pole frequency is compensated capacitively to keep the pole frequencies in both branches equal. 60
50
40
IIP2 (dBm)
adjusted in discrete steps. The leaking LO signal at the RF input, which can be higher than the wanted signal, is amplified by the RF gain. When the LNA gain is changed in discrete steps, the DC-offset due to LO self-mixing changes abruptly generating a transient at the mixer output. Furthermore, the leakages and reflections of the LO in the RF front-end may also change generating transients when the LNA gain is altered. At the baseband, the changes in the offsets are filtered out with HPFs in WCDMA mode but since the cutoff frequencies of these HPFs must be small compared to the signal bandwidth the transients decay slowly leading to a significant decrease in the signal quality. However, in this receiver the LO power at the LNA input is decreased to the level where it becomes difficult to observe transients without averaging. This was mainly achieved using a double frequency LO input and by proper layout design.
30
20
3. DOWNCONVERSION MIXER 10
0 −8
IIP2 TRIM
LO+ Q1
Q2
Qc1
Qc2
LO-
φ
φ
Vbc
OUT-
Iboost
φ
Vbc
LO+
Q4
Q3
−130 −135 −140 −145 −150
φ
M1
M2
φ
Fig. 3. Downconversion circuitry.
100k Frequency (Hz)
1M
Fig. 5. DCR input-referred IMD2 as a function of the IF frequency after the IIP2 trimming in GSM900 and WCDMA modes. The flat region between 40kHz and 100kHz corresponds to +45dBm IIP2 with –40dBm input tones at 800kHz and 800kHz+fIF. The –137dBm IMD2 at 200kHz corresponds to +57dBm IIP2 with –40dBm input tones at 10MHz and 10.2MHz.
4. ANALOG BASEBAND CIRCUIT
Qc3
φ φ
RF1
8
−125
VDD
OUT+
−4 −2 0 2 4 6 TRIMMED MIXER LOAD IMBALANCE (%)
−120
−155 10k
IIP2 TRIM
−6
Fig. 4. Receiver IIP2 as a function of controlled mixer load resistor imbalance in GSM900 mode.
Pimd,in (dBm)
The single-balanced current boosted mixer with a cascode device (Qc1/Qc2) between the input transconductor (M1/M2) and LO switching transistors (Q1, Q2) is shown in Fig. 3. It has an additional LO switching pair (Q3, Q4) and a virtual input branch (M3, Qc3) in parallel to the actual RF signal path to reduce the LO-to-IF feedthrough, and thus the LO-induced noise. The cascode devices are used in the mixer to improve the LO-to-RF isolation and as an additional switch to select between LNA outputs RF1 and RF2. The quadrature LO signals are generated from an external double frequency synthesizer with a divide-by-two circuit. The mixer uses a technique to reduce the even-order distortion. The IIP2 characteristics are improved inserting a controllable additional resistive load in parallel to either the positive or negative load resistor. Thus, an additional controllable mismatch linearizes the mixer with respect to the even-order distortion. The additional load consists of binary-weighted large resistor fingers with a 5-bit control. Both I- and Q-channels are adjusted separately, because they typically exhibit different asymmetry performance. Fig. 4 illustrates the IIP2 of several samples as a function of the trimming range in GSM900 mode. The improved receiver IIP2 is at least +42dBm in each characterized sample.
φ
mixer
RF2
with
M3 CS
IIP2
enhancement
Fig. 4 and Fig. 5 illustrate the variations in IIP2 in the downconversion channel (IF) after once trimmed. When the baseband is in GSM mode, switches S1 and S2, in Fig. 6, are open. Hence the effect of the mixer load trimming in the pole frequency is insignificant. In WCDMA mode, the switch S1 is closed and thus the trimming may considerably shift the pole
In all GSM modes, the channel selection filter prototype is 5th order Butterworth and in WCDMA 5th order Chebyshev with 0.01-dB passband ripple. The RC structure, which forms the real pole of the odd-order prototype, is followed by a transconductor, Gm1 in WCDMA and Gm2 in GSM mode, as shown in Fig. 6. The transcondutor is linearized using negative feedback and loaded by a 4th order leapfrog filter. The virtual ground at the opamp input is used to avoid the need for current mirroring or a differential pair at the output of the transconductor. The linearization current forms the output current, thus leading to a mismatch-insensitive structure and low power. The feedback loop gain decreases when frequency is increased, which degrades transconductor linearity at higher
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100 WCDMA
Voltage Gain (dB)
95 90 85 80
GSM DCS1800
PCS1900
75 70 65 0.6
0.8
1
1.2 1.4 1.6 1.8 Frequency (GHz)
2
2.2
Fig. 7. Measured maximum DCR voltage gain in all four modes. 120 100 IIP2 80 IIP3
60 Pout (dBm)
frequencies. However, the passive pole in front of the transconductor maintains good linearity at high frequencies. Assuming that Gm1/Gm2 limit the baseband IIP2, the minimum value of the baseband IIP2 is determined by the IIP2 observed from a single output of Gm1/Gm2. According to the measurement results of a separate test filter, the IIP2 in the WCDMA mode is +99dBV with 10-MHz and 10.2-MHz test signals, and maintains over +90dBV within input offset range of ±50mV. Therefore, the minimum IIP2 is sufficient and at baseband device mismatches cause no longer concern. Gm1/Gm2 blocks the common-mode second-order distortion generated in the mixer and does not convert a significant amount of it to differential. All capacitor matrices in the leapfrog filter are identical in size and have a 5-bit control. In WCDMA mode, the capacitor size is decreased to one third of the GSM mode, and the remaining capacitors are used in the servo. In WCDMA mode, a PGA with a programmable gain range of 33dB follows the leapfrog filter. On-chip offset removal in WCDMA mode consists of a servo with chopper stabilization and AC coupling. AC coupling is used in the attenuator with a programmable loss to decrease the transients due to changes in the digitally controlled gain [4]. In principle, the chopper stabilized servo forces the DC voltage between nodes N1 and N2 (Fig. 4) to zero. When gm of Gm1 is changed no transients occur since biasing is not changed and the preceding offsets are not amplified with a programmable gain. However, the measured performance is not satisfactory. In both modes, the offset voltage at the output can be removed using a differential pair with an off-chip control, as shown in Fig. 4. The baseband circuit is designed to drive 8b ADCs in both modes.
40 20 0
Gm1 S1
−20
GSM out
Gm2
−40
IN S2
SERVO
N1 N2
−60 −100
CLK
−80
−60
−40 −20 Pin (dBm)
0
20
40
Fig. 8. Nominal IIP2 and IIP3 for GSM900.
G1 G2
−60 VB5
VB6 VIN+ VB7
GN Gm3
VB3
R2
VB3
N1 IOUTVB1
VINN2
VB2
R1 VB2
WCDMA out
−70
VREF
IOUT+ G2
WCDMA
−80
GN WCDMA offset ctrl
G1
Fig. 6. One signal channel of analog baseband circuit.
Noise (dBm/Hz)
GSM offset ctrl
VDD
VB4
VB8
5. EXPERIMENTAL RESULTS The receiver is fabricated with a 0.35-µm 45-GHz fT SiGe BiCMOS process. The measured performance is summarized in Table I. In WCDMA mode, the compression of a small in-band signal is defined using a downconverted 15-MHz blocker, and the IIP3 and IIP2 are measured with 10-MHz & 20.2-MHz and 10-MHz & 10.2-MHz downconverted signals, respectively. In all GSM modes, compression is defined using a downconverted 0.6/1.6/3.0-MHz blocker, and the IIP3 and IIP2 are measured with 800-kHz & 1.6-MHz and 800-kHz & 820-kHz downconverted signals, respectively. The graphical extrapolations of IIP3 and IIP2 without trimming in GSM900 mode are shown in Fig. 8. The output noise spectrums at DCS1800 and WCDMA modes are shown in Fig. 9.
−90 DCS1800
−100 −110 −120 −130 −140
1k
10k
100k Frequency (Hz)
1M
10M
Fig. 9. Output noise spectrum of the receiver at the maximum gain in DCS1800 and WCDMA modes. The channel selection filter frequency responses in GSM and WCDMA modes are shown in Fig. 10. Both responses are a combination of two curves. One curve is measured at the passband and the other at the stopband using 40dB larger input signal to improve the dynamic range in the measurement. The tones after 30MHz are the harmonics of the
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15.36MHz clock used in the chopped servo. The measured outof-band IIP3 and IIP2 of the analog baseband circuit are +39dBV and +99dBV in GSM mode and +44dBV and +104dBV in WCDMA, respectively. The circuit achieves the highest IIP2 reported for a channel selection filter [5]. The input-referred noise is 12.3µVRMS in GSM mode and 24.0µVRMS in WCDMA. 0 −20
Gain (dB)
−40 −60 −80
Fig. 11. Chip microphotograph.
−100 −120
7. ACKNOWLEDGMENT
−140 −160 1k
10k
100k
1M
10M
The authors would like to thank L. Sumanen, M. Hirvonen and T. Hollman for assistance. This work was supported by Nokia Networks, Nokia Foundation, and Finnish National Technology Agency.
100M
Frequency (Hz)
Fig. 10. Measured filter frequency responses at the maximum baseband gain in GSM and WCDMA modes.
8. REFERENCES A microphotograph is shown in Fig. 7. The chip area is 9.8mm2 including the pads, which is only 20% more than the single-mode WCDMA chip excluding the area of ADCs [3].
[1] S. Dow, et al., “A Dual-Band Direct-Conversion/VLIF [2]
6. CONCLUSIONS A low power, low-noise, single-chip direct conversion receiver for GSM900, DCS1800, PCS1900, and UTRA/FDD WCDMA systems has been described. Off-chip components have not been used in the signal path. The IIP2 of the receiver can be improved repeatedly to over +40dBm by inserting a controllable additional mismatch to mixer load resistors. The analog baseband circuit achieves over +90-dBV out-of-band IIP2, which is predictable and does not limit the receiver performance. The problems related to gain changes in discrete steps at RF in a direct conversion receiver have been solved.
[3]
[4]
[5]
Transceiver for 850GSM/GSM/DCS/PCS,” ISSCC Digest of Technical Papers, pp. 230-231, Feb 2002. R. Magoon, I. Koullias, L. Steigerwald, W. Domino, N. Vakilian, E. Ngompe, M. Damgaard, K. Lewis, A. Molnar, “A Triple-Band 900/1800/1900MHz Low-Power ImageReject Front-End for GSM,” ISSCC Digest of Technical Papers, pp. 408-409, Feb. 2001. J. Ryynänen, K. Kivekäs, J. Jussila, L. Sumanen, A. Pärssinen, K. Halonen, “A Single-Chiå Multimode Receiver for GSM900, DCS1800, PCS1900, and WCDMA,” to appear in IEEE JSSC, vol 38. April 2003. J. Jussila, J. Ryynänen, K. Kivekäs, L. Sumanen, A. Pärssinen, K. Halonen, “A 22mA 3.7dB NF Direct Conversion Receiver for 3G WCDMA,” ISSCC Digest of Technical Papers, pp. 284-285, Feb. 2001. A. Yoshizawa, Y. Tsividis, “An Anti-Blocker Structure MOSFET-C Filter for a Direct Conversion Receiver,” Proc. IEEE CICC, pp. 5-8, May 2001.
TABLE I SUMMARIZED PERFORMANCE OF THE RECEIVER GSM Supply voltage / V 2.7 Power consumption * / mW 42 Voltage gain / dB 0…82 Baseband gain step / dB 6 NF (DSB) / dB 3.8 Out-of-band IIP3 / dBm -20 Out-of-band IIP2 / dBm +14 Out-of-band IIP2 ** / dBm +42 -1dB compression / dBm -35 LO@ RF input / dBm -88 S11 / dB -13 * Excluding measurement buffers ** With trimming
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DCS1800 2.7 42 -6…79 6 4.6 -21 +16 +42 -34 -92 -10
PCS1900 2.7 42 -4…79 6 4.8 -21 +18 +42 -34 -96 -11
WCDMA 2.7 50 -6...99 3 3.5 -21 +18 +47 -34 -98 -14
