Distinguishing Process Variation Induced Faults from Manufacturing Defects in Analog Circuits using V-Transform Coefficients Suraj Sindia∗ , Vishwani D. Agrawal†
Virendra Singh
Department of Electrical and Computer Engineering Auburn University, Alabama, AL, USA ∗ Email:
[email protected] † Email:
[email protected]
Supercomputer Education and Research Centre Indian Institute of Science, Bangalore, India Email:
[email protected]
Abstract—Paramteric fault distinction between those arising from process variation as opposed to manufacturing defects in components of an analog integrated circuit is presented. Such a fault distinction has significance in the correction and calibration of process steps responsible for manufacturing defects, thereby improving manufacturing yield. In this paper, we begin by laying out foundations for high sensitivity analog circuit test from our previous work on analog circuit test based on V-transform coefficients. Next, we present the Bayesian fault classification of parametric faults arising from process variation against manufacturing defects. Our experiments are based on a benchmark fifth order elliptic filter. We use SPICE program for fault injection, with about 50,000 Monte Carlo simulation runs to demonstrate fault detection-diagnosis under process variation. The test scheme uncovers 95% of all injected single parametric faults whose sizes deviate 5% from the nominal values of circuit components corrected for process variation, while the procedure successfully diagnosed all component faults under ±3σ process variation with 88% confidence level.
I. I NTRODUCTION Non-linear circuit testing has been well studied and different methods have been proposed for finding parametric faults [1], [2], [3], [4], [5], [6], [7], [8]. Prominent among them in the industry is the IDDQ based testing where current from the supply rail is monitored and sizable deviation from its quiescent value is reported. However this requires augmentation of the CUT. For example, in the simplest case a regulator supplying power to any sizable circuit has to be augmented with a current sensing resistor and an ADC (for digital output) and then there is subsequent analysis to be performed on sensed current. Further IDDQ is suitable only for catastrophic faults as the current drawn from the supply is distinguishable only when there is some “big enough” fault so as to change the current drawn from the supply from its quiescent value to a region where it is distinguishable. For example with resistor R2 being open in Figure 1, the current drawn from supply can change by 50% of its quiescent value. Such faults can typically be found by monitoring IDDQ using a current sensor. However parametric deviations say lesser than 10% from its nominal value cannot be observed using this scheme, specially so in the deep submicron era where the leakage currents can be compa-
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rable with defect induced current [9]. The other approach for testing parametric faults that can be found in literature [10], [11], [12], [13], [14] is based on the use of neural networks. Neural network based approaches propose the use of circuit observer blocks to track the output for a set of input signals which is used for training the neurons. The trained set of neurons is then used to estimate variations in the output for a standard input stimulus. This method, however, suffers from large amounts of training required and the consequent increase in test application time that the scheme is prohibitive for even medium sized analog circuits at production. More recently, the use of Volterra series coefficients was proposed to estimate non-linear characteristics of the system. These coefficients are then used for testing the circuit with a pseudo random input stimulus [15], [16]. This method however suffers from the high computational requirement of estimation of Volterra series coeffcients for every circuit at production which can increase the test cost significantly. It is therefore interesting to develop a method to detect parametric faults with little circuit augmentation while keeping the test access mechanism simple and the test application time to a minimum.
To address the issue of parametric deviation, we would typically need more observables to have an idea about the parametric drift in circuit parameters. This would mean an increase in complexity of the sensing circuit. However, we would also want only little augmentation to tap any of the internal circuit nodes or currents. To overcome these seemingly contrasting requirements the method intended should have some way of “seeing through” the circuit with only the outputs and inputs at its disposal. References [17], [18] have accomplished this sort of a strategy for linear circuits in a different context as described next.
Savir and Guo describe a method [17] based on transfer function of a circuit under test (CUT). The transfer function,
H(s), of the CUT is expressed as: M
H(s) =
i=0 N i=0
ai s i (M < N ) bi
(1)
si
Here, ai and bi are referred to as transfer function coefficients (TFCs). The CUT is subjected to frequency rich input signals and the output at these frequencies is observed. With these input-output pairs they estimate the TFCs of CUT. These coefficients are now compared with the ideal circuit TFCs, which are known a priori. The CUT is classified faulty if any of the estimated coefficients are beyond the tolerable range. This method necessarily needs the CUT to be linear, as transfer functions are possible only for LTI systems. To extend the above idea to more general non-linear circuits we adopted a strategy in [19] where we expand the function of the circuit as a polynomial by the Taylor’s series expansion about the input voltage vin = 0 as follows: f (0) f (0) 2 1! vin + 2! vin f (n) (0) n n! vin + · · ·
vout = f (vin ) = f (0) + ··· +
+
f (0) 3 3! vin +
(2) where f (x) is a real function x. Ignoring the higher order terms in (2), we can expand vout up to the nth power of vin , which gives us the approximation in (3): 2 n vout = a0 + a1 vin + a2 vin + · · · + an vin
(3)
where a0 , a1 , a2 , . . . , an are all real-valued functions of circuit parameters pk ∀k. Further assume that normal parameter variations (normal drift) in a good circuit are within a fraction α of their nominal value, where α |VCin(1+ρi)| or |VCi| < |VCin(1-ρi)| No
Yes
CUT is faulty
i
