Jul 17, 1987 - Indexing terms: Semiconductor devices and materials, Bipolar devices, Transistors, Vapour deposition. Double-heterojunction bipolar transistor ...
etched stripline. Because the strip width correction has to be calculated only once, analysis as well as synthesis can easily be performed with a small scientific calculator. B. NAUWELAERS A. VAN DE CAPELLE Division of Microwaves and Lasers Catholic University ofLeuven Kard. Mercierlaan 94, B-3030 Heverlee, Belgium
Trimethylindium, triethylgallium, arsine and phosphine were used as source reactants at a growth temperature of 625°C. Diethylzinc and disilane were used as p- and n-dopants, respectively. Hydrogen carrier gasflowrates of 7 slm at 75 torr cell pressure were used. The growth rates were 1-3/im/h and 2-6/nn/h for the deposition of InP and GalnAs, respectively.
17th July 1987
18 -3 0 1 p m , n= 4x10 cm , GalnAs _3 )? 0 5 p m . n = 1xK> cm" . I n P 015Mm.p-1x10I9cm3 GalnAs
300A spacer .Gain As 0-3pm .n=1x10
References 1 WHEELER, H. A.: Transmission-line properties of a strip line between parallel planes', IEEE Trans., 1978, MTT-26, pp. 866-876 2 GUNSTON, M. A. R.: 'Microwave transmission-line impedance data' (Van Nostrand Reinhold Company, London, 1972)
p Zn-diffused region
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Fig. 1 Schematic diagram of basic device and material structure
The layer structure is illustrated in Fig. 1. Undoped GalnAs spacer layers 300 A thick were incorporated to prevent the pn junction from shifting into the InP as a result of the expected Zn diffusion during growth. An SIMS plot of Zn and As depth profiles is shown in Fig. 2. It demonstrates that the Zn is well contained within the GalnAs layer. The required spacer layer thickness was estimated from previous observations of the movement of Zn in MOCVD-grown modulationdoped structures. The sharp cutoff of Zn shown in Fig. 2 indicates the absence of both significant memory effects from the diethylzinc, and of Zn diffusion into the InP layer. The memory characteristics were attributed to the reactor design, where a minimum length of piping is shared between the diethylzinc and the other gases, dead space has been minimised and the low-pressure/high-flow-rate combination serves to remove the volatile diethylzinc more efficiently.
DOUBLE-HETEROJUNCTION BIPOLAR TRANSISTORS IN InP/GalnAs GROWN BY METAL ORGANIC CHEMICAL VAPOUR DEPOSITION Indexing terms: Semiconductor devices and materials, Bipolar devices, Transistors, Vapour deposition Double-heterojunction bipolar transistor structures in InP/ GalnAs have been grown by low-pressure metal organic chemical vapour deposition. Good control of the Zn dopant in the GalnAs base layer was achieved, and devices with current gains up to 300 at current densities of l-4kA/cm2 have been demonstrated.
Device fabrication and characteristics: The basic generic device design is shown in Fig. 1. Selective etching using 4H 3 PO 4 :6HC1 (InP) and 50H2O : 5H 2 O 2 : 3H2SO4 (GalnAs) was employed in a first batch to sequentially etch down to the base and to the lower « + -InP buffer layer. A second batch had, in addition, a short diffusion of Zn into the exposed based layer through the etch windows in SiO2. This consisted of a 1 min-duration diffusion at 450°C in an open tube system using 20% by weight Zn dissolved in Ga as the source. The diffusion source also had 12% by weight Cd dissolved in In to improve the surface morphology.6 The contact metallisation was Cr-Au and Au-Ge for the p- and ncontacts, respectively, and the top and lower junction effective areas were 4-6 x 10~5cm2 for the diffused devices. The first batch of devices showed gains of up to 80 in the emitter-up configuration and gains much less than unity in the
Introduction: InP/GalnAs is receiving increasing recognition as a materials system suitable for the fabrication of heterojunction bipolar transistors (HBTs). As a result of the holeblocking emitter-base heterojunction, doping levels in the structure can be optimised for speed of response without affecting gain. This, together with the inherently high current drive capability of the bipolar transistor, makes this a promising device for high-speed digital and microwave applications. HBTs in this materials system are particularly attractive for integration with semiconductor lasers at 1-3 or 1-55 fxm. Previously, HBTs in lattice-matched InP/Gao.47Ino.53As (this composition will be assumed wherever GalnAs appears) have been fabricated by liquid-phase epitaxy,1 molecular beam epitaxy (MBE)2 and gas source MBE3 but, to the best of our knowledge, no reports have appeared on HBTs fabricated on InP/GalnAs solely using metal organic chemical vapour deposition (MOCVD). In common with MBE and gas source MBE, this technique offers the potential for the largearea thickness uniformity and control required for application to integrated structures. However, the difficulty with MOCVD in achieving controlled and abrupt doping profiles, particularly with p-type doping, has made it difficult to grow device structures such as the HBT which are sensitive to displacement of the pn junctions. The problem of unwanted diffusion when using Zn as the p-dopant is exacerbated in the InP/ GalnAs system because Zn moves much faster in InP than in AlGaAs.4 In this letter we report results on InP/GalnAs/InP double-heterostructure bipolar transistors (DHBTs) grown by MOCVD. A suitable npn structure has been achieved with the use of spacer layers and a reactor design which minimises memory effects. MOCVD growth: The material structure and device geometry are shown in Fig. 1. An MOCVD reactor manufactured by CVT Ltd. was used for the layer deposition. It employs an in-house-designed horizontal reactor cell with an RF-heated graphite susceptor. The reactor design was optimised to achieve abrupt heteroj unctions and good doping control.5*
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0 * PUETZ, N., HILLIER, c , and SPRINGTHORPE, A. J.: 'An inverted hori-
zontal reactor: growth of uniform GalnAs and InP by LPMOCVD', to be submitted to J. Cryst. Growth
ELECTRONICS LETTERS 27th August 1987
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05 0 75 depth, p m
1
Fig. 2 Zn doping profile relative to GalnAs base indicated by As profile
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emitter-down mode. Those devices which included the diffusion step in the processing exhibited gains up to 300 with the emitter up and 50 with the emitter down. This demonstrates the usefulness of the wide-gap diodes formed by the diffusion below the extrinsic base regions, which tends to block parasitic current injection in these regions, as first proposed by Kroemer.7 Typical 1CIVCE device characteristics from the second batch are shown in Fig. 3. The maximum current gain observed for this device was obtained at an emitter current density of ~l-4kA/cm 2 in the emitter-up configuration. A relation of the form /? ~ Z^1 ~1/n) is observed for this device, where /? is the common-emitter current gain and the ideality factor n = 1-6 for the emitter-base junction. In the emitterdown configuration, current gain roll-off was observed for Ic ^ 4 mA, which is thought to be due to the IR voltage drop between the emitter and active base region reaching a level where the extrinsic base region begins to inject current. Collector offset voltages were negligible in both configurations. This indicates that the metallurgical and electrical junctions are symmetric and the effective areas of the emitter and collector are equal.8 This is an important aspect for digital applications.
NOTTENBURG, R. N., TEMKIN, H., PANISH, M. B., a n d HAMM, R. A.:
'High gain InGaAs/InP heterostructure bipolar transistors grown by gas source molecular beam epitaxy', Appl. Phys. Lett., 1986, 49, pp. 1112-1114 SPRINGTHORPE, A. J., and SVILANS, M. N.: 'Low temperature zinc
diffusions in GaAs, GaAlAs, InP and GalnAs using a box diffusion technique', lnst. Phys. Conf. Ser., 1982, 65, GaAs and related compounds, London, pp. 589-596 BLAAUW, c , and MINER, C. J. : 'A gas mixing device for MOCVD', J. Cryst. Growth, in press EGER, D., SPRINGTHORPE, A. J., MARGITTAI, A., SHEPHERD, F. R., BRUCE,
R. A., and SMITH, G. M.: 'The effect of Zn on InP surfaces during diffusion', J. Electron. Mater., 1987,16, pp. 163-167 KROEMER, H.: 'Heterostructure bipolar transistors and integrated circuits', Proc. IEEE, 1982, 70, pp. 13-25 CHAND, N., FISCHER, R., and MARKOC, H.: 'Collector-emitter offset
voltage in AlGaAs/GaAs heterojunction bipolar transistors', Appl. Phys. Lett., 1985, 47, pp. 313-315
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8-BIT MICROPOWER ALGORITHMIC A/D CONVERTOR Indexing terms: Circuit theory and design, Switched-capacitor networks, A/D conversion A switched-capacitor algorithmic A/D convertor is described, in which the amplifier offset compensation is inherent to the circuit structure and the effect of clock-feedthrough is as low as 0-5 mV. Preliminary experimental results, obtained on circuits fabricated using a low-voltage CMOS technology, indicate 8-bit resolution for 15 kHz sampling frequency, with only 350/xW power consumption.
Fig. 3 Common-emitter characteristics of DHBT in InP/GalnAs in emitter-up configuration
In summary, we have demonstrated that, with proper reactor design and with the use of appropriate spacer layers, InP/GalnAs material grown by MOCVD is suitable for DHBT device fabrication. These devices will be useful for integration with other optical components and devices realisable using MOCVD in future integrated-optics applications. Acknowledgments: We are grateful to Surface Science Western for performing the SIMS measurements. This work was supported in part by the National Research Council of Canada through the Industrial Research Assistance Programme. P. A. HOUSTON*
26th June 1987
C. BLAAUW A. MARGITTAI M. N. SVILANS N. PUETZ D. J. DAY F. R. SHEPHERD A. J. SPRINGTHORPE Bell-Northern Research PO Box 3511, Station C Ottawa, Ontario, Canada K1Y 4HY
Introduction: A three-active-element (two amplifiers and one comparator) algorithmic A/D convertor1 with six ratiomatched capacitors has been reported in which the amplifier offset voltages have been compensated. Another realisation,2 based on the same principle but needing an extra precharge cycle, permitted compensation of the offset voltages and the resulting clock-feedthrough error in part. More complex circuitry3 using differential structures gave higher resolution, but at a cost of relatively high power consumption and large die area. In this letter a very simple micropower algorithmic A/D convertor, requiring only two inverter-amplifiers4 and three small unit capacitors, will be described. The amplifier offset is automatically cancelled in a two-clock-phase SC stage and a dummy half-sized switch keeps the resulting clockfeedthrough low enough to achieve the desired resolution. These stages may also be used as basic building blocks in other types of A/D convertor such as pipelined or subranging convertors. Basic building block: A simplified representation of the basic A/D SC building block is shown in Fig. 1. In this circuit A t represents a CMOS invertor-amplifier4 based on the principle of class AB amplification, and featuring a considerably higher efficiency compared to a classic differential input amplifier. Moreover, it has the property of no slew-rate limitation. Three
* On leave from the Department of Electronic & Electrical Engineering, University of Sheffield, Mappin Street, Sheffield SI 3JD, United Kingdom References 1
out
KAMBE, H., VLCEK, j . c , and FONSTAD, c. G.: '(InGa)As/InP n-p-n
heterojunction biplar transistors grown by liquid phase epitaxy with high DC current gain', IEEE Electron. Device Lett., 1984, EDL-5, pp. 172-175 2
SCHUITEMAKER, P., CLAXTON, P. A., ROBERTS, J. S., PLANT, T. K., a n d
HOUSTON, P. A. : 'InP/InGaAs double heterostructure bipolar transistors grown by MBE', Electron. Lett., 1986, 22, pp. 781-783
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Fig. 1 Basic A/D building block
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