Drain for Advanced MOS Architectures

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4. Background and motivation. • MASTAR User'Guide (ST). • S.D. Kim et al., IWJT'04. R cont. R sd. R ext. R ov. Rov. Impact of contact resistance. Target SOI R.
Metallic Source/Drain for Advanced MOS Architectures: from Material Engineering to Device Integration E. Dubois1, G. Larrieu1, N. Breil1-2, R. Valentin1, F. Danneville1, D. Yarekha1, N. Reckinger3, X. Tang3, A. Halimaoui2, R. Rengel4, E. Pascual4, A. Pouydebasque5, X. Wallart1, S. Godey1, J. Ratajczak6, A. Laszcz6, J. Katcki6, J.P. Raskin3, G. Dambrine1, A. Cros2, T. Skotnicki2 1

Institut d‘Electronique de Microélectronique et de Nanotechnologie, IEMN, Villeneuve d‘Ascq,France ST Microelectronics, Crolles, France 3 University of Louvain-la-Neuve, Belgium 4 University of Salamanca, Spain 5 CEA-LETI, Grenoble, France (formely with NXP France) 6 Instytut Technologii Elektronowej ITE, Warsaw, Poland 2

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Outline

 Background and motivation  Material Engineering  Modeling and simulation  Device integration/performance  Conclusion

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Outline

 Background and motivation  Material Engineering  Modeling and simulation  Device integration/performance  Conclusion

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Background and motivation Impact of contact resistance Target SOI Rc=70Ω.µm @ 22 nm Rov

Rcont

Rsd

Rov

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MASTAR User’Guide (ST) S.D. Kim et al., IWJT’04

Rext

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Background and motivation Constraints imposed toS/D architecture (ITRS’06, TN 18 nm) a) dopant solubility b) doping lateral abruptness

, xj=5.1 nm R=536 Ω/