DSP-Based Control of Grid-Connected Power Converters Operating

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DSP-Based Control of Grid-Connected Power Converters Operating Under Grid Distortions Marian P. Kazmierkowski, Fellow, IEEE, Marek Jasinski, Member, IEEE, and Grzegorz Wrona, Student Member, IEEE

Abstract—Power electronic Grid-Connected Converters (GCCs) are widely applied as grid interface in renewable energy sources. This paper proposes an extended Direct Power Control with Space Vector Modulation (DPC-SVM) scheme with improved operation performance under grid distortions. The real-time operated DPC-SVM scheme has to execute several important tasks as: space vector pulse width modulation, active and reactive power feedback control, grid current harmonics and voltage dips compensation. Thus, development and implementation of the DPC-SVM algorithm using single chip floating-point microcontroller TMS320F28335 is described. It combines large peripheral equipment, typical for microcontrollers, with high computation capacity characteristic for Digital Signal Processors (DSPs). The novelty of the proposed system lies in extension of the generic DPC-SVM scheme by additional higher harmonic and voltage dips compensation modules and implementation of the whole algorithm in a single chip floating point microcontroller. Overview of the laboratory setup, description of basic algorithm subtasks sequence, software optimization as well as execution time of specific program modules on fixed-point and floating-point processors are discussed. Selected oscillograms illustrating operation and robustness of the developed algorithm used in 5 kVA laboratory model of the GCC are presented. Index Terms—Digital signal processing (DSP), direct power control (DPC), floating-point microcontroller, grid-connected converters (GCCs), real-time control.

I. INTRODUCTION

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ECENTLY, development of Renewable Energy Sources (RES) arises from the requirement to increase the security of power supply, reduce greenhouse effect, emission of carbon dioxide, and avoid rain gases. Among the RES hydropower, wind energy and photovoltaic technology have the largest utilization nowadays. However, the main disadvantages of RES are the uncontrollability and limited availability (depend on weather conditions). Therefore, if these systems are not properly controlled, their connection to the utility can lead to grid instability or even failure. Moreover, the new standards for connection of the RES to the utility grid (called grid code and specified by national standards [2], [11]) requires more and more capability to run the system over short grid disturbances Manuscript received February 02, 2011; revised March 15, 2011; accepted March 19, 2011. Date of publication April 19, 2011; date of current version May 06, 2011. This work has been supported by NCBiR under Grant N R01 0014 06/2009. Paper no. TII-11-045. The authors are with the Warsaw University of Technology, Warszawa 00-662, Poland (e-mail: [email protected]; [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TII.2011.2134856

(unsymmetrical conditions, voltage dips) and to guarantee high-power quality (low grid current distortion and operation with unity power factor) [11]. These requirements can be met by a three-phase Grid-Connected power Converter (GCC) with appropriate control. Several generic control strategies for GCC has been developed [14], [15], [20]. The most popular is linear Voltage Oriented Control (VOC) in which power flow is controlled indirectly by active and reactive grid current components using linear PI controllers and Space Vector Modulator (SVM). The active and reactive dc currents are defined in synchronous rotating voltage oriented coordinates and are calculated from the measured grid ac currents using coordinate transformation. The SVM block, in every sampling period, generates switching sequence for the power transistors in such a way that average output voltage of the GCC is proportional to control signal delivered by PI controllers. Hence, the GCC operates with fixed switching frequency defined by sampling time. In a Direct Power Control (DPC) scheme, the active and reactive powers are controlled directly in closed loops using nonlinear hysteresis controllers and voltage selection table [14], [15], [20], [22]. The DPC has no modulator and simple structure, however, in the hysteresis control the transistor switching frequency varies with the GCC load changes and DC-side voltage pulsation. Therefore, protection and EMI filter design is difficult. In a Predictive Direct Power Control (P-DPC), the transistor switching states are selected by online minimization of predefined cost function based on predictive model [4], [10]. As a result, the GCC, like under DPC, operates with variable switching frequency. The proper operation of the predictive controller requires accurate system model and a large amount of online computation. The method presented in this paper called Direct Power Control with Space Vector Modulation (DPC-SVM) combines advantages of the VOC (linear PI controllers with SVM) and DPC schemes (simple structure without current control loops) [14], [15]. However, it should be stressed that all the above mentioned generic control schemes cannot meet grid code requirements regarding: Total Harmonic Distortion (THD) factor of the grid current below 5% under distorted grid voltage, specified voltage dips up to 90%. Especially, a single-phase voltage dips leads to system asymmetry and requires appropriate compensation algorithms. The expanding algorithm tasks–on the one side–and higher switching frequency of power semiconductor devices used in GCC–on the other side–requires larger computational capacity.

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Fig. 1. Power electronics GCC used as grid interface for RES.

Currently, the most popular in power electronics are Texas Instruments (TI) and Analog Devices (AD) processors with Altera flexible programmable gate array (FPGA). The FPGA gives interesting alternative to build specific DSP systems. In the case of TI, end-user has all peripherals in DSP, whereas in the case of AD all peripherals has to be added [24], [25]. Recently, the DSP producers not only increase the operation speed and computation capacity, but also expand their offer by specialized circuits. An example is Texas Instruments C2000 family which is widely used for control of power electronic converters in AC-drive systems and RES. To this family belong also the floating point TMS320F28335 which combines large peripheral equipment typical for microcontrollers with high computation capacities characteristic for digital signal processors. Additionally, the theory of real-time systems is systematically expanded [8], [21]. The block scheme of the developed control algorithm consist of the following modules: pulse width modulator (PWM), grid synchronization [Phase Locked Loop (PLL)], active and reactive power estimation, power and DC-side voltage feedback controllers, higher harmonics grid current compensator (HHC), and voltage dips compensator (VDC). Thus, the novelty of the proposed system lies in the extension of the generic DPC-SVM scheme by additional HHC and VDC compensation modules and implementation of the whole algorithm in a single-chip floating point microcontroller. Among the main features of the developed algorithm are: • direct control of active and reactive power flow; • constant switching frequency of power transistors; • robustness to grid disturbances like higher harmonics and voltage dips; • short execution time thanks to software optimization; • implementation of the full control and compensation algorithm in single-chip microcontroller. In this paper, the description of the 5 kVA laboratory setup, discussion on execution time minimization, and selected experimental oscillograms illustrating operation of the developed algorithm are presented. II. PRINCIPLE OF GRID-CONNECTED CONVERTER (GCC) OPERATION The power circuit of the GCC with AC input choke and output DC-side capacitor is shown in Fig. 1, while Fig. 2(a) shows is a grid voltage its single-phase representation [13], where is a grid current space vector, is the GCC space vector, is a space vector of voltage input voltage space vector, and drop on the input (AC grid side) choke and it resistance .

Fig. 2. Operation of the GCC: (a) single-phase equivalent circuit and (b) vector diagrams: 1) and 2) nonunity power factor operation; 3) and 4) unity power factor operation.

The voltage is controllable and depends on switching signals pattern and DC-side voltage level. Thanks to magnitude voltage control, the line current can be and phase of the controlled by changing the voltage drop on the input choke– . Therefore, inductances between grid and AC-side of the GCC are indispensable. They create a current source and provide boost feature of the GCC. Through controlling the converter in its phase and amplitude the AC-side voltage vector is controlled phase and amplitude of the line current vector indirectly. Further, in Fig. 2(b) are shown both rectifying and inverting vector diagrams of GCC. From this figure can be seen that the is higher during inverting than in rectifying magnitude of is a pure mode. With assumption of a stiff grid power (i.e., voltage source with zero internal impedance) terminal voltage of GCC can differ up to about 3% between rectifying and inverting modes [12]. III. CONTROL SCHEME OF GCC A. Basic Scheme of DPC-SVM Algorithm The block scheme of basic version DPC-SVM algorithm is shown in Fig. 3(a). It consist of the following blocks: SVM, cofrom synchronous rotating ordinate transformation into stationary coordinates , Active and Reactive Power estimator, and three feedback control loops (active and reactive powers as well as DC-side voltage ). The command value –DC-side voltage PI of the active power is generated by for unity power controller, whereas reactive power is factor operation condition. B. Active and Reactive Power Estimator Using complex notation, the instantaneous power in threephase, three-wire system can be expressed as [1]

(1) (2)

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Fig. 4. PLL with normalized grid voltage vector position and coordinate transformation dq= .

Fig. 3. GCC interfacing RES: (a) basic block scheme of DPC-SVM and (b) grid voltage vector representation in stationary  and synchronous rotating pq coordinates.

where is the conjugate grid current vector with definition of the grid voltage vector [Fig. 2(a)] (3) and grid current vector as Fig. 5. DPC-SVM block scheme of Fig. 3 with VDC and higher harmonic compensation (HHC) modules.

(4) to zero and synchronizes The PI controller reduces coordinates with grid voltage vector [see Fig. 3(b)].

the instantaneous power can be computed as [1], [2] (5) (6) where

and

are the grid current vector components.

C. Coordinate Transformation and PLL The command voltage vector generated by active and reactive power controller is expressed in synchronous rotating coordi. Therefore, before using in the SVM block for nates AC-DC converter control, in the case, it has to be transformed into stationary coordinates (7) –is a position of the grid voltage vector in where coordinates [Fig. 3(b)] respect to axis of the stationary calculated in PLL, as shown in Fig. 4. In the PLL block, the positive sequence component is coordinates calculated from the measured grid voltages in using inverse transformation (8)

IV. BLOCK SCHEME OF EXTENDED DPC-SVM To meet standards and grid code requirements relating to power quality and operation of the GCC under distorted grid voltage, it is necessary to introduce into basic DPC-SVM scheme of Fig. 3 two additional modules: higher harmonic compensator and voltage dips compensator (Fig. 5). A. Voltage Dips Compensator (VDC) Voltage dips are a phenomena caused mainly by three reasons: short-circuits faults in different points of power system, nonlinear loads connected to power system, and connecting of large loads (e.g., high-power drives). The duration of voltage dips can, according to European standards EN 50160, be classified as [11]: — short (up to few seconds) and shallow (below 60%); — short and deep (more than 60%); — long (above few seconds) and shallow (below 60%); — long and deep (more than 60%). Sudden voltage changes can cause problems in control of the grid-connected converter such as: DC-side voltage oscillations, distorted and asymmetric AC currents, active and reactive powers oscillations.

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Fig. 6. Block scheme of Voltage Dips Compensation (VDC) algorithm.

In case of voltage asymmetry, the voltage space vector (in steady-states) is described by two phasors: with negative and positive angular frequency

Fig. 7. Filtering process of negative grid voltage component using cascaded notch and low-pass filters.

(9) where

and

are complex value (10) (11)

Among different types of voltage dips, the most popular are: • type A—all phase voltages drop in the same amount of magnitude; • type B—only one voltage drops in magnitude; this type of dip contains zero sequence component; • type C—two-phase voltages drop in magnitude and change in phase shift; • type D—two-phase voltages drop in magnitude and change in phase shift, third-phase voltage dips in magnitude; this type of dips contain negative sequence components. The block scheme of VDC algorithm is shown in Fig. 6. The calculation from (3) measured grid voltage components and are delivered to positive and negative sequence estimators. At the input of both estimators, a coordinate transforwith positive and negative mation grid voltage position angle is used, respectively. The negative coordinates voltage component (11) in the positive rotating appears as 100 Hz signal which has to be separated and eliminated from control and synchronization blocks. Therefore, appropriate filtering is used. For dynamic performance improvement, in both estimators series connected notch filter 100 Hz with low-pass filter 30 Hz is applied. The filtering process of negative grid voltage component is shown in Fig. 7. B. Higher Harmonic Compensator (HHC) In order to feed sinusoidal currents into grid under distorted grid voltage a HHC operating in multi-reference system is used for each harmonics that should be eliminated [2], [6], [7], [17]. The block diagram of higher harmonic compensator HHC is

Fig. 8. Block scheme of the HHC for k

= 5 and 7.

shown in Fig. 8. The distorted grid voltage with th harmonics can be expressed as

(12) (13) (14) (15) , where These harmonics lead to grid currents distortion with the same frequencies. The HHC consists of coordinate transformation from into synchronously coordinates rotating with th harmonic to be compensated. In this way, the harmonics are transferred to DC-signals, and an integral controller is used to reduce this component to zero. Hence, the th current harmonic is eliminated. The controller outputs generate necessary compensating and, therefore, voltage in synchronous rotating coordinates are included. a second coordinate transformation blocks

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The compensation voltages and are summed and added to the GCC reference voltage which is used by the space vector modulator SVM to calculate the duty cycles of the power transistors. The controller for compensation th harmonic should be sufficiently slow, thus not trying to act on these frequencies. In practice, an integrator with finite DC gain can be used (16) is the gain factor. It can be designed based on the where bandwidth specification [17] (17) is required step response time for th harmonic where is the number of grid periods . The time and is given by constant (18) Fig. 9. Laboratory setup.

is the desired damping of the th harmonic deterwhere mining the loop gain at frequency . V. EXPERIMENTAL RESULTS

TABLE I MAIN PARAMETERS OF THE LABORATORY SETUP

A. Laboratory Setup Overview The laboratory setup consist of a commercial Danfoss 5 kVA PWM converter interfacing grid with Renewable Energy Sources (RES). Both systems are connected through the LC filter and separation transformer. On the laboratory setup, the RES function performs asynchronous generator controlled by another converter connected to the DC-side of GCC (back to back). The laboratory setup has two separated parts: high-voltage power circuit and low-voltage measurement-control system. Control signals from the microcontroller are transmitted to the converters through a fiber-optic interface, while current and voltage measurements are based on LEM’s transducers and isolation amplifiers ISO124. Block diagram of laboratory setup is shown in Fig. 9. A programmable power supply of California Instruments 5000iX delivers adjustable AC voltage. Thanks to the individual control of each phase, it allows to simulate any voltage dips and higher harmonics disturbances with repeatable and controlled conditions. Parameters of the laboratory setup are presented in Table I. The control methods: DPC-SVM with voltage dips and higher harmonics compensation as well as generator side converter control algorithm (Direct Torque Control with Space Vector Modulation DTC-SVM) were implemented on single microcontroller TMS320F28335. This microcontroller is a 32-bit floating-point DSP unit belonging to the C2000 Delfino family of Texas Instruments. Its basic parameters are summarized in Table II. Algorithm Implementation The control and compensation algorithm described in the previous sections has been programmed in C-language and assembler. The microcontroller clock frequency was set to 150 MHz. Both converters used 12 PWM outputs, set to 10 kHz frequency.

In addition, seven ADC channels were used to measure voltages and currents, which were triggered at the appropriate instant by one of the PWM channels with the same frequency. The overall structure of the algorithm is shown in Fig. 10. It includes a set of procedures and microcontroller configuration functions which are closed by while loop. The algorithm is initialized by interrupt routine taken from PWM module. Interrupt is called when the PWM counter is reset (Fig. 10). The PWM counter operate in up-down mode; this allows to generate symmetrical PWM pulses required in space vectors modulators. The analog-to-digital converters ADC are also synchronized with PWM counter. B. Experimental Results The control algorithm has been tested on the laboratory setup (Fig. 9).

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TABLE II SPECIFICATION OF THE DIGITAL CONTROLLER

Fig. 11. Time diagram of the PWM configuration.

Fig. 10. Overall structure of the control algorithm with all modules.

Fig. 12 shows the waveforms during operation in inverting mode. It shows response to voltage dips from 100 to 20 V in two-phase. On the upper waveform there are DC-side voltage and phase currents of RES-generator. Waveform on the lower oscillogram shows phase voltage and three-phase currents of the GCC. is in opposite phase to the grid voltage Note, that current showing only active power flows. This corresponds to Unity Power Factor (UPF) operation of the GCC. Reactive power in in Fig. 3). However, in a general this case is set to zero ( can be adcase the command value of the reactive power justed by the outer power management system to support grid stability [5]. Moreover, in both figures, the currents are nearly sinusoidal shape with low harmonic distortion. In addition, at the beginning and at the end of the voltage dip there are small overshoots of the currents which proves that the process runs properly. It should be noted that the distortion does not affect the machine currents,

Fig. 12. Experimental oscillogram illustrating dynamic operation of the converter under 80 ms voltage dips. 1-DC-side voltage Udc [100 V/div]; 2, 3, 4- induction machine currents Isa, Isb, Isc [5 A/div]); 5- line voltage Ua [100 V/div]; 6, 7, 8- line currents Ia, Ib, Ic [5 A/div].

because it is decoupled from the grid side by DC-side voltage controlled on desired level. Fig. 13 shows the operation of the HHC algorithm module under distorted grid voltage (by higher harmonics). It can be seen that without HHC module, the grid current distormeasured by Total Harmonic Distortion factor is: tion

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TABLE IV EXECUTION TIME OF THE SELECTED OPERATION

Fig. 13. Operation of the higher harmonics compensation algorithm. (a) Operation before switching the line current compensation. (b) Sinusoidal currents after switch on compensation algorithm.

TABLE III EXECUTION TIME SELECTED COMPONENTS OF THE CONTROL ALGORITHM

and after the HHC algorithm is switched on, the THD is reduced to 5%. The entire program is executed in one interrupt triggered by the PWM interface (Fig. 11). C. Discussion on Algorithm Execution Time In real-time systems extremely important is the program execution time. For proper operation, it is required to calculate new values for the PWM module before the next power transistors are switched on. In Table III, execution time of the partial components of the control algorithm are shown. Measurements were performed on the TMS320F28335 microcontroller using three different libraries to compare the execution time of the new floating-point microcontroller with popular fixed-point version

TMS320F2812. The program execution time has been measured by a built in timer. The second column contains the execution time with using IQmath library which is designed to perform floating-point operations on fixed-point processors. This approach is also called “virtual floating point” [23] and involves the presentation of float numbers as 32-bit fixed-point number. Characteristic feature of such representation is the same precision for the whole range of numbers, what was presented in [23]. The user must choose a compromise between precision and range of numbers. In this case, general Q value was set to 18 and in some operations was increased to 24, e.g., trigonometric operations. Code based on the IQmath library can be easily transferred from the fixed-point system to floating and opposite by just changing one line of code. The middle column of Table III shows execution times achieved using standard built-in library. The last column contains the execution times of the program using fastRTS library which is a collection of optimized floatingpoint math functions for C28x floating-point microcontrollers. As it can be seen, the solution with is in some cases faster than using the floating-point unit with standard library. It is caused by time consuming division and some of trigonometric functions especially atan2 ,as shown in Table IV. This function has variable execution time ranging from 3.5 us up to 7 us. In the table, average values are given. On the other hand, with the IQmath approach, conversion from integer to IQ format and opposite is a time-consuming operation. This is apparent for the measurement and PWM update procedures. The fastest algorithm on the floating-point unit is performed using the library fastRTS. The precision of each numerical representation is enough for this application and has no influence on the algorithm operation. VI. CONCLUSION A novel control scheme for Grid-Connected Converters (GCC) used as grid interface for Renewable Energy Sources (RES) has been presented in this work. It is based on generic Direct Power Control with Space Vector Modulation (DPC-SVM) control scheme and is expanded by additional modules for grid voltage dips compensation (VDC) and higher harmonics of grid current neutralization (HHC). Among the important features of the developed algorithm are: • direct control of active and reactive power flow; • constant switching frequency of power transistors; • robustness to grid disturbances like higher harmonics and voltage dips;

KAZMIERKOWSKI et al.: DSP-BASED CONTROL OF GRID-CONNECTED POWER CONVERTERS OPERATING UNDER GRID DISTORTIONS

• short execution time thanks to software optimization; • implementation of the full control and compensation algorithm in single-chip low cost floating-point microcontroller TMS320F28335. Experimental oscillograms measured on the 5 kVA laboratory converter verify the properties of the developed control algorithm. REFERENCES [1] H. Akagi, E. H. Watanabe, and M. Aredes, Instantaneous Power Theory and Applications to Power Conditioning. New York: Wiley, 2007. [2] H. Akagi, “Modern active filters and traditional passive filters,” Bulletin of the Polish Academy of Sciences, Technical Sciences, vol. 54, no. 3, pp. 255–269, 2006. [3] S. Alepuz, S. Busquets-Monge, J. Bordonau, J. A. Martínez-Velasco, C. A. Silva, J. Pontt, and J. Rodríguez, “Control strategies based on symmetrical components for grid-connected converters under voltage dips,” IEEE Trans. Ind. Electron., vol. 56, no. 6, pp. 2162–2173, Jun. 2009. [4] P. Antoniewicz and M. P. Kazmierkowski, “Predictive direct power control of three-phase boost rectifier,” Bulletin of The Polish Academy of Sciences, Technical Sciences, vol. 54, no. 3, pp. 287–292, 2006. [5] M. H. J. Bollen, Understanding Power Quality Problems. Piscataway, NJ: IEEE Press, 2000. [6] M. Bobrowska-Rafal, K. Rafal, G. Abad, and M. Jasinski, “Control of PWM rectifier under grid voltage dips,” Bulletin of the Polish Academy of Sciences, Technical Sciences, vol. 57, no. 4, pp. 337–343, 2009. [7] R. D. Bojoi, G. Griva, V. Bostan, M. Guerriero, F. Farina, and F. Profumo, “Current control strategy for power conditioners using sinusoidal signal integrators in synchronous reference frame,” IEEE Trans. Power Electron., vol. 20, no. 6, pp. 1402–1412, 2005. [8] Y. Chen, C. Yang, and T. Kuo, “Energy-Efficient task synchronization for real-time systems,” IEEE Trans. Ind. Informat., vol. 6, no. 3, pp. 287–301, Aug. 2010. [9] M. Cichowlas, M. Malinowski, D. L. Sobczuk, M. P. Kazmierkowski, P. Rodríguez, and J. Pou, “Active filtering function of three-phase PWM boost rectifier under different line voltage conditions,” IEEE Trans. Ind. Electron., vol. 52, no. 2, pp. 410–419, Apr. 2005. [10] P. Cortes, J. Rodriguez, P. Antoniewicz, and M. P. Kazmierkowski, “Direct power control of an AFE using predictive control,” IEEE Trans. Power Electron., vol. 23, no. 5, pp. 2516–2523, 2008. [11] “En-50160,” in Voltage Characteristics of Electricity Supplied by Public Distribution Systems. Brussels: CENELEC, 1994. [12] S. Hansen, M. Malinowski, F. Blaabjerg, and M. P. Kazmierkowski, “Sensorless control strategies for PWM rectifier,” in Proc. IEEE 15th Annu. Appl. Power Electron. Conf. Expo., New Orleans, LA, Feb. 2000, vol. 6–10, pp. 832–838. [13] M. Jasinski, G. Wrona, and M. P. Kazmierkowski, “AC-DC-AC converter with induction machine-modeling and implementation on floating point DSP as a cost effective interface for renewable energy applications,” in Proc. IEEE-ISIE2010, Bari, Italy, Jul. 2010, vol. 4–7, pp. 620–625. [14] M. P. Kazmierkowski, R. Krishnan, and F. Blaabjerg, Control in Power Electronics. New York: Academic, 2002. [15] M. Malinowski and M. P. Kazmierkowski, “Simple direct power control of three-phase PWM rectifier using space vector modulation—A comparative study,” EPE J., vol. 13, no. 2, pp. 28–34, Sep. 2003. [16] M. Malinowski, M. Jasinski, and M. P. Kazmierkowski, “Simple direct power control of three-phase PWM rectifier using space-vector modulation (DPC-SVM),” IEEE Trans. Ind. Electron., vol. 51, no. 2, pp. 447–454, Apr. 2004. [17] P. Mattavelli, “A closed-loop selective harmonic compensation for active filters,” IEEE Trans. Ind. Appl., vol. 37, no. 1, pp. 81–89, 2001. [18] K. Rothenhagen, M. Jasinski, and M. P. Kazmierkowski, “Grid connection of multi-megawatt clean wave energy power plant under weak grid condition,” in Proc. 13th Int. Power Electron. Motion Control Conf., EPE-PEMC, Poznan, Poland, 2008, pp. 1927–1933. [19] L. A. Serpa, S. Ponnaluri, P. M. Barbosa, and J. W. Kolar, “A modified direct power control strategy allowing the connection of three-phase inverters to the grid trough LCL filters,” IEEE Trans. Ind. Appl., vol. 43, no. 52, pp. 1388–1399, Sep./Oct. 2007.

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[20] R. Teodorescu, M. Liserre, and P. Rodriguez, Grid Converters for Photovoltaic and Wind Power Systems. New York: Wiley, 2011. [21] Y. Wu, G. Buttazzo, E. Bini, and A. Cervin, “Parameter selection for real-time controllers in resource-constrained systems,” IEEE Trans. Ind. Informat., vol. 6, no. 4, pp. 610–620, 2010. [22] D. Zhi, L. Xu, and B. Wiliams, “Improved direct power control of gridconnected DC/AC converters,” IEEE Trans. Power Electron., vol. 24, no. 5, pp. 1280–1292, May 2009. [23] C28x IQmath Library V1.5c Texas Instruments, 2008, PDF document. [24] [Online]. Available: http://www.analog.com/en/index.html [25] [Online]. Available: http://www.altera.com/support/examples/exmlist.jsp?cat=dsp

Marian P. Kazmierkowski (M’89–SM’91–F’98) received the M.S., Ph.D., and Dr.Sci. degrees in electrical engineering from the Institute of Control and Industrial Electronics (ICIE), Warsaw University of Technology, Warsaw, Poland, in 1968, 1972, and 1981, respectively. From 1987 to 2008, he was Director of ICIE. Since 2003, he has been Head of the Centre of Excellence on Power Electronics Intelligent Control for Energy Conservation—PELINCEC at ICIE. Dr. Kazmierkowski was the recipient of an Honorary Doctorate degree from Aalborg University in 2004 and from the Institut National Polytechnique de Toulouse, France, in 2010. In 2005, he received the Dr.-Ing. Eugene Mittelmann Achievement Award by the IEEE Industrial Electronics Society and in 2007 the SIEMENS Research Award in Poland. In 2007, he was elected as Corresponding Member of the Polish Academy of Science. He was the Editor-in-Chief of the IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS (2004–2006). Currently, he is Dean of the Technical Science Department, Polish Academy of Science.

Marek Jasinski (S’01–M’04) received the M.Sc.E.E. degree with SEP and IEEE Poland Section (PS) distinction, and the Ph.D. degree in electrical engineering from the Institute of Control and Industrial Electronics (ICIE), Warsaw University of Technology (WUT), Warsaw, Poland, in 2000 and 2005, respectively. Since 2006, he has been with the ICIE, WUT, as an Assistant Professor. His research activity deals with control of power electronics converters for drives and renewable energy sources (wind and low-head turbines). Since 2006, he has been working on power take off train for renewable energy sources (i.e., power electronics energy conversion and generator control). He is an author or coauthor of more than 60 technical papers. He was at Aalborg University, Denmark, as a Guest Researcher of the VESTAS Power Program, in 2009. Dr Jasinski is Chair of IEEE PS IES/PELS Chapter (Awarded in 2010) and the IEEE Poland Section Chapters Coordinator. He was a scholar at the Center for Advanced Studies, WUT, and also of the Foundation for Polish Science. He received ABB distinction for his Ph.D. dissertation, SIEMENS Research Award.

Grzegorz Wrona (S’10) received the M.Sc.E.E. degree in electrical engineering from the Institute of Control and Industrial Electronics, Warsaw University of Technology (WUT), Warsaw, Poland, in 2010. Currently, he has been working towards the Ph.D. degree in electrical engineering at WUT since 2010. His research interests include power converters applied to renewable energy applications, control of power electronic converters and industrial drives, power quality in renewable generation plants and DSP microcontroller.