June 1, 2011 / Vol. 36, No. 11 / OPTICS LETTERS
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Efficient broadband silicon-on-insulator grating coupler with low backreflection Neil Na,1,* Harel Frish,2 I-Wei Hsieh,1 Oshrit Harel,2 Roshan George,1 Assia Barkai,2 and Haisheng Rong1 1
Intel Corporation, 2200 Mission College Blvd, Santa Clara, California 95054, USA 2 Micron, 2 Tzoran Blvd, Qiryat-Gat 82109, Israel *Corresponding author: yun‑
[email protected] Received April 12, 2011; revised April 30, 2011; accepted April 30, 2011; posted May 2, 2011 (Doc. ID 145453); published May 31, 2011
We design and fabricate an efficient broadband grating coupler on a 400 nm thick silicon-on-insulator wafer. The measured coupling loss is 3 dB when coupling to a single-mode fiber at 1310 nm wavelength with TE polarization. The spectral FWHM and backreflection are determined to be 58 nm and −27 dB, respectively. © 2011 Optical Society of America OCIS codes: 050.2770, 060.1810, 130.0130.
Coupling light into and out of submicrometer siliconon-insulator (SOI) photonic integrated circuits (PICs) with high efficiency is in general difficult because of the small waveguide mode size. One solution to this problem is to form a surface grating by periodically etching the SOI waveguide in order to diffract light toward the surface-normal direction. Unlike edge coupling where polished facets are required, this approach enables wafer-level testing of PICs, which is essential for highvolume manufacturing. In the literature, high efficiency grating coupler (GC) structures have been extensively investigated [1–6], focusing mostly on the enhancement of directionality (fraction of power diffracted upward) or the improvement of mode matching (between GC and single mode fiber (SMF). The feasibility of perfectly vertical couplings [7,8] and alternative through-etched structures [9–11] have also been reported. However, backreflection, a property that is important for GCs being integrated with other optoelectronic devices, has received less attention. Although a highly efficient GC may feature backreflection of only a few percent [6], this level of reflected light is not acceptable in certain PIC configurations. For example, backreflection-induced instability is detrimental in PICs involving integrated lasers [12]. As another example, when the spectral responses of PIC components are measured [13], the interference fringes caused by back-reflections can obscure the testing results and introduce significant errors. In this Letter, we present the design, fabrication, and characterization of an efficient broadband SOI GC that also features low backreflection at the same time, and show that the experimental data are in excellent agreement with the numerical simulations. Another distinct feature of our GC is it performs well on a thicker SOI that could support multiple vertical modes (e.g., 400 nm SOI supports two vertical modes). Such a property permits flexibility in choosing SOI thickness suitable not only for GCs but also other PIC components. To convey the concept behind our GC design, we first examine a conventional GC as shown in Fig. 1(a). The diffracted optical power toward the superstrate is maximized by optimizing the etch depth, trench width, and grating period using a two-dimensional (2D) finitedifference-time-domain (FDTD) method, and the simulation results are shown in Fig. 1(b). The thicknesses of 0146-9592/11/112101-03$15.00/0
oxide cladding and buried oxide are both 1 μm. The refractive indices of silicon and oxide at 1310 nm wavelength are 3.508 and 1.447, respectively. The SOI thickness is assumed to be 400 nm, which is compliant with a hybrid laser design [12] to achieve maximal lasing efficiency. Note that 30 grating periods are used in the simulations. We calculate the superstrate power by first exciting the waveguide with TE fundamental mode, and then recording the power detected by a Poynting vector monitor until the fields stabilize. The monitor covers the entire grating region and is located in air with 0:1 μm distance to the top of oxide cladding. For this conventional GC design, the maximum superstrate power of −1 diffraction order is calculated to be 56% at ½etch depth; trench width; grating period ¼ ½220 nm; 350 nm; 500 nm; the backreflection is calculated to be 11%; the emission angle in oxide cladding is 12:5°. We further investigate the cause of strong backreflection, and found two major causes. First, the mode of grating region is pushed downward because of silicon etch, which results in a large mode mismatch to the mode of input waveguide. Second, due to geometric constraint, the effective indices of grating region and input
Fig. 1. (Color online) (a) Schematic plot of a conventional GC. (b) Fraction of power diffracted upward as a function of trench width and grating period, given 55% etch depth. Trench width is normalized by grating period and etch depth is normalized by 400 nm. © 2011 Optical Society of America
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Fig. 2. (Color online) (a) Schematic plot of a modified GC. (b) Fraction of power diffracted upward as a function of trench width and grating period, given 55% etch depth. Trench width is normalized by grating period and etch depth is normalized by 400 nm.
waveguide are inevitably mismatched and cannot be amended. Based on these two observations, we introduce a modified GC where the input waveguide thickness is reduced to 200 nm, as shown in Fig. 2(a). The simulation results are shown in Fig. 2(b). Now at ½etch depth; trench width; grating period ¼ ½220 nm; 350 nm; 500 nm, the maximum superstrate power is enhanced to 76%; the backreflection is diminished to 0.4%; and the emission angle in oxide cladding is still 12:5°. More calculations on mode overlapping and effective index show that indeed in this design the mode mismatch and index mismatch between grating region and input waveguide are largely eliminated. Based on the above studies, we propose a new concept for designing a GC with low backreflection. The structure is illustrated in Fig. 3, where the rib waveguide mode is adiabatically coupled to the slab waveguide mode by a rib tip. While in principle four parameters can be optimized in this design (etch depth, trench width, grating period, and grating height), in this work we use only one mask to define the grating and rib waveguide simultaneously, i.e., controlling only trench width and grating period for simplicity. This partial implementation sacrifices the optimizations of etch depth and grating height, but suffices to demonstrate the proposed design concept. In this case, the maximum superstrate power is 70%; the resultant backreflection is 0.3%; and the corresponding emission angle in oxide cladding is 14°.
Fig. 3. (Color online) Schematic plot of the proposed GC design concept.
The proposed GC structure is fabricated on a 400 nm SOI wafer with 1 μm buried oxide. The process starts with preparing hard mask layers that consist of 2500Å thick SiO2 and 600Å thick Si3 N4 . The patterns of grating and rib waveguide are done simultaneously with a deep UV 193 nm lithography. The hard mask layers are etched by a plasma etcher, using a C4 F6 and CH2 F2 chemistry. The silicon etch is then done by another plasma etcher with Cl2 and HBr chemistry to define the 200 nm deep grating and rib waveguide. After removing the hard mask layers, a second lithography and subsequent Si etch until buried oxide is applied to define the slab waveguide. Oxide cladding is then deposited via high aspect ratio process to avoid forming voids in between the grating lines. In Figs. 4(a) and 4(b), we show the scanning electron microscope (SEM) images of the processed grating and rib tip with cladding removed. The trench width is 325 nm and the grating period is 500 nm. The rib tip width is 100 nm and the rib waveguide width is 380 nm. We use a commercial SMF fiber array (FA) to probe two GCs connected by a U bend. A broadband superluminescent light emitting diode (SLED) source at 1310 nm is used for input illumination, and an optical spectrum analyzer is used for spectral measurement. A polarization controller is used to maximize the transmitted power. In Fig. 5, we show a typical spectrum of the fabricated devices, where the total GC to SMF coupling loss (per coupler) is plotted as a function of wavelength. Note that other losses (waveguide scattering/bending, FA, connector) are independently measured and excluded in Fig. 5. Based on our calculations, the mode mismatch between GC and SMF results in a 1:5 dB coupling loss, and therefore the superstrate power is estimated to be ∼70% at the spectrum peak. This is in excellent agreement with our numerical simulation. A broadband response is also observed, featuring 10 nm 0:1 dB full width and 58 nm 3 dB full width. The spectrum peak shifts slightly to 1314 nm, which is caused by using a FA polished at 12°, whereas the optimum is 14°. We have also characterized our devices using a FA with SMF input and multimode fiber (MMF) output. A 1:5 dB GC to MMF out-coupling loss is measured, which suggests the out-coupling loss due to mode-mismatch is negligible in this case. In addition,
Fig. 4. SEM images of (a) grating and (b) rib tip, with oxide cladding removed.
June 1, 2011 / Vol. 36, No. 11 / OPTICS LETTERS
Fig. 5. (Color online) Measured GC spectrum when interfacing a SMF. Inset, measured etalon fringes at spectrum peak.
a >60 nm 0:5 dB full width is observed. These data show that our GC is suitable for applications where SMF in or out coupling or MMF out-coupling is used. To measure the backreflection, we use a tunable laser and a large-area photodetector to sweep the wavelengths of interest. Such a setup offers a high spectral resolution so that the fringes caused by etalon effect can be clearly resolved. As shown in the inset of Fig. 5, clean fringes are observed with 0:14 nm free spectral range, which corresponds well to the total length (1:5927 mm) and the group index (3.7979) of our rib waveguide. The average fringe contrast is 0:02 dB and the corresponding backreflection is then calculated to be −27 dB with waveguide loss (2:6 dB=cm) taken into account. To the best of our knowledge, this is the lowest backreflection from SOI GC experimentally reported to date. Note that the simulated backreflection is higher than the measured result because the FDTD power monitor inevitably collects some scattered light from the surroundings. We have also performed a wafer-level testing on the processed 200 mm (8 in:) wafer to examine the uniformity of GC performance. The within-die GC loss variation is plotted as a function of die location in Fig. 6, and is determined to be mostly smaller than 0:1 dB except for some edge dies. Note that from the design point of view, our GC is robust against fabrication imperfections as the trench width and grating period are chosen to minimize not only the insertion loss but also the gradient of insertion loss. These data show that our GC is suitable for testing SOI PICs at the wafer level as it possesses very low backreflection and excellent performance uniformity. To summarize, we have presented the design, fabrication, and measurement of an efficient broadband SOI GC with low backreflection, fabricated on a 400 nm SOI and operated at 1310 nm wavelength with TE polarization. This is achieved by connecting the rib waveguide mode and slab waveguide mode adiabatically via a rib tip, and therefore largely eliminates the mode mismatch and index mismatch between the grating and waveguide regions. Note that this design concept is especially useful on making GC on a thicker SOI waveguide, which is commonly believed to feature inferior GC performance. The total coupling loss is measured to be 3 dB when interfacing a SMF for in or out-coupling and 1:5 dB when interfacing a MMF for out-coupling. A large spectral FWHM of 58 nm and a low backreflection of −27 dB are observed.
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Fig. 6. (Color online) Standard deviation of within-die GC loss plotted as a function of die location.
In addition, we characterize the wafer-level performance of our GCs on an 200 mm wafer and conclude
