Efficient model-based parametric yield optimization. STForum. Thierry Lachaud.
STMICROELECTRONICS. 16 rue Pierre et Marie CURIE. BP7155.
Efficient model-based parametric yield optimization STForum
Thierry Lachaud STMICROELECTRONICS 16 rue Pierre et Marie CURIE BP7155 37071 TOURS cedex2
Contents State of the art The InfiniScale flow - Modeling - Sizing - Parametrical Yield optimization
Application : LDO Conclusion
Today’s proposed solutions 1- Corners & Manual
2- Simulator-based
Electrical simulator
Optimizer
3- Global Model-based Electrical simulator
Modeler
Optimizer
Corners-based approach Large number of simulations Possible over-design Risky Sizing takes too much time Limited Yield at nanometer scale
Simulator-based Optimization Electrical simulator
Optimizer
1- Limited to very fast simulated circuits 2- Huge # of simulation 3- One-shot solution 4- Limited analysis possibility 5- Limited yield analysis 6- Possible over-design with worst-case optimization 7- But, simulator-proven
Global Model-based yielding Electrical simulator
Modeler
Optimizer
1. No over-design 2. Could consider D, P, VT, M SPECS = F(D,P,V,T,M) in the same time 3. Not limited to circuit size and the only-approach for long simualtion 4. Limited # of simulations 5. Full analysis capability 6. Global model-based optimization 7. Difficulty of full domain modeling! 8. Accuracy of models!
LYSISTM design flow Design environment Schematic editor Netlist or/and Raw data
Advanced modeling
Optimized design solution
Simulator of choice Eldo™ , Spectre™, HFSS™ Hspice, other ..
Lysis™
Import design
Simulation results
TechModeler™
Analysis, Optimization
TechAnalyzer™ TechSizer™
Yield Optimization
TechYielder™
TechModeler : WHAT IT DOES TM
Parameters DESIGN X1=LCHANN, X2=WCHANN … XN=R
CIRCUIT + SIMULATOR (Eldo™ , Spectre™, HFSS™ Hspice, other ..)
PROCESS + ENVIR.
TechModelerTM
P1=ToxN, P2=VthN … PM=Temp
MISMATCH M1, M2
PERFORMANCES Y1=Delay, Y2=Power, Y3=PSRR, YK=Gain
Yi = Fi(D,P,V,T,M)
LDO: Modeling
TechAnalyzerTM : EXPLORE YOUR DESIGN INPUT VARIABLES
RANGES
DISTRIBUTION
TechAnalyzerTM MODEL: YK=FK(XN, VT, PM)
LCL
UCL
100% 80% 60% 40% 20% 0%
First order Total order
TechAnalyzerTM : EXPLORE YOUR DESIGN
MC analysis PLayer
TechSizerTM : Efficient Multi-objective optimizer INPUT RANGES & STATISTICS
INPUT & OUTPUT CONSTRAINTS SPECS & TARGETS
DESIGN SPACE
TechSizerTM OPTIMIZE: YK=FK(XN, VT, PM)
GLOBAL OPTIMIZATION
Realistic Corners
Minutes only to resize your design
OPTIMAL DESIGN
TechYielder : MAXIMIZE YOUR YIELD TM
INPUT RANGES & STATISTICS
CONSTRAINTS
TechYielderTM
SPECS & TARGETS
MAXIMIZE YIELD & ROBUSTNESS Robust design
High risk design FROM HERE
TO HERE
Global Model-based yielding LSL
USL
10000, 20000 MC, … or more! to estimate yield at each iteration
RESULTS LDO regulator: Performances: gain margin, phase margin, Power Supply Rejection Ratio (PSRR) at different frequencies
Modeling results With only 40 simulations for modeling Model
Mean relative error on modeling data
Phase margin
0.34%
Gain Margin
0.41%
PSRR 10Hz
0.1%
PSRR 10KHz
0.28%
Conclusion Behavioral Modeling: - Advanced Modeling of highly non linear phenomena - Accurate Modeling of high # of parameters - Automatic modeling of Analog circuits: D, P, VT, M
Model-based Sizing: -
Multi-objective optimization All parameters (inputs, outputs) could be constraint Simple and intuitive Mainly used for MEMS, Passive, RF, …
Model-based DFY: - Multi-objective statistical optimization - Design centering, Yield optimization, Risk Reduction - Approved on 90, 65 and 45n
