Efficient parallel modular multiplication method using ...

Asia-pacific Proceedings of Applied Science and Engineering for Better Human Life Vol.4 (2016) pp. 111-115

Efficient parallel modular multiplication method using signeddigit recoding Maryam Moayedi1, Abdalhossein Rezai2 1 2

ACECR institute of higher education, Isfahan branch, Isfahan 84175-443, Iran [email protected] Academic Center for Education, Culture and Research (ACECR), Isfahan University of Technology (IUT) branch, Isfahan 8415681167, Iran [email protected]

Abstract. This paper presents and evaluates a new method for efficient implementation of modular multiplication. The proposed method uses uniform k-partition method, parallel method, and signed-digit recoding method. Using k-partition method and signed-digit recoding method, the number of required clock cycle is considerably reduced. Moreover, using the parallel method, the computation times is considerably reduced. The complexity analysis results show that the proposed method has advantages in comparison with other modified modular multiplication methods. Keywords: Security, Public key cryptography, Modular Multiplication, Signed-digit recoding.

1 Introduction Recently, security plays an important role in critical infrastructures such as gas, oil, water, and transport. Public-key cryptography is a solution to obtain secure communication. Modular multiplication has a vital role in the public key cryptography [1]. Montgomery modular multiplication method is a widely used modular multiplication method. This method simplified the modular multiplication by replaced the trial division by simple right shift and addition operations that are simple for hardware implementation [2, 3, 4, 5]. There are several attempts to enhance the performance of the Montgomery modular multiplication such as using parallel and uniform k-partition method [2], using Compact SD modular multiplication [3], Variable-Length Montgomery Modular Multiplication (VLM3) [4]. This paper presents and evaluates a new modular multiplication method. This new method uses variable-length Montgomery modular multiplication method and parallel and uniform k-partition to increase the performance of the modular multiplication. The obtained results of complexity analysis show that the proposed method has advantages compared to other modified modular multiplication methods. The rest of this paper is organized as follows: section 2 briefly describes the background of the proposed method. Section 3 presents the proposed method. Section 4 evaluates the proposed method, and section 5 concludes this paper.

2 Background 2.1 Montgomery modular multiplication Montgomery modular multiplication [6], which simplified the trial division, is a most used modular multiplication. Algorithm 1 shows the Montgomery modular multiplication.

Algorithm 1:Montgomery modular multiplication 1.Input: X,Y,M

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2.Output:S(n)=XYR mod M 3.S(0)=0 4.For i=0 to n-1 5.qi =(S(i)+ Xi Y) mod 2 6.S(i+1)=(S(i)+ Xi Y+qi M)/2 7.End for 8.If S(n)≥M then S(n)=S(n)-M 9.Return S(n) In this algorithm, the inputs are X, Y, and M that are n-bit multiplier, multiplicand and modulus, respectively. This modular multiplication is a time consuming operation due to it requires n clock cycles to generate the output. 2.2 Parallel and uniform K-partition method Recently, Neto et al. [2] proposed an efficient modified Montgomery modular multiplication method. They divided the multiplier X into k partitions. Each partition in this method can be processed separately by using a radix-r multiplier, where r=2k. The output of ith partition in Neto et al. method [2] is shown by 𝑆𝑝𝑖 , which is computed as follows: 𝑆𝑝𝑖 = �𝑥𝑝𝑖 𝑌𝑅 � 𝑚𝑜𝑑 𝑀 P

P

The complete modular multiplication in this method is computed as follows: 𝑘−1

𝑆 = � 𝑆𝑝𝑖 𝑚𝑜𝑑 𝑀 𝑖=0

The Neto et al. method [2] is an efficient modular multiplication method, but it can be improved as will be described in the next sections.

3 The proposed method This section presents a new modular multiplication method. Figure 1 shows the block diagram of the proposed method for k=2.

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Figure 1. The block diagram of the proposed method.

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In the proposed method, the Canonical recoding [7, 8], zero count and partitioning method are applied to the multiplier X. The output of these steps is an integer, 𝑋𝑆𝐷 , in which each digit contains consecutive zero bits followed by a nonzero digit. After that, the k-partition method is applied to the recoded multiplier. The output of this step for k=2 decomposes the multiplier into two partitions 𝑋𝑆𝐷𝑜 and 𝑋𝑆𝐷1 . Using the variable-length Montgomery modular multiplication presented in [4], two partial results, 𝑆𝑝0 and 𝑆𝑝1 , are computed in parallel. Finally, the results of the k partitions are added to compute the final result, 𝑆 = 𝑋𝑌𝑅 𝑚𝑜𝑑 𝑀.

4 Evaluation Our analysis show that the average Hamming weight of the multiplier of the proposed modular n n multiplication method is , where the average Hamming weight of the multiplier in [4] and [2] is 3k

n

3

and , respectively. Figure 2 shows the comparison of Hamming weight between the proposed k modular multiplication and modular multiplication method in [2, 4], where modulus length is 512, 1024 and 2048 bit.

Average Hamming weight

1200 1000 800 600 400 200 0 512

1024

2048 Operand size

The proposed modular multiplication (for k=2) The modular multiplication in [2] (for k=2) The modular multiplication in [4]

Figure 2. The comparison of average Hamming weight between the proposed modular multiplication method and modular multiplication methods in [2, 4] This new modular multiplication method reduces the computation cost (the number of required clock cycles) in comparison with [2, 4] by about: 𝑛 1 3𝑘 �1 − 𝑛 � × 100 = �1 − � × 100 = 66.7% 3 𝑘

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Asia-pacific Proceedings of Applied Science and Engineering for Better Human Life Vol.4 (2016) pp. 111-115 𝑛 1 3𝑘 �1 − 𝑛 � × 100 = �1 − � × 100 = 50% 𝑓𝑜𝑟 𝑘 = 2 𝑘 3 Based on our complexity analysis the proposed modular multiplication method considerably reduces the computation cost compare to recent modified modular multiplication methods in [2, 4].

5 Conclusions This paper presented and evaluated a new modular multiplication method. The proposed method utilized parallel architecture to compute the modular multiplication. To increase the applicability of this method, a signed-digit recoding method is applied to the multiplier, and then the recoded multiplier is divided into k partition. The complexity analysis showed that the proposed method has advantages in comparison with other modified modular multiplication methods in [2, 4].

References 1. Rezai, A., Keshavarzi, P., Moravej, Z.: “Secure SCADA communication by using a modified key management scheme,” ISA transactions, vol. 52, no. 4, pp. 517--524 (2013). 2. Néto, J.C., Tenca, A.F., Ruggiero W.V.: “A Parallel and Uniform k-Partition Method for Montgomery Multiplication,” IEEE transactions on computers, Vol.63, no. 9, pp. 2122 – 2133 (2014). 3. Rezai, A., Keshavarzi, P.: “Compact SD: A new encoding algorithm and its application in multiplication”, International journal of computer mathematics, DOI: 10.1080/00207160.2015.1119269 (2016) 4. Rezai, A., Keshavarzi, P.: “High-Throughput Modular Multiplication and Exponentiation Algorithms Using Multibit-Scan Multibit Shift Technique,” IEEE transactions on Very Large Scale Integration (VLSI) systems, Vol. 23, no. 9, pp. 1710 –1719 (2015) 5. Rezai, A., Keshavarzi, P.: “Algorithm design and theoretical analysis of a novel CMM modular exponentiation algorithm for large integers,” RAIRO-theoretical informatics and applications, Vol. 49, no. 3, pp. 255 – 268 (2015). 6. Montgomery, P.L.: “Modular multiplication without trial division,” Mathematics of computation, Vol. 44, no. 170), pp. 519–521 (1985). 7. Reitwiesner, G.: “Binary Arithmetic,” Advances in computers, vol.1, pp.231-308 (1960). 8. Rezai, A., Keshavarzi, P.: “A new left-to-right scalar multiplication algorithm using a new recoding technique,” International journal of security and its applications, Vol. 8, no. 3, pp. 31--38 (2014).

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