Embedded Computing

Course Overview

José Monteiro Computer Organization Architectures for Embedded Computing Monday, 16 September 13

The Computer Revolution •  Progress in computer technology –  Reinforced by Moore’s Law

•  Makes novel applications feasible –  Computers in automobiles –  Cell phones –  Human genome project –  World Wide Web –  Search Engines

•  Computers are pervasive Computer Organization / Architectures for Embedded Computing

Classes of Computers •  Desktop –  single user, general purpose, with a typical set up of display, keyboard, and mouse Critical: cost, performance •  Servers –  run larger programs in parallel for multiple users, typically accessed remotely Critical: performance, capacity, security, reliability •  Supercomputers –  clusters with hundreds to thousands of processors, terabytes of memory and petabytes of storage Critical: performance, capacity, expandability •  Embedded –  hidden component of a system, running a predefined program Critical: cost, power, performance

Computer Organization / Architectures for Embedded Computing

Desktop Computer

Output device

Network cable

Input device

Input device

Computer Organization / Architectures for Embedded Computing

Server

Rack

Server

Computer Organization / Architectures for Embedded Computing

Supercomputer

Tianhe-2, or Milky Way-2 National Supercomputer Center in Guangzho, China

Currently world’s most powerful supercomputer (34 petaflop/s). Computer Organization / Architectures for Embedded Computing

!

Everything here has a computer – but where are the Pentiums?

Embedded Computers

[Smolan] Computer Organization / Architectures for Embedded Computing

4

Millions

The Processor Market

Over 99% of processor sales are for embedded systems! Computer Organization / Architectures for Embedded Computing

Issues in Embedded Systems Specific issues when programming embedded systems: –  Real-time requirements •  Often worst-case is more important than average-case

–  Resource constraints •  Power and memory

–  Reliability •  Safety critical systems •  Difficult access

–  Diversity •  Heterogeneity of computing architectures •  Diverse set of input/output devices Computer Organization / Architectures for Embedded Computing

Technology Trends •  The transistor density increases about 35% per year. •  The circuits area increases about 10% to 20% per year. •  The number of transistors per circuit increases about 55% per year.

Moore’s Law (1965): “The number of transistors per square-centimeter of integrated circuit doubles every 18 months.” •  In practice, the density increased about 100,000x in the last 45 years! Computer Organization / Architectures for Embedded Computing

Inside the Processor AMD Opteron: 4 processor cores, 0.5x109 transistors

Computer Organization / Architectures for Embedded Computing

Moore’s Law in Practice

Computer Organization / Architectures for Embedded Computing

Technology Trends Year

Technology

1951

Vacuum tube

1965

Transistor

1975

Integrated circuit (IC)

1995

Very large scale IC (VLSI)

2005

Ultra large scale IC

Relative performance/cost 1 35 900 2,400,000 6,200,000,000

•  Electronics technology continues to evolve –  Increased capacity and performance –  Reduced cost

DRAM capacity

Computer Organization / Architectures for Embedded Computing

Technology Trends

Computer Organization / Architectures for Embedded Computing

Power Density

Computer Organization / Architectures for Embedded Computing

Power Trends In CMOS IC technology

Power = Capacitive load× Voltage2 ×Frequency ×30

5V → 1V

The power wall! Computer Organization / Architectures for Embedded Computing

×1000

Multiprocessors The power wall: –  can’t reduce voltage further –  can’t remove more heat How else can we improve performance?

➥  Multicore microprocessors –  More than one processor per chip New paradigm! Requires explicitly parallel programming: –  Compare with instruction level parallelism •  Hardware executes multiple instructions at once •  Hidden from the programmer

–  Hard to do •  Programming for performance •  Load balancing •  Optimizing communication and synchronization Computer Organization / Architectures for Embedded Computing

What You Will Learn •  Architecture of current processors –  Performance metrics

•  Integrated view of the computer system –  Memory hierarchy –  Input/Output system

•  How to improve program performance •  Features related to embedded systems •  What is parallel processing •  Future trends Computer Organization / Architectures for Embedded Computing

Teaching Staff Theoretical classes: José Monteiro INESC-ID, office 136

[email protected]

Office hours: Mondays 14h00, Room: 2.01 - Informática III

Practice/Lab classes: Nuno Santos INESC-ID, office 607 [email protected]

Office hours: Thursdays 8h00, Room: Lab 14

Extra office hours can be arranged as needed. Computer Organization / Architectures for Embedded Computing

Class Schedule Theoretical classes 2 classes/week, one and a half hour long Monday, 12h30-14h00, Room EA3 Friday, 14h00-15h30, Room FA1

Laboratory / Practical classes 1 class/week, one and a half hour long Thursday, 9h30-11h00, Lab 14 OR Friday, 8h00-9h30, Lab 14

Computer Organization / Architectures for Embedded Computing

Selection of Lab Shift •  Each lab shift will function with 8 groups of 3 elements each. •  Enrollment through Fenix, according to the following schedule: Tuesday, 24th, 8h: enrollment opens for complete groups

Wednesday, 25th, 9h: enrollment opens for groups with two or more elements

Thursday, 26th, 9h: no restrictions

•  You are free to choose the lab shift, as long as there are slots available. •  In the end, we will perform group compacting in each shift.

Computer Organization / Architectures for Embedded Computing

Assessment Lab component (30%): –  3 mini-projects,10% each –  groups of 3 elements –  lab grade defined individually at an oral discussion at the end of the semester (3rd week of December) –  minimum grade 9

Exam (70%): –  final exam, January 11, 8h –  recovery exam: January 30, 8h –  minimum grade 8 –  best grade between the two exams is used, however extra credit is given to those that only go to one of the exams Computer Organization / Architectures for Embedded Computing

Bibliography Main book:

Computer Organization and Design: The Hardware/Software Interface D. Patterson, J. Hennessy Morgan Kaufmann, 4th Edition, 2011, ISBN: 978-0123747501 Secondary Bibliography: –  Structured Computer Organization A. Tanenbaum, T. Austin Prentice-Hall, 6th Edition, 2013, ISBN: 978-0273769248 –  Embedded Computing: A VLIW Approach to Architecture, Compilers and Tools J. Fisher, P. Faraboschi, C. Young Morgan Kaufmann, 4th Edition, 2005, ISBN: 978-1558607668 –  Computer Architecture: A Quantitative Approach J. Hennessy, D. Patterson Morgan Kaufmann, 4th Edition, 2011, ISBN: 978-0123838728

Computer Organization / Architectures for Embedded Computing

Plan Week

1

2

3

4

5

6

7

Date 16-Sep 17-Sep 18-Sep 19-Sep 20-Sep 23-Sep 24-Sep 25-Sep 26-Sep 27-Sep 30-Sep 01-Oct 02-Oct 03-Oct 04-Oct 07-Oct 08-Oct 09-Oct 10-Oct 11-Oct 14-Oct 15-Oct 16-Oct 17-Oct 18-Oct 21-Oct 22-Oct 23-Oct 24-Oct 25-Oct 28-Oct 29-Oct 30-Oct 31-Oct 01-Nov

Theory Class Topic 1 Course overview. Motivation. Types of computers.

2 3

4 5

6 7

8 9

10 11

12 13

Book Section Chap. 1

Review of the basic components and operation of a computer. Performance metrics.

Chap. 1

Assembly instructions. ISA of the MIPS processor.

Chap. 2

Instruction encoding.

Chap. 2

Stack, heap. Role of the compiler and linker.

Chap. 2

Computer arithmetic: integer and floating point.

Chap. 3

Workings of a RISC processor.

Sec 4.1 a 4.5

Data hazards: analysis and optimization.

Sec. 4.6 e 4.7

Control and structural hazards: analysis and optimization.

Sec. 4.6 e 4.8

Exceptions, traps and interruptions.

Sec. 4.9

Superscalar and VLIW processors.

Sec. 4.10

Review of the memory hierarchy and cache.

Sec. 5.1 a 5.3

Analysis of the cache operation.

Sec 5.5 e 5.7

Optimization of the cache usage.

Sec 5.5 e 5.7

Class

Intro

Lab Topic

No class

(lab enrollment) ISA

1 1 Exercises: metrics 1 2 2 Exercises: pipeline

RISC

2 3 3 Exercises: pipeline 3 4 4 Lab: pipeline

Memory

14

4 5 5 Exercises: caches 5

Computer Organization / Architectures for Embedded Computing

Plan Week

8

9

10

11

12

13

14

Date 04-Nov 05-Nov 06-Nov 07-Nov 08-Nov 11-Nov 12-Nov 13-Nov 14-Nov 15-Nov 18-Nov 19-Nov 20-Nov 21-Nov 22-Nov 25-Nov 26-Nov 27-Nov 28-Nov 29-Nov 02-Dec 03-Dec 04-Dec 05-Dec 06-Dec 09-Dec 10-Dec 11-Dec 12-Dec 13-Dec 16-Dec 17-Dec 18-Dec 19-Dec 20-Dec

Theory Class 15 Virtual memory.

Topic

Book Section Sec 5.4

Class 6 6

Lab Topic

Exercises: caches NO CLASS 16

17 18

19 20

21 22

23 24

25 26

Integrated operation of the processor and different levels of memory Sec 5.4 hierarchy. Virtual machines. Sec 5.6 Input/ouput system.

Sec. 6.1, 6.5 e 6.6

Performance analysis of the I/O system.

Sec. 6.3, 6.4, 6.7 e 6.8

Reliability issues.

Sec. 6.2 e 6.9

Digital/analog interface

(extra)

Embedded architectures. Microcontrollers. DSP processors.

(extra)

Parallel architectures.

Sec. 7.1, 7.2 e 7.6

Shared memory systems.

Sec. 7.3 e 7.5

Distributed memory systems. Clusters.

Sec. 7.4 e 7.8

Vector processors and GPUs. Reconfigurable computing.

Sec. 7.7

Memory

6 7 7 Lab: caches 7 8 8

I/O

Exercises: virtual memory

8 9 9 Lab: profiling 9 10 10 Exercises: I/O

Multicores

10 11 11

Exercises: multiprocessors

11 12 12 (oral discussions) 12

Computer Organization / Architectures for Embedded Computing

Next Class •  Review of basic notions on computer architecture •  Performance metrics

Computer Organization / Architectures for Embedded Computing

Course Overview

Computer Organization Architectures for Embedded Computing Monday, 16 September 13