2012 24th International Conference on Microelectronics (ICM)
Embedded Implementation of an IP-PBX /VoIP Gateway Faroudja Abid*, Nouma Izeboudjen, Mohamed Bakiri, Sabrina Titri, Fatiha Louiz and Dalila Lazib Microelctronic and Nanotechnologie Laboratory Advanced technology development center Algiers, Algeria
[email protected],
[email protected]
Abstract— This paper deals with an embedded IP-PBX (IPPrivate Branch exchange) /VoIP (Voice over IP) gateway, around the OpenRISC processor and an open source Asterisk PBX running on an embedded Linux kernel. In this work we leverage the Opencores reuse strategy, which provides a lower cost solution to realize a portable SoC (System on Chip) for VoIP application. In this approach both hardware and software components are Opensources. The achieved part of the system has been implemented on a Virtex5 FPGA circuit. The hardware part uses 50% of BRAM memories, 27 % of slice registers and 48% of slice LUTs, the power consumption is 4.233 W. Regarding the software part, a Linux kernel has been ported to the Virtex5 FPGA, and the network functionality of the system is successfully tested. Keywords—Asterisk, Embedded system, FPGA, SoC, OpenCores, OpenRISC, Opensource, VoIP application.
I.
INTRODUCTION
Embedded systems are defined as special purpose computer-systems designed to perform one or more dedicated functions, where all essentials parts are integrated into a single chip. In this work we expose the idea of designing and implementing an embedded IP-PBX/VoIP gateway based on a single SoC, around the OpenRISC processor and an Opensource Asterisk PBX which allows connection to the public switched telecommunication network (PSTN) and telephone services through packet networks. The VoIP technology uses the IP network for voice services as an alternative to the PSTN. The voice transmission through packet networks offers lower infrastructure and lower calls cost compared to the PSTN. To develop our own platform for VoIP application we leverage the Opencores design methodology which is based on publishing all necessary information about the hardware. The purpose is to realize a portable system while reducing power consumption, device size and product cost by using embedded Linux kernel and embedded Asterisk. The system integrates the hardware components into FPGA and embeds the software of the application into the external memory. To design and implement the system, we have specified the software and the
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hardware parts of the project [1] and [2]. The proposed SoC [3] and [4] includes a 32bit Reduced Instruction Set Computer (RISC) processor [5] and a minimum set of elements needed to provide VoIP functionality. These cores are connected through the wishbone bus interface. Regarding the software part, we aim to build an embedded system around Asterisk [6], an Opensource which implements a mini PBX in Linux environment. The achieved part of the system has been implemented on a Virtex5 FPGA circuit. The hardware part uses 50% of BRAM memories, 27 % of slice register and 48% of slice LUTs. Concerning the software part, a Linux kernel has been ported to the Virtex5 FPGA and a network functionality of the system has been successfully tested. In section II, a background and related work are given. Section III deals with the proposed system overview; herein we focus on a hardware part. The system prototyping and synthesis results are presented in this section. Section IV gives the software test results, since the network functionality of the system constitutes the main step in a VoIP application; we expose the test result of the achieved part for embedded network application. Finally, section V concludes this paper. II.
BACKGROUND AND RELATED WORK
Asterisk is an Opensource which implements a mini PBX in Linux environment. It is a phone switch allowing connection to the PSTN and telephone services through packet networks created by Mark Spencer of Digium. Asterisk supports SIP, IAX, H323 signaling and the RTP protocols. The idea behind embedding Asterisk is to give a lower and portable solution since most of implementations are done on a computer. A few works emerged from industrial and academic researches to design such system. Among these implementations, the IP04 from Rowetel [7] a four IP-PBX based Blackfin processor which runs Asterisk and uClinux. Asterisk was ported to Blackfin processor by David Rowe. He gives an open hardware implementation which is used by Dan Amarandei and al for Wideband VoIP Middleware [8]. Another implementation based Xilinx PowerPC processor is given by Stelios Koroneos from Digital OPSIS [9]. In our work we
have adopted an Opencores approach to build an OpenRISC processor based implementation. This choice is justified by the following points: • OpenRISC is an open source IP-core freely available as a Verilog model. The processor is intended for embedded, portable and network applications. • Availability of the Register Transfer Level (RTL) descriptions for all the IPs components included in the proposed system based OpenRISC and tools at free cost. • The whole system can be mapped into FPGA or ASIC. III.
SYSTEM OVERVIEW
A. System architecture Figure 1 illustrates the architecture of an IP-PBX implementation done on an x86 PC plus a PCI card (a getaway which allows connection to the PSTN) for analog ports. PC under Linux
x86 CPU
Network Card
UART Reset, RTC (DS1670)
Phy Ethernet
PCI Bridge
FPGA Xilinx Virtex5
FXO Port
SLIC COMBO/CODEC Asterisk
DSP hardware
Ext/RAM 256 MB
RS232 Transceiver
RJ45
PCI Card
Device Driver
application. For the hardware part, an HDL file describing all the cores of the library is created. The proposed architecture is based on the OpenRISC processor and a minimum set of elements. These elements are the debug unit for debugging purpose, a memory controller that controls an external memory that carries Linux and Asterisk, a Universal Asynchronous Receiver Transmitter (UART), the Internet connection is established by the Opencores MAC/Ethernet. A SoC Verilog description is created for the integration of all the cores. Considering the complexity of the system, we proceed to test communication protocol of each subsystem composed of set of IPs connected to the bus wishbone with the OpenRISC processor. Figure 4 shows the architecture of the achieved subsystem, for network functionality test [10].
FXS Port
RJ11 RJ11 RJ11
Flash RJ11
Fig. 3. Board block diagram based FPGA Fig. 1. IP-PBX Hardware configuration
Figure 2 presents the architecture of an embedded implementation based OpenRISC soft processor and Asterisk. This implementation allows functionality of an IP-PBX on embedded system designed for this purpose; the system hold the software and the hardware part of the system in single chip, hence no PC and no PCI card are required.
Asterisk
OpenRISC FXO Port
FPGA Device OpenRisc Wishbone Bus
debug Unit
UART 16550
Memory Controller
ethernet MAC
FPGA Board DSP software
Device driver
FXS Port
Fig. 2. Embedded implementation of an IP-PBX
Figure 3 shows the board block diagram around the FPGA Virtex5 circuit. It includes some peripherals needed for the test of the system implemented on the FPGA for VoIP
Fig. 4. SoC subsystem architecture
B. OpenRISC processor In this section we present the OpenRISC processor since it is the basic IP in the designed SoC. The OpenRISC 1200 is a synthesizable 32-bit RISC processor developed and managed by a team of developers at Opencores as a Verilog model. It is freely available from the Opencores
website, licensed under the GNU LGPL license. An overview of the OpenRISC processor architecture can be seen in figure 5.
Fig. 5. OpenRISC 1200 processor architecture
C. System Prototyping The achieved subsystem has been prototyped using the Xilinx development platform ML501-Virtex5, The operating frequency is 66 MHz. The development tool used for the design and implementation is ISE 12.1 tool by Xilinx [11]. Table 1 shows the synthesis results. The achieved part of the SoC uses 50% of BRAM memories, 27 % of slice registers and 48% of slice LUTs. It is noticeable that the BRAM memories are the most used resources, the use of other resources remain low. The power consumption is 4.233 W. TABLE I.
SYNTHESIS RESULTS.TARGET DEVICE XC5VLX50-1FF676
Slice Logic resources Number of Slice registers Number of Slice LUTs Number of bonded IOBs Number of BRAMs
Used Slice Logic 7864
Available Slice Logic 28800
% Occupied resources 27%
13872 192
28800 440
48% 43%
24
48
50%
TABLE II. Total estimated power consumption Logic IO (W) BRAM (W) Quiscent Dynamic (W) Total(W)
POWER CONSUMPTION
IV.
SOFTWARE TESTS RESULTS
A. Software development The Software development of the embedded system includes two parts: 1. Configuration and compilation of embedded Linux operating system. In this part the kernel is adjusted to the target system and compiled. 2. Programming the VoIP application. Embedded Linux Configuration First we have ported the Linux kernel 3.0.rc1 to the Ml501 FPGA platform by defining a new dts file (device tree file ml501.dts) ) [12]. Mainly we have configurated linux to use the Opencores MAC/Etehrnet as a network controller and include the TCP/IP stack that provides the IP connection. At first we have run Linux kernel on Or1ksim simulator. Then we have booted it on the virtex5 FPGA.The Internet protocols needed for network functionality (ICMP (Internet Control Message Protocol) for ping, TCP (Transmission Control Protocol) and UDP (User Datagram Protocol)) are available under Linux. CPU Software The CPU software is based on the embedded Linux operating system. Figure 6 presents the general software architecture. The achieved subsystem runs the Linux kernel 3.0 with the HTTPD web server and other application. The TCP/IP stack that provides the IP conection is also included. The communication between the operating system and the system hardware is implemented by the device drivers through standardized Linux interfaces. The software includes device drivers for the Ethernet and UART.
User Interface (HTTP (boa, httpd) , Telnet, FTP………
Mini PBX (Asterisk)
Linux Kernel Data Transfer Protocols (TCP, UDP, IP, ICMP)
Uart Driver
Ethernet MAC Driver
Additional IPs Drivers
POWER (W) 0.009 3..346 0.053 3.389 0.394 4.233
Fig. 6. CPU software architecture
The network application test ( Web server) For the network application an HTTPD web server application running on the embedded Linux is chosen as test of the subsystem. The purpose is to test the network functionality of the proposed SoC and the web server is just used as a network application example. Figure 7 shows the test
environment, which consists of an Ethernet connection of the evaluation ML501 board that represents the web server to the remote web-client. The serial link is used as user interface in order to communicate with the ML501, where the OpenRISCbased system running the embedded Linux kernel and the web server is embedded. The network configuration of the embedded server is set according to CDTA/LAN (IP address 10.1.70.75, netmask 255.255.0.0). The test of the HTTPD web server has been successfully done on the ML501 FPGA platform. The remote web-client with web browser displays the static web page hosted in the embedded web server, which enable http file transfer as shown in figure 7.
Fig. 7.
V.
Test environment
CONCLUSION
In this work an embedded IP-PBX/VoIP gateway system around OpenRISC processor and a PBX Asterisk is exposed. The results given are related to the achieved part of the SoC, developed using the Opencores IP reuse strategy for hardware and software components. This part concerns the network functionality test which constitutes the main step in a VoIP application. The hardware part uses 50% of BRAM memories the most used resources, while the use of the other resources remains low. Hence the Virtex5 FPGA can include the remaining part of the SoC. Concerning the software part, the network application running on embedded Linux operating system is first embedded and tested on the ML501 board. Further, as perspective we aim to embed the Asterisk PBX and finalize the implementation of the whole system around OpenRISC on the FPGA for a portable system. REFERENCES [1]
[2]
Abid Faroudja, Nouma. Izeboudjen, Sabrina. Titri, Leila.Salhi, Fatiha.Louiz, Dalila.Lazib “Hardware /Software Development of System on Chip Platform for VoIP Application “, ICM, International Conference on Microelectronics, December 19-22, 2009, Marakech, Morocco, pp6265. N. Izeboudjen, K. Kaci, M. Bengherabi, S. Titri, F. Louiz, L. Sahli, D. Lazib, *N. Idirene, "An Open Hardware Architecture based System on
Chip for Voice over Internet", JFAAA05, 18-21 January 2005, Dijon, France.S. [3] Titri, N. izeboudjen, F. Louiz, M. Bakiri, F. Abid, D. lazib, L. rekab, “An Opencores /Opensource based Embedded System-on-Chip platform for Voice over Internet”, book: VOIP Technologies, pp:145172, INTECH, ISBN: 978-953-307-549-5,2011. [4] F.Abid, F.Louiz, N.Izeboudjen, D.Lazib, S.Titri, M.Bakiri “Design and Implementation of an Embedded VoIP System on Chip “, CIAM’2011, International Conference on Automation and Mechatronics, November 22-24, 2011.Oran (Algeria), pp 561-565. [5] Mjan Lampret “OpenRISC 1200 IP Core Specification“, Rev. 0.7 Sep 6, 2001. [6] Jim Van Meggelen, Leif Madsan and Jared Smith, “Asterisk the future of telephony, second edition “, Oreilly, August 2007. ISBN-13: 978-0596-51048-0 [7] Free Telephony Project, Open Telephony Hardware, IP04 Four Port IPPBX retrieved February 14, 2010 from [8] Dan Amarandei and Mostafa El-Said, “Implementation of Wideband VoIP Middleware Using Embedded Systems”, IEEE2010 [9] http://www.digital-opsis.com [10] F. ABID, N. IZEBOUDJEN, L. SAHLI, D. LAZIB, S. TITRI, F. LOUIZ, M. BAKIRI, “Towards an Open Embedded System on Chip for Network Applications” WSEAS 2010, Latest Trends on Circuits, Systems and Signals. The 4th international conference on Circuits, Systems and Signals, CSS'10. Greece, July 22-25, 2010, pp 163-168. ISSN: 17924324, ISBN: 978-960-474-208-0. [11] XILINX ISE 12.1 user manual. [12] Mohammed BAKIRI, Sabrina TITRI, Nouma IZEBOUDJEN, Faroudja ABID, Fatiha LOUIZ and Dalila LAZIB “Embedded System with Linux Kernel Based on OpenRISC 1200-V3“,SETIT2012,March 21-24, 2012, Sousse, Tunisia.
