Ecoc 2015 - ID: 0727
Etched-Facet Semiconductor Optical Amplifiers for Gain-Integrated Photonic Switch Fabrics L. Schares(1), R. Budd(1), D. Kuchta(1), F. Doany(1), C. Schow(1), M. Möhrle(2), A. Sigmund(2), W. Rehbein(2) (1) (2)
IBM T.J. Watson Research Center, Yorktown Heights, NY 10598, USA.
[email protected] Fraunhofer Heinrich-Hertz Institute, Berlin, Germany.
[email protected]
Abstract We have fabricated InP SOAs with lithographically-defined etched facets. Their more precisely-controlled length compared to cleaved SOAs promises improved coupling tolerances for PICs with flip-chip attached gain blocks. Measured gain is around 20dB and noise figures are 5-6dB. Introduction Traditional networks with optical links between electrical packet switches continue to scale, but nanoscale optical switches promise to enable lower-power and lower-latency networks than electrically switched networks. However, if silicon photonic switch fabrics are to make an impact in computing systems1,2, nanoscale optical switches have to be developed with portcounts that scale beyond the single digits that have been shown to date, without being limited by insertion losses of switches, waveguide crossings and couplers. Semiconductor optical amplifiers (SOAs) are a natural solution to compensate for the losses to enable realistic optical-link-loss budgets for multi-stage switch networks. Fig. 1 shows a topological view of a high-radix photonic switch that integrates multiple planar switch elements with SOAs.
Fig. 2: SOA / photonic substrate integration test vehicle.
The main advantage of SOAs with etched facets is the fact that their length can be precisely defined by lithography, eliminating the bar cleaving tolerance and precisely controlling the SOA-to-waveguide distance. Since most SOAs have angled waveguides to minimize the gain ripple due to facet reflectivities, any length variation translates into a lateral misalignment that can quickly exceed the alignment tolerance for acceptable coupling loss. Potentially in the future, etched-facet SOAs may be tested and burned-in at the wafer scale, leading to cost efficiencies, if an on-wafer AR-coating process with sufficiently low reflectivity values can be developed. We are not aware of prior publications on etched-facet SOAs with high gain, low ripple and low noise figures. SOA fabrication and length control
Fig. 1: Topological view of a high-radix photonic switch.
A primary challenge is the precision packaging of a dual-sided, multi-channel SOA to multiple waveguides on a photonic substrate. While heterogeneous integration of InP gain elements in a silicon photonic platform holds significant promise as a single-chip solution4,5, flip-chip attached packages are often considered since the Si and InP chips can be independently optimized for high performance, reliability and yield. Fig. 2 shows our packaging test vehicle that contains SiN waveguides, a trench with solder bumps and landing pads as a vertical reference for a custom 4-channel SOA array3.
Fig. 3: SOA cleaved / etched facet design comparison
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Fig. 3 shows a diagram of a conventional cleaved SOA with angled waveguides positioned on a photonic carrier. Conventional SOAs with cleaved facets have length inaccuracies in the range of 5-10 µm due to the bar cleaving process; this is acceptable for active alignment to input and output optical fibers. Precise length control is however a necessity to achieve high coupling efficiency of flip-chip mounted SOAs between optical waveguides on a photonic carrier. Otherwise, the carrier opening needs to be large enough to accommodate the cleaving tolerance. In the worst case, the distance between the SOA facet and its mating waveguide could be as large as 10 μm and lead to high coupling losses.
of the etched-facet SOAs was limited by the 0.4-µm resolution of our optical microscope setup, which is on the same order than the lithography resolution. Mode profile measurements The far-field mode of the etched-facet SOAs shown in Fig. 6, measured with a goniometric radiometer, exhibits a near-circular profile with 50% angular widths of 20.7° (lateral, in-plane) and 23.5° (vertical); these correspond to 1/e2-mode-field diameters of 2.6 µm in lateral and 2.4 µm in vertical directions.
Fig. 6: Topographical and 3D far-field views of etched-facet SOA (706-µm long, 100mA, 20C).
Fig. 4: SEM images of etched-facet SOA.
Distribution [rel.]
The SOAs are 4-channel 1.55-µm TE-polarized arrays on a 250-μm pitch with an InGaAsP MQW buried heterostructure. Lengths are in the 0.7-1.0mm range, and integrated spot size converters allow for efficient coupling to the passive waveguides. Fig. 4 shows SEM images of a fabricated etched-facet SOA. For facet etching, a chemical assisted ion beam etching process in combination with a suitable hard mask has been developed to enable vertical 6,7 angled mirrors . The etching depth is about 9 µm, and the etched facets are 7°-angled to minimize back reflections. Additionally, both the cleaved and etched SOAs have antireflection coatings for index-matching to air (n=1.0) or to oxide (n=1.45) to further reduce back reflections. Fig. 5 shows the measured length deviations from the nominal lengths of randomly selected 28 etched and 45 cleaved SOAs. The cleaved SOA lengths range from 997.6-1004 µm, a 6.4µm spread. The length distribution measurement 0.5 Cleaved Etched
0.4 0.3 0.2 0.1 0 -3
-2
-1 0 1 2 Length Deviation from Nominal [ m]
3
Fig. 5: Length distributions of etched and cleaved SOAs.
4
The far-field comparison in Fig. 7 shows a 2.8° in-plane broadening of the 50% angular width over cleaved-facet SOAs on the same wafer; part of this is expected because of some scattering due to the facet roughness. There is a more significant broadening of 5.7° and a small side-peak in vertical direction; this may be due in part to some light bouncing off the pedestal below the etched-facet shown in Fig. 4. After further optimization of the optical taper regarding the position of the etched facets, a nearly identical optical far-field compared to cleavedfacet SOAs is expected in the future.
Fig. 7: Lateral (left) and vertical (right) far-field mode comparisons between etched and cleaved SOAs.
Optical characterization SOA gain3 and noise figure measurements8 were performed using lensed AR-coated fibers. The fiber-SOA coupling factors were measured by a variety of techniques, including by subtracting fiber-coupled ASE-power from the power measured by a large photodetector, as well as by measuring noise figures and saturation power in both propagation directions through the SOA under test. The gain was also measured on a different setup at HHI and nearly identical values were observed. Fig. 8 plots chip gain and intrinsic noise figure of
Ecoc 2015 - ID: 0727
706-µm at 100 mA and 956-µm long etchedfacet SOAs operated at 60 mA and 20°C. (Note that while these chips have cleaved lengths of 750 µm and 1000 µm, the etching process has recessed the active waveguide by about 22 µm on each side.) The 706-µm SOA has a peak chip gain of 19 dB around 1540 nm, and the intrinsic noise figure is 5-6 dB. The 956-µm SOA peak gain is 23 dB with noise figures below 6 dB for wavelengths higher than the peak wavelength. The -3dB output saturation power is approximately 10-11 dBm for both SOA lengths. For cascadability, it is well understood that low noise figures and high saturation power are 2,9 more important than the highest possible gain .
Fig. 9: Chip gain and noise figure of cleaved SOAs.
Conclusions We have fabricated SOAs with lithographicallydefined etched facets. Their more preciselycontrolled length than for cleaved SOAs promises improved coupling tolerances for PICs with flip-chip attached gain blocks. These SOAs have nearly circular mode profiles, gain around 20dB with low ripple and noise figures of 5-6 dB. Acknowledgements
Fig. 8: Chip gain and noise figure of 706-µm long (top) and 956-µm long (bottom) etched-facet SOAs.
The reflectivity from the 7°-angled and ARcoated etched-facet SOAs is estimated to be 1.0·10-3 (for the 706-µm SOA) and 1.2·10-3 (for the 956-µm SOA) by measuring the magnitudes of the spectral ripple and the chip gain. Fig. 8 indicates that the achieved etched-facet roughness is sufficiently low to achieve low ripple for SOAs with up to 20-dB gain. However for higher-gain operation, process improvement will be required to further reduce the facet reflectivities and spectral gain ripple. For comparison, Fig. 9 plots chip gain and intrinsic noise figures of 750-µm and 1000-µm long cleaved SOAs operated at 100mA and 20°C. Gain values are about 2 dB higher than for etched-facet SOAs at similar current densities, and the noise figures are 1-2 dB lower over most of the spectral region. The reflectivity -4 of the cleaved SOAs is ≤2·10 , leading to low gain ripple. The intrinsic noise figure is as low as 4 dB for the 1000-µm cleaved SOA. However, a high coupling efficiency is important for lownoise performance, since the input SOA coupling factor needs to be added to the intrinsic noise figure. We have measured 1.5-dB coupling within ±1-µm lateral alignment between 3 SiN waveguides and cleaved SOAs , and similar work for etched-facet SOAs is in progress.
This work was supported by the Defense Advanced Research Projects Agency (DARPA) and the Army Research Laboratory (ARL) under contract W911NF-122-0051. The views, opinions, and/or findings contained in this article are those of the author(s) and should not be interpreted as representing the official views or policies of the Department of Defense or the U.S. Government. Approved for Public Release, Distribution Unlimited.
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