HIL-METHODS SUPPORTING THE DEVELOPMENT PROCESS FROM SIMULATIONS TO REAL ENVIRONMENT TESTING R. Brandl, H. Hernandez, D. Geibel Division Systems Engineering and Distribution Grids Fraunhofer Institute for Wind Energy Systems Technology (IWES) Koenigstor 59, D-34119 Kassel, Germany Phone (49) 561/7294-103, Fax (49) 561/7294-400 E-mail:
[email protected]
Keywords: Accuracy, Hardware-in-the-Loop (HIL), Hardware under Test (HuT), Large grid simulation, Real-Time Digital Simulator (RTS), Stability ABSTRACT Real-Time Digital Simulation (RTS) is a particular simulation method, which support the technology development process over the complete range from the early stage of simulations until the real testing of prototype units. This paper describes the functionality of Real-Time simulation during development process, here especially in the framework of an intelligent controlled on-load tap change (OLTC) transformer realising different voltage control strategies in a LowVoltage (LV) network with high share of distributed energy resources (DER). For this purpose a comprehensive real electrical environment, due to a later field test, will be simulated using different Real-Time Simulation methods. The hardware of network elements which can be developed in parallel to the necessary control algorithms can be modelled in a first approach within the simulation environment. Afterwards the real hardware components can be integrated easily into this environment (RTS). For real environment testing, the closed-loop process is used (Hardware-in-theLoop). In this paper several methods are investigated to build a stable and accurate power hardware simulation (Power Hardware-in-the-Loop).
1
INTRODUCTION
Hardware-in-the-Loop (HIL) methods are well known in different engineering disciplines for supporting and speeding up the development process. In terms of power system applications the trend towards a more extensive usage of HIL methods can be clearly seen over the last years. Beside the often used Controller Hardware-in-the-Loop (CHIL) method, Power Hardware-in-the-Loop (PHIL) testing methods become more and more popular and important. Especially the challenges due to a more decentralised network structure with smart network elements require even more smart development and testing possibilities in order to evaluate the behaviour of the equipment within the power system before its application in the field with real customers. The current status of verifying power systems, network components and their control is the simulation of the system together with its components and their control in a first step (Software-in-the-Loop (SIL)). However due to limited computational power for the execution of the simulation – especially true for wide and complex power system, e.g. distribution networks – often a simplification of the models have to be carried out or a time consuming calculation have to be taken into account. By introducing Real-Time simulation methods these calculation times can be reduced significantly even if detailed models are used. Having the complex power system once running in the Real-Time simulation environment it is obvious to enlarge the testing range to CHIL and PHIL. This procedure is described in this paper for the application of an active and smart substation in chapter 2. With regard to PHIL simulations stability issues within the test setup have to be clearly addressed. Since the signals of the RTS are amplified e.g. by using a network simulator, the closed-loop operation by coupling signals back to the RTS can lead to inaccuracies. These mainly depend on the simulation’s time steps. A PHIL simulation with smaller time steps, like µs, is more prone to inaccuracy than simulations with lager steps. Nonetheless smaller time steps can cause asynchronous states in the simulation which depends of the coupling between the power amplifier and the RTS and the feedback signals. In the worst case, the system can oscillate up to dangers values, which can destroy the Hardware under Test (HuT). Due to the newness of the HIL methods in power engineering, research of stability of PHIL simulations is necessary but largely unexplored. At the current research is the use of signal filters, which are built according to the feedback in the simulated system. These filters can stabilize the system, but under costs of accuracy. Finding a useful comparison of stabilization and accuracy for handling faster PHIL simulation is part of this paper and descripted in chapter 3. Therefore different methods [1] will be analysed and compared with each other.
2
DEVLOPMENT OF AN ACTIVE AND SMART LV NETWORK SUPPORTED BY REAL TIME SIMULATION METHODS
The development process supported by the usage of Real-Time Simulations for the control for an active and intelligent operation of a LV network using an OLTCtransformer is separate in different parts. The application of different Real-Time simulation methods during development process is helpful for further understanding of interactions between different components and an early detection of problems. This can save development time and money and helps to identify challenges at an early stage of a project. First all required components are modelled in a simulation environment. This environment contains the characteristic of a real existing Low-Voltage network, an intelligent controller and an OLTC-transformer. In this phase the intelligent part of the controller (Software-in-the-Loop (SIL)) is tested and optimized. The second step is the test of the developed software implemented within a controller, for which a programmable logic controller (PLC) is used in this case. For connection the I/O of PLC, e.g. analog and digital outputs as well as measurement signals, the level of the different signal between the PLC and the RTS have to be adapted (Controller Hardware-in-the-Loop (CHIL)). In the next step, the real hardware components as the OLTC-transformer, photovoltaic (PV) inverters and loads are integrated within a laboratory environment which consists of equipment for the emulation of LV and MediumVoltage (MV) networks. Here the RTS is used to generate the control signals for these specific components in the laboratory environment in order to influence the network behaviour as desired (Power-Hardware-in-the-Loop (PHIL)). 2.1
General Overview
In Figure 2.1 a general overview of the electrical network and the control is given in a MATLAB® simulation model, which contains Simulink®, Stateflow® and SimPowerSystems™.
PLC
OLTCTRANSFORMATOR
MONITORING/ CONTROLLING
LV-NETWORK MV-NETWORK
Figure 2.1 Intelligent controlled network transformer in MATLAB®-Simulink®
The PLC receives measurement signal from the transformers busbar and decides whether the OLTC-transformer increase or decrease its stepping in order to adjust the voltage within the complete LV network to a desired set-point value. In this case the control range of the OLTC-transformer is ±3*2% of the nominal voltage of 230V (phase to neutral). The LV network consists of a real field topology with LV cables, different loads, as households, and PV systems. A RTS from OPAL-RT is used for this work. One main advantage is that developed MATLAB®-Simulink® models can be used directly. Additionally the used PLC from Bachmann also supports an automatic code generation from Simulink® models. Therefore it is possible to develop the complete model within one simulation environment. 2.2
Modelling
Figure 2.1 shows the components of the complete model divided in separate parts. With this model it is possible to test the functionality of control for the OLTCtransformer as well as the power management of PV-inverters in the LV-network. Additionally more advanced control schemes can be tested, e.g. the integration of dedicated characteristic voltage measurement points within the LV network. 2.2.1 PLC The subsystem PLC presents the software model implemented later on the PLC. This subsystem is realised in such a way, that a direct download on the PLC of Bachmann is possible. The subsystem PLC contains Simulink® and Stateflow®. 2.2.2 MV-Network The subsystem MV-Network includes the HV/MV substation and the MV-network of the setup. Measured real MV profiles can be used as sources for the simulation. Later this part can exchange using a voltage source, which is controlled by the RTS or a real MV-network. 2.2.3 On-Load Tap Change Transformer (OLTC) The subsystem OLTC-transformer is a variable step transformer, which is controlled by the PLC. This subsystem contains Simulink®, Stateflow®and SimPowerSystems™ components. Later this subsystem will be exchange by the real OLTC-transformer. 2.2.4 LV-Network The subsystem LV-Network includes a model of a LV-network based on a real village including distribution lines, household loads and local energy production, mostly Photovoltaic. Real profile curves for the household and PV models are used in order to generate a realistic active and reactive power flow. This part of the simulation contains 23 PV inverters, 32 household loads, more than 100 distribution lines and up to 450 nodes.
Later the PHIL simulation of the LV-Network subsystem will be performed by variable loads, real solar cells, PV simulators and PV inverters which are available in the laboratory infrastructure. 2.3
Exchangeability of simulated components
2.3.1 Testing of a PLC For testing the PLC as HuT with the developed PLC software (SIL), the RTS and PLC are interconnected using an amplifier (cp. Figure 2.2 left side). With this setup it is possible to simulate the MV-substation, OLTC transformer and LV-network and amplify the simulated voltage and current signals in order to adapt the signal levels for the measurement input of the PLC. The used power amplifier is able to gain analog signals of voltages and currents separately up to 300 V and 30 A respectively. The PLC evaluates these signals and decides when the transformer has to change the tapping by sending a digital signal back to the simulator, where the subsystem with the OLTC changes its characteristics depending on this input-signal. Hardware RTDS
Amplifier
PLC
Amplifier
Simulation
Remote Ctrl
Hardware
PHIL
LV
OLTCTransformer
MV
Figure 2.2 Setups for HIL testing of the active and intelligent substation. Left CHIL and right PHIL. 2.3.1.1 Comparison between SIL and CHIL simulation results To validate the functionality of the PLC, the SIL simulation results (shown in Figure 2.1) is compared with the CHIL setup (see Figure 2.2 left). The results are shown in Figure 2.3. The first chart of Figure 2.3 shows the two MV profiles (24h) of the SIL and CHIL test setup. In the second chart the LV profile is shown, which stays in a predefined tolerance range of 230 V ± 2.3% due to the switching of the OLTC. Accounting the minimal difference in the MV curves between the SIL and CHIL, a small delay is seen at the switches stage of the OLTC (cp. third chart of Figure 2.3) In general, the switches in the simulation and measurement are largely the same, as well as the voltage curves. This result shows that there is a very good agreement between the software based simulation and the CHIL simulation. With regard to
the developed control of the OLTC it can be stated that the designed control algorithms also works as expected if it is running on the PLC.
Figure 2.3 Comparison of SIL and CHIL simulations 2.3.2 Testing of OLTC-transformer For testing the control of the OLTC together with PLC a setup shown in Figure 2.2 (right side) can be chosen for a first step. The RTS will generate voltage variation signals depending on the simulation model running on the RTS. The transformer is connected to a real MV grid. The test setup in the SysTec laboratory of Fraunhofer IWES is shown in Figure 2.4.
Figure 2.4 Test setup of the OLTC (bottom right), the cabinet with PLC and the PLC itself for the control of the active, intelligent substation (left side) and the RTS together with the amplifier (top right) 2.3.3 Testing of the real setup Last step in the development process is to combine all real components together in one setup. The RTS will be used to generate signals for a LV network simulator which is connected over a transformer to the MV level. Therefore it is possible to influence the MV voltage of the OLTC as desired (see Figure 2.5). To perform a true-to-life setup a LV test network with different loads and PV-inverters, either connected to real PV panels or PV simulator are used. The loads can change their impedance on demand; the PV-inverts will be controlled by PLC for active power reduction and reactive power provision.
Hardware Remote Ctrl
RTDS LVSimulator
Inverter Ctrl Grid data
LV MV
OLTCTransformer
LV
V/I Measure
Load + PV
Figure 2.5 Final PHIL setup Based on real MV data, the RTS can perform several different extreme conditions in before the components are used in the field. Particularly for this test circuit with high power, a stable running system is required to protect the equipment. For this purpose several different possibilities are discussed in following chapters.
3 3.1
STABILITY AND ACCURACY IN HIL SIMULATIONS General Issus of Power Hardware-in-the-Loop
Stability and accuracy are key elements of any PHIL simulation, since they will determine one the one side, whether the experiment will be stable or not and on the other side, how useful respectively accurate the simulation’s results will be. Since only low-level power signals are exchanged between RTS and HuT in a CHIL simulation, stability is not an issue for this application. However, in a PHIL simulation, where real power is exchanged between the interface and the HuT, stability is an issue, as its absence may put all PHIL components in danger. Instability is prone to happen in PHIL applications mainly due to the power amplification in the interface. Since this process is not ideal, errors and delays will be introduced in the loop, which are not filtered out but rather amplified in coming steps of the simulation. This is the reason, why a real application that runs stably, may not necessarily is stable, when implemented in a PHIL simulation [5]. An example of this phenomenon is shown in [4],[5], where a simple voltage divider with two load impedances (ZH and ZS) and a voltage source (U0) is implemented as a PHIL system as depicted in Figure 3.1. Sub index “H” and “S” means hardware and software side, respectively. The following example assumes that the real time simulation is performed discretely, which an appropriate approach is considering the digital processing nature of a RTS simulator.
Software ZS
i
Interface
ZS
Hardware i
i2
current feedback
V0
ZH V0
V1
V2= V1+ ε
voltage
Voltage divider
ZH
v i1 PHIL implementation of voltage divider
Figure 3.1 PHIL implementation of a voltage divider Following, the implemented PHIL system is divided in two parts: on the hardware side a voltage amplifier will be added to reproduce the simulated voltage U1 as a real voltage U2, which will be imposed to the load ZH. On the software side, the actual current I2, flowing in the hardware side, will be measured and fed back into the simulated circuit by means of a dependant current source I1.
Suppose at time tK (time-step k), an error ε occurs during the voltage amplification of voltage U2. The corresponding error in I2 is
∆U 2 (t K ) = ε & I 2 =
ε U2 ∆I 2 (t K ) = ZH ZH
(1)
When this erroneous current is fed back to the simulator, it will cause a further error in U1 in time tK+1 (time-step k+1) as
∆I 2 (t K ) =
ε ZH
&
U 1 = U 0 − Z S × I1
Z ∆U 1 (t K +1 ) = − S × ε ZH
(2)
Assuming the operation of the simulator to be discrete, the result at time-step k+1 will be that the error at time-step k is amplified by the factor
ZS > 1 . Further ZH
coming time-steps could grow the error until reaching hardware limits, which leading to instability. Due to this problem instability is a common phenomenon in any PHIL simulation, so that this issue must be addressed with priority, even at the expense of accuracy. Lehfuss [6] states, that when carrying out a PHIL simulation stability is a necessary condition, whereas accuracy is a condition that is dependent on the application. In this sense, several methods have been proposed to deal both with stability and accuracy issues in PHIL applications. 3.2
Stabilisation and accuracy methods
Stability and accuracy are two parameters in PHIL systems that need always be kept in mind. While good stability margins would permit a simulation to perform well under a wide range of different conditions, the accuracy might be low, due to the Interface Algorithm (IA) or the compensation methods used [1]. On the other side, tight accuracy margins would limit the simulation to a narrow bandwidth, reducing thereby the applicability and the flexibility of the test. There is always a compromise between stability and accuracy. The IA method, which defines the coupling between the real-time computing system and the HuT, widely determines both the stability and the accuracy of the application. For instance, the implementation of the voltage divider shown in Figure 3.2 as a PHIL system with an Ideal Transformer Method (ITM) or a
Damping Impedance Method (DIM) will yield different stability and accuracy margins. Software
Software ZS
Hardware
ZS
i
Hardware ZSH
i
i
V1
V0
V2
ZH
V0
V1
V0
Interface
+
e-sTd
V1
i*
a) Electric diagram of the ITM interface algorithm
TVA(s)
Hardware 1/ZH(s)
-
Software V0
Interface
+
e-sTd
− FOL _ ITM (s ) = e − sTD × TVA ( s ) ×
a) Open loop transfer function of the ITM interface algorithm
1/ZH(s) -
ZS(s)
Z S (s) Z H (s)
Hardware
TVA(s) +
a) Signal flow diagram of the ITM interface altgorithm
H
i
b) Electric diagram of the DIM interface algorithm
-
ZS(s)
Z
V2
V2
V1
Software
ZSH
Z*
1/Z*(s) + +
b) Signal flow diagram of the DIM interface altgorithm
− FOL _ DIM = e −sTD
Z S (Z H − Z * ) ( Z H + Z SH )( Z S + Z SH + Z * )
b) Open loop transfer function of the DIM interface algorithm
Figure 3.2 Deployment of the voltage divider using two different IA methods: ITM (figure 3.2 left) and DIM (figure 3.2 right) Figure 3.2 left shows that the deployment of a PHIL system with ITM is the most conventional and straightforward method of implementing a PHIL simulation [1], since it only requires voltage amplification on the feedforward path and a current feedback. Therefore, the ITM method presents excellent accuracy characteristics. Despite its simplicity, the ITM method presents a stable behaviour, as long as the magnitude of its open loop transfer function –FOL_ITM(s) remains smaller than one. Assuming that the voltage amplification is ideal (TVA(s)=1), stability is warranted for ratio values ZS/ZH smaller than one. From Figure 3.2 right it can be observed on the one hand, that the DIM method will be stable, because the magnitude of the open loop transfer function –FOL_DIM(s) of the DIM method will become zero for damping impedance values Z* equal to ZH. On the other hand, the DIM method will become the ITM method for values of Z* much larger than ZH, as the damping current i* will tend to zero, causing the current on the hardware side to be equal to the current on the software side. Since
the ITM method is unstable for ratio values ZS/ZH larger than one, the DIM method could become unstable as well, if the difference between Z* and ZH is large enough. To analyse the region of stability of the DIM method, the topology was simulated with Matlab/Simulink® for different resistor ratio values RS/RH and R*/RH for a given fixed time delay in the loop (i.e. 100µs). For each case, stability was verified. Figure 3.3 depicts the results obtained.
Figure 3.3 Stability region of the DIM method Observe from Figure 3.3, that for ratio values R*/RH close to one, the topology will be stable, as the value of the ratio RS/RH tends to infinity. This means, that the closer the value of Z* is to ZH, the more robust the topology will be. However, as the values of the ratio R*/RH increase, the more prone the system will be to suffer instability. This fact underlies the tight relationship between the ITM method and the DIM method for larger differences between Z* and ZH. If the HuT is a non-linear load, such as the case of a PV-inverter when going from standby-mode to operating mode the impedance of ZH will change rapidly and widely. This can cause instability in both presented topologies, as the hardware/software impedance ratio might be larger than one and as the value of the damping impedance Z* might be critically unmatched to the value of ZH. In particular, this case should be avoided, as irreversible damage to the HuT can occur.
3.3
Outlook
In order to deal with these issues, different been proposed. This approach, known as addition of diverse function blocks in the distorting parameters such as time-delay, increase.
improvements to the IA methods have interface compensation, relies on the PHIL path, that reduce the effects of signal noise or unwanted magnitude
For ITM, several interface compensation methods have been proposed. Viehweider [2] introduces the Multi-Rate Partitioning (MRP) method, where the system is partitioned in subsystems running at different rates, warranted more accuracy for fast transients and therefore better stability. The Hardware Inductance Addition (HIA) is another proposal of Viehweider [2], where the addition of an inductance in series with the HuT stabilizes the PHIL system, as long as the inductance is big enough. Similarly, the addition of a current filter on the feedback path in the Feedback Current Filtering (FCF) method will improve the stability range of the simulation, as long as the filter is well sized. For the DIM, several proposals have been presented to deal with the issue of having at all times the value of the damping impedance Z* very close to the value of the hardware impedance ZH. Ren [1] introduces a method, in which the value of the damping impedance Z* is computed in real-time, based on previous values of voltage and current measurements at the HuT as depicted in Figure 3.2. Using this method, the DIM will present a better accuracy for non-linear loads. However, an error will always be present, due to the processing time required for computing the new value of the damping impedance, which, at the end will deviate from the actual value of the hardware impedance.
Figure 3.4 DIM interface algorithm with real-time computing of Z*
3.4
Discussion
All interface compensation methods presented above rely on the fact of adding an external function block to the original system to mitigate the effects of destabilizing events, such as time delay or signal noise. Yet it must be taken into account, that the addition of the function blocks might in fact grant better simulation stability margins, but at the expense of accuracy. For instance, the HIA method will assure a stable behaviour of the PHIL application as long as the value of the added impedance is big enough, but at the same time, the bigger the value of the impedance, the less accuracy the simulation will have. One aspect to keep in mind is that all compensation methods require a priori knowledge of the HuT. For instance, the FCF method will require the value of the impedance of the HuT in order for the cut-off frequency of the feedback filter to be set. This may sound contradictory, as the goal of a PHIL simulation is to gather information about the HuT, whose behaviour is not (completely) known at the beginning of the test. In this case, an estimate of the parameters of interest of the HuT (i.e. the hardware impedance value for the FCF method) will need to be performed in advance, to set an upper bound limiting case, enabling thereby an initial run of the simulation. By this approach, the applicability for PHIL simulations can be massively increased [5]. Another aspect to keep in mind is that different IA methods present different ways to deal with the problematic of requiring a priori knowledge about the HuT in question. Whereas the ITM does not necessitate any knowledge about the HuT, the DIM will do so to set the value of the damping impedance. Yet, the accuracy of the ITM will be higher than the DIM, especially for cases where there is none or poor knowledge about the HuT. 4
CONCLUSION
One way to bridge the gap between simulation and real conditions is HIL simulation. Rather than testing the system on a purely mathematical model, one can use real hardware in the simulation loop [10]. Real-Time simulation in case of development process for distributed energy resources is the next quantum leap in the evolution of HIL technologies. The main reasons for using Hardware-in-the-Loop simulation are: •
Reduction of development cycle
•
Prevention of costs and dangerous failures
•
Extensive test control of HuT in order to meet safety and quality requirements
•
Testing of new network equipment under real terms integrated in complex power system structures before application within the real network with real customers
As seen in chapter 2.3.1, a good match between the SIL and CHIL simulations could be achieved. This accuracy, which can be achieved with only software based simulation and the possibility of implementation on a laboratory test setup shows that a replication itself on the level of simulation before testing with hardware components is meaningful for on-time identification of vulnerabilities. Particularly with regard to test under real power, combination between stability and accuracy is the big challenges. The new method of DIM with real-time computing of the hardware resistor could be a future step in good combination of accurate and stable PHIL.
5
ACKNOWLEDGEMT
We acknowledge the support of our work by the German Ministry for the Environment, Nature and Nuclear Safety and the Projekträger Jülich within the project “Aktives intelligentes Niederspannungsnetz” (FKZ 0325202). Only the authors are responsible of the content of the publication.
6
REFERENCES
[1]
W. Ren, M. Steurer, T. L. Baldwin, “Improve the Stability and the Accuracy of Power Hardware-in-the-Loop Simulation by Selecting Appropiate Interface Algorithms”, IEE Transactions on Industry Applications, Vol. 44 No. 4, August 2008
[2]
A. Vieweider, G. Laus, F. Lehfuss, „Stabilization of Power Hardware-inthe-Loop simulations of electric energy systems“, Simulation Modelling Practice and Theory, 2011
[3]
J. Bélanger, P. Venne, J.-N. Paquin, “The What, Where and Why of RealTime Simulation”
[4]
W. Ren, “Accuracy evaluation of Power-Hardware-in-the-Loop (PHIL) Simulation”, PhD Thesis Dissertation, The Florida State University, 2007
[5]
F. Lehfuss, G. F. Lauss, “Power Hardware-in-the-Loop Simulations for Distributed Generation”, 21st International Conference on Electricity Distribution CIRED, June 2011
[6]
F. Lehfuss, “Real-Time Simulations with Power Hardware-in-the-Loop of low-voltage grids with photovoltaic generation”, Master Thesis, Carinthia University of Applied Sciences, Villach, 2010
[7]
W. Ren, M. Sloderbeck, M. Steurer, V. Dinavahi, T. Noda, S. Filizadeh, A. R. Chevrefils, M. Matar, R. Iravani, C. Dufour, J. Belanger, M. O. Faruque, K. Strunz, and J. A. Martinez, “Interfacing Issues in Real-Time Digital Simulators”, IEEE Transactions on Power Delivery, vol. 26. no. 2, pp 1221 – 1230, April 2011
[8]
VDE-AR-N 4105: “Erzeugungsanlagen am Niederspannungsnetz, Technische Mindestanforderungen für Anschluss und Parallelbetrieb von Erzeugungsanlagen am Niederspannungsnetz” August 2011
[9]
M. Steurer, W. Ren, M. Sloderbeck, S. Woodruff, “Controller and Power Hardware-In-Loop Methods for Accelerating Renewable Energy Integration“ Summer 2007
[10]
C- Zhang, Y. Vijapurapu, A. Srivastava, N. Schulz, J. Bastos, “A Standardized Simulation and Real Time Hardware in the Loop Simulation Procedure for Power Electronics and Power Systems Research” Summer 2007
[11]
S. Ayasun, R. Fischl, S. Vallieu, J. Braun, D. Cadirli, “Modeling and stability analysis of a simulation-stimulation interface for hardware-inthe-Loop applications”
