Extending the Heat Flux Limit with Enhanced Microchannels in Direct Single Phase Cooling of Computer Chips Satish G. Kandlikar1 and Harshal R. Upadhye Thermal Analysis and Microfluidics Laboratory, Mechanical Engineering Department, Rochester Institute of Technology, Rochester, NY 14623 1
[email protected] Abstract The high heat transfer coefficients in microchannels are attractive for direct cooling of computer chips requiring high heat-flux removal. However, the high heat removal capability of microchannels is associated with a severe pressure drop penalty. Channel size optimization therefore becomes necessary in selecting an appropriate channel geometry configuration. As the heat flux increases beyond about 2 MW/m2, the heat transfer and pressure drop characteristics of the plain channels dictate the use of turbulent flow through the channels, which suffers from an excessive pressure drop penalty. It therefore becomes essential to incorporate enhancement features in the microchannels and multiple passes with shorter flow lengths to provide the desired solution. Results obtained from a theoretical analysis are presented as parametric plots for the heat transfer and pressure drop performance of a 10×10-3 m × 10×10-3 m (10 mm x 10 mm) silicon chip incorporating plain microchannels. The enhanced microchannels with offset strip fins in single-pass and split-flow arrangements are also investigated. The results show that the enhanced structures are capable of dissipating heat fluxes extending beyond 3 MW/m2 using water as the coolant in a split-flow arrangement with a core pressure drop of around 35 kPa. Keywords Microchannels, Electronics Cooling, Channel Geometry, Pressure Drop, Optimization. Nomenclature Ac cross-sectional area of fin, m2 Adiv area offered by each division for heat transfer, m2 effective channel area for heat transfer considering Aw the fin efficiency effects, m2 a channel width, m b channel depth, m Cp specific heat at constant pressure, J/kg-°C d hydraulic diameter of the channels, m apparent friction factor fapp gc acceleration due to gravity, m/s2 h heat transfer coefficient, W/m2-°C k thermal conductivity of water, W/m-°C kf thermal conductivity of the fin material (silicon), W/m-°C L channel length, m m fin efficiency constant defined by Eq. (6) •
mc n
mass flow rate through a single channel, kg/s number of parallel microchannels
0-7803-8985-9/05/$20.00 ©2005 IEEE-
Nu P Pr Q Qdiv q” Re s Tb Tout Tin Ts um W x
Nusselt number perimeter of channel, m Prandtl number heat rate, W heat dissipated per element, W heat flux based on the base area, W/m2 Reynolds number thickness of the fin, m Fluid bulk temperature, °C temperature at the outlet of the microchannels, °C temperature at inlet of the microchannels, °C surface temperature at the base of the heat sink, °C mean fluid velocity through the microchannel, m/s width of the chip area being cooled, m axial distance from the entrance of the channel, m
x+ x*
hydrodynamic entry length thermal entry length
Greek Symbols αc channel aspect ratio, a/b αf fin aspect ratio, s/b ∆p core frictional pressure microchannel, Pa ηf fin efficiency µ dynamic viscosity, N-s/m2 ρ
drop
across
the
density, kg/m3
1. Introduction Thermal management of electronic devices is one of the important aspects of electronics packaging. Air has been the fluid of choice in such cooling applications. With the rapid advances in microelectronics technology, the volume occupied by the devices has reduced considerably. But with increasing demand for faster and more efficient processors, the number of circuits and the power dissipation per unit volume has also increased. The combined effect of this has lead to an increase in the heat flux that needs to be removed from the chip surfaces. There is also a desire to reduce the junction temperature, as the increased temperature adversely affects the electrical performance of the devices and reduces their reliability. Possible damage involves junction fatigue, changes in electrical parameters and thermal runaway. Direct cooling of chips offers a practical solution to the heat dissipation problem. In such systems, water (with possible addition of antifreeze to allow cold weather shipments) is circulated in microchannels fabricated on the chip substrate. Such systems need to be carefully designed to meet the cooling requirements under the operational constraints. Pressure drop is an important parameter which 21st IEEE SEMI-THERM Symposium
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governs the pump selection, required pumping power, and the maximum pressure to which the chip is subjected. In the present work, an analysis is carried out to optimize the channel configuration that yields a minimum pressure drop for a given heat load. The constraints for the optimization are the maximum allowable chip temperature, heat dissipated, pressure drop for the fluid stream flowing through the channels, and the manufacturing constraints. The manufacturing constraints are not addressed in the present work. The analysis is extended to an enhanced microchannel incorporating offset strip-fin configuration in single-pass and split-flow arrangements. 2. Literature Review Microchannel heat sink concept was first introduced by Tuckerman and Pease [1]. The heat sink they manufactured was able to dissipate 7.9 MW/m2 with a maximum substrate temperature rise of 71 °C and a pressure drop of 186 kPa. Phillips [2] presented a detailed analysis of the forced convection liquid cooled microchannel heat sinks. Recent investigations include the work by Upadhye and Kandlikar [3], Kandlikar and Grande [4], Steinke and Kandlikar [5], Bergles et al. [6], Qu and Mudawar [7], and Ryu et al. [8]. Upadhye and Kandlikar [3] presented an analysis for optimizing the microchannel geometry for direct chip cooling using single-phase heat transfer with water as the working fluid. A chip with an active cooling area of 25.4×10-3 m × 25.4×10-3 m (25.4 mm × 25.4 mm) was analyzed. A fully developed laminar flow with constant channel wall temperature or constant heat flux condition was considered. The analysis showed that a narrow and deep channel is better than having a wide and shallow channel from the heat transfer and pressure drop perspectives. For the chip size considered, and with a heat load of 1 MW/m2, a channel width between 150×10-6 m (150 µm) and 250×10-6 m (250 µm) was found to result in the lowest pressure drop for a channel depth of 250×10-6 m (250 µm). Kandlikar and Grande [4] discussed the cooling limits of the plain rectangular microchannels with water cooling for high heat flux dissipation and illustrated the need for enhanced microchannels. Steinke and Kandlikar [5] carried out an extensive review of conventional single-phase heat transfer enhancement techniques. Several passive and active enhancement techniques for minichannels and microchannels were discussed. Some of their proposed enhancement techniques include fluid additives, secondary flows, vibrations, and flow pulsations. Bergles et al. [6] discussed the design considerations for small diameter internal flow channels. A design problem with a given heat rate and chip dimensions was studied in detail, the main focus being on pumping power and material thickness requirement. They concluded that cooling systems having smaller diameter channels result in a compact system and generally not impose a larger pumping power requirement. Qu and Mudawar [7] tested microchannel heat sinks 10×10-3 m (10 mm) in width and 48×10-3 m (48 mm) long. The microchannels machined in the heat sink were 231×10-6 m (231 µm) wide and 712×10-6 m (712 µm) deep. They also presented a numerical analysis for a unit cell containing a Kandlikar,et.al, Extending the Heat Flux Limit with …..
single microchannel and the surrounding heat sink material. The measured pressure drop across the channels and the temperature distribution showed good agreement with their numerical results. They concluded that the conventional Navier-Stokes and energy equations remain valid for predicting fluid flow and heat transfer characteristics in microchannels. Ryu et al. [8] performed a numerical optimization of thermal performance of microchannel heat sinks. The objective of the optimization was to minimize the convective thermal resistance of the fluid. They varied the channel width, channel depth, and fin thickness to arrive at an optimized solution. They observed that the channel width is the most important parameter governing the performance of a microchannel heat sink. Knight et al. [9] derived the governing equations for fluid flow and heat transfer in a microchannel heat sink in a dimensionless form and presented a scheme for solving these equations. Solution procedures for both laminar flow and turbulent flow were presented. 3. Objectives of the Present Work The objectives of the present work are: 1. Develop an algorithm to analyze the heat transfer and pressure drop characteristics of a given chip cooled with plain and enhanced microchannels by incorporating the developing flow effects. 2. Present the results in a parametric form to identify the optimum geometrical configuration that meets the cooling requirements and results in the lowest core frictional pressure drop. 3. Study the effects of enhanced microchannels incorporating the offset strip-fins. 4. Study the effects on incorporating a split-flow arrangement with enhanced microchannels. 4. Assumptions The heat transfer and pressure drop analysis are developed under the following major assumptions 1.
2.
3.
4. 5.
Constant heat flux on the channel walls – The boundary condition on the microchannel walls is assumed to be axially constant wall heat flux with circumferentially constant wall temperature. The heat flux along the length of the channel is constant, while the wall temperature varies along the channel length in the flow direction. Heat losses from the cover plate are neglected – The cover plate on the microchannels is assumed to be insulated and hence the fin tip can be considered to be under adiabatic tip boundary condition. The solution obtained will be on the conservative side by neglecting the heat losses from the cover plate. The coolant flow is steady and incompressible – Since the working fluid is water and the maximum pressure drop is generally less than 100 kPa, the incompressible flow assumption should be valid. Uniform heat flux over the active chip surface area is assumed with no local hotspots. Constant properties are assumed for both the cooling fluid (water) and the wall material (silicon). 21st IEEE SEMI-THERM Symposium
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6.
A single-pass arrangement with plain microchannels is considered. The analysis is later modified to analyze enhanced microchannels and the split-flow arrangement.
5. Analysis A chip with L=10×10-3 m (10 mm) and W=10×10-3 m (10 mm) active cooling surface area and a microchannel depth b = 200×10-6 m (200 µm) is considered as shown in Fig. 1. Microchannels are fabricated on one side and the heat dissipating devices are placed on the other side of the chip. The maximum temperature of the channel walls is to be maintained below 360 K with an inlet water temperature of 300 K. The analysis uses the specified channel depth (as governed by the manufacturing constraints) and does not include the silicon thermal resistance between the channel bottom wall and the chip surface receiving heat. The analysis can however be extended to include this resistance if desired. Similarly, other chip geometries, channel depths, and fluid inlet temperatures can be readily handled.
Cover plate
The fin aspect ratio
αf =
L
W Fig. 1 Microchannel geometry The dimensions of the microchannels, width a and fin thickness s, are the main parameters of interest. The length of the channels L is fixed by the prescribed geometry of the chip for which the cooling passages are designed. The channel depth b is assumed to be known. This is due to the fact that the channel depth is governed by the manufacturing process and the chip configuration. The channel width a and the fin thickness s together will determine the number of parallel channels that can be accommodated. The wall thickness s has a lower limit of 30×10-6 m (30 µm), which represents the minimum thickness that can be readily manufactured with the current microfabrication technology. In an effort to arrive at a common terminology in the microchannel heat sink application, three non-dimensional parameters – channel aspect ratio, fin aspect ratio and fin spacing ratio – are defined and described below. The channel aspect ratio
αc
is defined as the ratio of the
a b
from 0 to 1 ( 0 < α c ≤ 1 and 0 < α f ≤ 1 ).
(1)
αc
αf Although α c and
is >1
can be employed, this configuration is of little practical interest as narrow and deep channels (with α c 1 does not yield any benefits with the silicon substrate from fin efficiency considerations. The ratio of the fin aspect ratio to the channel aspect ratio plays an important role in the heat transfer analysis. It is defined as the fin spacing ratio β and is given by:
αf s = αc a
(3)
The practical range for the fin spacing ratio is also β
