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Dec 9, 2003 - 1K. Hadobás et al., Nanotechnology 11, 161 2000. 2S. Walheim et al., Science 283, 520 1999. 3Y. Kanamori, M. Sasaki, and K. Hane, Opt. Lett.
Fabrication of large area subwavelength antireflection structures on Si using trilayer resist nanoimprint lithography and liftoff Zhaoning Yu,a) He Gao, Wei Wu, Haixiong Ge, and Stephen Y. Chou Department of Electrical Engineering, Nanostructure Laboratory, Princeton University, Princeton, New Jersey 08544

共Received 24 June 2003; accepted 25 August 2003; published 9 December 2003兲 In this article we report on the fabrication of subwavelength antireflection structures on silicon substrates using a trilayer resist nanoimprint lithography and liftoff process. We have fabricated cone-shaped nanoscale silicon pillars with a continuous effective index gradient, which greatly enhances its antireflective performances. Our measurements show that the two-dimensional subwavelength structure effectively suppresses surface reflection over a wide spectral bandwidth and a large field of view. A reflectivity of 0.3% was measured at 632.8 nm wavelength, which is less than 1% of the flat silicon surface reflectivity. © 2003 American Vacuum Society. 关DOI: 10.1116/1.1619958兴

I. INTRODUCTION The phenomenon of antireflection 共AR兲 is used widely to reduce insertion losses at the interfaces between different optical media. Multilayered thin-film coatings are commonly used on the surfaces of lenses, solar cells, light-sensitive detectors, displays, viewing glasses, etc., to suppress undesired reflections.1 Although thin-film technology is widely used for the mass production of AR coatings on different surfaces, it is also associated with problems such as adhesion, thermal mismatch, and the stability of the thin-film stack.2,3 An alternative to thin-film coatings is to pattern the surface with a periodically structured array, so that the periodicity is smaller than the wavelength of the incident light. In this case, the subwavelength-antireflective-structured 共SAS兲 array will not be resolved and it behaves like a homogeneous medium, with an effective index of refraction determined by the dielectric fill factor.4,5 Theoretical studies indicate that by introducing a continuous effective index gradient between the substrate and the surrounding medium, surface reflection can be greatly reduced for a wide spectral bandwidth and over a large field of view.5–7 Compared with multi-layered dielectric AR coatings, SAS surfaces are more stable and durable, because the AR structures are directly etched in the surface and there are no other materials involved. They are also more suitable for highenergy ultraviolet and infrared applications where damageresistant AR coatings may not exist. To introduce the effective refractive index gradient required for AR applications, subwavelength-structured patterns with tapered profiles and high aspect ratios are highly desirable.7 However, fabrication of this type of threedimensional structure reliably over large area remains a challenge. In this article, we demonstrate the fabrication of SAS surfaces using a trilayer-resist nanoimprint lithography 共NIL兲8 a兲

Author to whom correspondence should be addressed; electronic mail: [email protected]

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and liftoff process. Compared with other methods reported before,9–12 our process is low-cost, high-throughput, and is compatible with the planar semiconductor device fabrication technology. Large-area SAS surfaces on silicon have been fabricated and characterized, and the measurement results will also be presented. II. FABRICATION The process we use to fabricate structures with tapered profiles includes two steps: 共1兲 creating a metal grating mask with a triangular 关for one-dimensional 共1D兲 structure兴 or pyramidal 关for two-dimensional 共2D兲 structure兴 profile by NIL and liftoff; and 共2兲 etching of the underlying substrate using reactive ion etching 共RIE兲. We used a trilayer resist scheme to create the thick metal RIE mask with triangular cross section for the liftoff process. The resist stack has: 共1兲 a cross-linked polymer bottom layer 共Brewer Science ARC® XHRiC兲 with a thickness of 200 nm; 共2兲 a 20 nm thick dielectric (SiO2 ) middle layer deposited by standard electron-beam evaporation; and 共3兲 a 200 nm thick top layer of an in-house developed imprint resist with a glass transition temperature of about 85 °C. Figure 1 shows a schematic of the steps for the tri-level resist NIL and liftoff process. The top resist layer is first patterned with gratings or 2D hole arrays by nanoimprint lithography using molds fabricated by interferometric lithography.13,14 Although this step requires elevated temperatures (85– 120 °C) and high pressures 共50–200 psi兲, the bottom layer remains unaffected by NIL because it is crosslinked and remains stable under these conditions. The grating pattern created by NIL is then etched through the resist stack using a process consisting of Cr shadow evaporation15 共the relief structure is coated at an oblique angle兲 and a three-step RIE (O2 for the top layer, CHF3 /O2 for the SiO2 middle layer, and O2 again for the bottom layer兲. The dielectric middle layer serves two functions in this process: first, it is a mechanical reinforcement preventing the resist stack from collapsing during the RIE, so resist struc-

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©2003 American Vacuum Society

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FIG. 3. SEM image of the cross-sectional view of a tapered SiO2 grating with 200 nm period etched by CHF3 /O2 RIE, masked by a 100 nm thick Cr grating with triangular profile. The grating was etched 800 nm deep into a 1.2 ␮m thick thermal oxide layer on a silicon substrate.

FIG. 1. Schematic showing the steps for creating a metal mask with triangular cross section using the trilayer resist NIL and liftoff process: 共a兲 creating grating pattern in the top resist layer by NIL; 共b兲 pattern transfer through the trilayer resist stack by a three-step RIE; 共c兲 evaporating metal onto the substrate; and 共d兲 liftoff.

tures with high aspect ratios can be created; second, because SiO2 is very resistant to O2 RIE, it provides undercut in the resist profile for the following liftoff step. After the resist stack was etched through, metal was evaporated onto the sample surface at normal incidence to form the RIE mask. When a very thick 共50–100 nm兲 metal layer 共Cr or Ni兲 is evaporated, the opening at the top of trenches closes up gradually due to the self-shadowing effect,16 and as a result, metal that reaches the bottom of the trenches will develop a triangle-shaped cross-sectional profile. Figure 2 shows a scanning electron micrograph 共SEM兲

FIG. 2. SEM image of a 200 nm period grating after the evaporation of 100 nm Cr. Metal RIE mask with triangle-shaped cross section is formed as a result of the self-shadowing effect during evaporation. High aspect ratio of the resist structure and undercut in resist profile will ensure a relatively easy liftoff. JVST B - Microelectronics and Nanometer Structures

image of a 200 nm resist grating after the deposition of 100 nm Cr by evaporation at normal incidence. Undercut in the resist profile and the triangular-profiled metal mask can be clearly seen in the picture. Although the evaporated metal is very thick compared with the nanograting feature size, high-aspect ratio of the resist structure and undercut in the resist profile ensure there is no linkage between the metal deposited on top of the resist pattern and the metal deposited on the bottom of the trenches, therefore liftoff can be easily done with the assistance of a spray gun. With the triangular-profiled metal grating as the etching mask, the underlying silicon substrate was etched using a CHF3 /O2 RIE. The same etching recipe was used for all of the samples discussed in this article. Because the metal was also slowly eroded away during the RIE, tapered 1D or 2D gratings can be created in the substrate through prolonged etching, starting with a triangular 共1D兲 or pyramidal-profiled 共2D兲 metal grating mask. Figure 3 shows a SEM of the cross-sectional view of a tapered SiO2 grating with a period of 200 nm. A 100 nm thick Cr grating with triangle-shaped profile served as the RIE mask. The grating depth is around 800 nm. It was etched into a 1.2 ␮m thick thermal oxide layer on top of a silicon substrate. Figure 4 shows a SEM image of the 2D cone-shaped array etched into a silicon substrate, using a pyramidal-shaped 100 nm thick Ni dot array as the RIE mask. This twodimensional structure has a period of 200 nm and a height of approximately 520 nm. The SEM image also indicates that these pillars have a nearly ideal conical profile, which corresponds to a smooth graded index transition from air to the silicon substrate.

III. CHARACTERIZATION Since the nanograting imprint molds used in our experiment were patterned using large-scale interferometric lithography,14 we were able to fabricate both 1D and 2D SAS

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FIG. 4. SEM image of 2D grating with conical profile created on a silicon substrate by CHF3 /O2 RIE, masked by a 100 nm thick pyramid-shaped Ni dot array. The grating has a period of 200 nm and a groove depth of 520 nm.

surfaces on silicon substrates over large area (4 cm ⫻4 cm), which enables easy optical characterization of the subwavelength structures. Figure 5 shows the measured reflectivity of the silicon 2D SAS surface shown in Fig. 4 as a function of the wavelength. A monochromator was used for the measurement. The incident light was randomly polarized and the incident angle was 5°. Our measurement clearly shows that, compared with unpatterned flat silicon surfaces, the SAS surface decreases reflection drastically. The reflectivity of the SAS surface is on average less than 3% at wavelengths in the visible region. Coincidentally, at the wavelength of 632.8 nm, the reflectivity is decreased to less than 1% of that of a bare silicon substrate 共from 35% to 0.3%兲. In Fig. 6 measured reflectivity of the silicon 2D SAS surface is shown as a function of the angle of incidence. The sample was measured using a He–Ne laser (␭⫽632.8 nm) at incident angles from 5° to 85° for both p and s polarizations, where p and s denote planes of incidence parallel and

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FIG. 6. Polarization-dependent reflectivity of the 2D silicon SAS surface as functions of incident angle at a wavelength of 632.8 nm. Measured reflectivity of a bare silicon wafer is also shown in the graph for comparison.

perpendicular, respectively, to the electric field of the incident light. For the s polarization, the reflectivity of the SAS surface remains below 1% at incidence angles from 5° to 60°. For the p polarization, the reflectivity of the SAS surface is less than 1% at incidence angles from 5° to 25°. It should be pointed out that while the p polarization reflectivity of bare silicon surfaces decreases with the angle of incidence until it reaches its minimum at the Brewster angle, our silicon 2D SAS surface shows a p polarization reflectivity that increases with the angle of incidence, and it does not have a minimum in its reflectivity, which is very different from the Fresnel reflection characteristics of a flat dielectric surface. IV. CONCLUSION In conclusion, we have demonstrated the fabrication of subwavelength-scale 1D and 2D periodic structures with a tapered profile using a process combining trilayer resist NIL, liftoff, and RIE. Those tapered subwavelength structures can be used to create an effective index gradient at the interfaces between optical media with different indices of refraction. This effect drastically reduces surface Fresnel reflection over a broad spectral range and a wide field of view. A 2D subwavelength broadband antireflection structure on silicon with a reflectivity of 0.3% at 632.8 nm wavelength has also been demonstrated. This technology is compatible with semiconductor device fabrication techniques and could be used for AR applications in solar cells and other electro-optical devices. ACKNOWLEDGMENTS This work was supported in part by DARPA and ONR. K. Hadoba´s et al., Nanotechnology 11, 161 共2000兲. S. Walheim et al., Science 283, 520 共1999兲. 3 Y. Kanamori, M. Sasaki, and K. Hane, Opt. Lett. 24, 1422 共1999兲. 4 A. Yariv and P. Yeh, J. Opt. Soc. Am. 67, 438 共1977兲. 1

FIG. 5. Wavelength dependence of the measured reflectivity of the 2D silicon SAS surface 共shown in Fig. 4兲; measured reflectivity of a bare silicon wafer is also shown in the graph for comparison. J. Vac. Sci. Technol. B, Vol. 21, No. 6, NovÕDec 2003

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