IEEE PHOTONICS TECHNOLOGY LETTERS, VOL. 15, NO. 7, JULY 2003
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First Fully Integrated 2-D Array of Single-Photon Detectors in Standard CMOS Technology A. Rochas, M. Gösch, A. Serov, P. A. Besse, R. S. Popovic, Member, IEEE, T. Lasser, and R. Rigler
Abstract—A two-dimensional (2-D) array (4 by 8) of single-photon avalanche diodes integrated in an industrial complementary metal–oxide–semiconductor (CMOS) process is presented. Each pixel combines a photodiode biased above its breakdown voltage in the so-called Geiger mode, a quenching resistor, and a simple comparator. The pitch between the pixels is 75 m and the diameter of each pixel is 6.4 m. The full integration allows reducing the number of charge carriers in a Geiger pulse. The electroluminescence responsible for optical crosstalks between pixels is then reduced leading to a negligible optical crosstalk probability. Thanks to the cleanness of the fabrication process, no afterpulsing effects are noticed. At room temperature, most of the pixels exhibit a dark-count rate of about 50 Hz. The detection probability is almost identical for all 32 pixels of the array with relative variation in the range of a few percents. This letter demonstrates the feasibility of an array of single-photon detectors sensitive in the visible part of the spectrum. Besides low production costs and compactness, an undeniable benefit lies in the potential to easily modify the design to fit a specific application. Furthermore, the CMOS integration opens the way to on-chip data processing. Index Terms—Geiger mode, optical crosstalks, silicon complementary metal–oxide–semiconductor (CMOS) technology, singlephoton avalanche diode (SPAD).
I. INTRODUCTION
S
INGLE-PHOTON detection in the visible is widely used in scientific or industrial applications. Among them, methods like fluorescence lifetime measurements [1] and fluorescence correlation spectroscopy [2] use such photon sensitivity in order to detect single molecules. In most of the experiments, a parallel analysis of individual spots in microarrays or in microfluidic channels is essential to reduce the acquisition time [3]. An array of single-photon detectors is then very advantageous. Today, single-photon counting modules based on photomultiplier tubes or silicon avalanche photodiodes (APDs) are commercially available. Nevertheless, the bulky design of these products prevents their integration in sizeable arrays. In previous works [4], [5], small arrays of co-integrated single-photon avalanche Manuscript received January 7, 2003; revised March 25, 2003. This work was supported by the CTI Project 5814.1 SUS. A. Rochas, P. A. Besse, and R. S. Popovic are with the Institute of Microelectronics and Microsystems, Swiss Federal Institute of Technology, CH-1015 Lausanne, Switzerland (e-mail:
[email protected]). M. Gösch is with the Institute of Imaging and Applied Optics, Swiss Federal Institute of Technology, CH-1015 Lausanne, Switzerland. He is also with Gnothis S. A., CH-1015 Lausanne, Switzerland. A. Serov and T. Lasser are with the Institute of Imaging and Applied Optics, Swiss Federal Institute of Technology, CH-1015 Lausanne, Switzerland. R. Rigler is with the Institute of Imaging and Applied Optics, Swiss Federal Institute of Technology, CH-1015 Lausanne, Switzerland. He is also with the Karolinska Institute, S-17177 Stockholm, Sweden. Digital Object Identifier 10.1109/LPT.2003.813387
Fig. 1. Pixel content (grey rectangle) and connection to the read-out circuit.
diodes (SPADs) combined with discrete components electronics connected to each diode have been proposed. Besides the drawbacks of such hybrid solutions, detrimental optical crosstalks between pixels have been reported. We recently published [6] a new design idea to integrate APDs in an industrial complementary metal–oxide–semiconductor (CMOS) process. Then, we fully characterized a SPAD biased above breakdown in the Geiger mode [7]. In this letter, we fabricate a compact two-dimensional array of SPADs integrated in CMOS with the required quenching circuits and read-out electronics. A general description of the miniaturized pixel and of the array is first given. Main features are then presented including dark-count rate, afterpulsing, optical crosstalks, and detection probability. II. PIXEL AND ARRAY PRESENTATION Fig. 1 shows the schematic of the pixel and the connection to the read-out electronic circuit. The diode design is described in [6]. Each anode of the 32 SPADs is biased with a high negequal to 18.5 V. The remaining part of ative voltage V the CMOS chip is kept between ground (GND) and the supply voltage (VDD) equal to 5 V. A pixel combines a circular SPAD of 270 k placed in series between and a quenching resistor the cathode of the SPAD and VDD. The breakdown voltage V of the SPAD being 21 V, the diode is, thus, biased with an excess voltage above breakdown V of 2.5 V. At each pixel site, a simple comparator based on the structure of a standard inverter is implemented as well. The design of the transistors allows us to set the input threshold voltage at 3 V for output switching. As long as no charge carriers enter in the multiplication region, no current flows in the diode. When a photon strikes the SPAD, the avalanche builds up. The avalanche current simultaneously discharges the diode capacitance (and parasitic capacitances attached to Node A) and induces a voltage drop over . V (equal to The voltage across the diode decreases from V V VDD) to V . The voltage at Node A changes from
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IEEE PHOTONICS TECHNOLOGY LETTERS, VOL. 15, NO. 7, JULY 2003
Fig. 3. Dark-count rate of the 32 SPADs (a) at room temperature and (b) at 20 C.
0 Fig. 2.
Picture of the CMOS 32-pixels array.
5 to 2.5 V. Therefore, the output of the comparator switches to VDD. The avalanche current is passively quenched in a few nanoseconds [7]. Then, the recharge process starts with a time constant of about 30 ns. A very short dead time of about 32 ns is measured [7]. During the recharge, voltage at Node A increases from 2.5 V to VDD. The comparator output switches to GND. A photon detection is then reflected by a robust signal able to drive any logic gate. In the four rows by eight columns array, the four SPADs of each column can be read in parallel (see four output pads of Fig. 2). A simple address circuit based on four standard eight-inputs multiplexers allows an external selection (by binary combination of S0, S1, and S2) of the column reading at the outputs. The CMOS chip including connecting pads is only 1.35 mm in area. The pitch between the SPADs is 75 m. Each SPAD has a photosensitive part with diameter of 6.4 m. One should notice that the pixel can be further miniaturized by substituting the for a transistor working in the polysilicon quenching resistor saturation region. III. ARRAY CHARACTERIZATION
Fig. 4. Normalized autocorrelation function of the CMOS-SPAD.
line of the silicon foundry has been changed, leading to a significant reduction of the dark counts. Furthermore, afterpulsing effects completely disappear. Afterpulses are related to trapped carriers in the depletion region during an avalanche event. If released after the recharge of the SPAD, the trapped carrier may induce an unwanted pulse, correlated with a previous avalanche event. In Fig. 4, the normalized autocorrelation function [3] of the output signal of a pixel for white-light source illumination is shown. During the measurements, the pixel was illuminated to obtain an equivalent counting rate of 10 kHz. No autocorrelation is obtained at any for our detector. The absence of afterpulses in our device is of the greatest interest in laser-induced fluorescence in the microsecond range experiments and dynamic processes.
A. Dark-Count Rate and Afterpulsing In a SPAD, thermal generation produces avalanche events even in the absence of illumination. The Poissonian fluctuation of the dark counts represents the noise level of the detector. The dark-count rate of each of the 32 pixels is measured at room temperature [see Fig. 3(a)]. Most of the pixels exhibit a remarkably low dark-count rate of about 50 Hz. Four pixels have a slightly higher dark-count rate, still below 150 Hz. Only one pixel has a much higher dark-count rate of about 3800 Hz. As the dark-count rate of a SPAD is extremely dependent on the cleanness of the fabrication, such a disparity between the pixels is not surprising. We suspect that the defective pixel of the array has a punctual defect (cluster of impurities or dislocation) in the crystal lattice. For some applications, the dark-count rate of the defective pixel can be above the acceptable value. However, by a reasonable cooling at 20 C [see Fig. 3(b)], the dark-count rate of this pixel can be strongly reduced at about 300 Hz. At this temperature, others SPADs own an outstanding dark-count rate below 10 Hz. Compared with [7], the complete fabrication
B. Optical Crosstalks and Thermal Effects Investigation In an array of SPADs integrated on the same chip, it is particularly important to judge the probability of optical crosstalks between pixels. During an avalanche event, some photons are emitted because of electroluminescence effect and may be detected by neighboring pixels [4], [5]. The travel duration of a photon between pixels is less than one picosecond. The timing resolution of a pixel is as low as 50 ps [7]. The maximum duration between emitter pixel and receiver pixel pulses is, thus, given by the quenching time which is less than 2.5 ns [7]. Two experiments have been done in our laboratory to evaluate optical crosstalk probability. First, a crosscorrelation function of the signals of two illuminated neighboring pixels has been completed. A delay line of 150 ns was applied to one of the channels. The crosscorrelation was analyzed in a window centered at 150 ns. No evidence of crosscorrelated pulses has been noticed. Second, using a two-inputs oscilloscope triggered on a pixel signal (considered as the emitter), the probability to observe
ROCHAS et al.: FIRST FULLY INTEGRATED 2-D ARRAY OF SINGLE-PHOTON DETECTORS
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IV. CONCLUSION
Fig. 5. Detection probability of the pixel at = 500 nm.
a pulse in a 50-ns time window after triggering in the neighboring channel (considered as the receiver) has been measured. The probability was found equal to the probability to observe a pulse in the same time window chosen at random. We conclude that the crosstalk probability is negligible in the array. In comparison with previous results [4], [5], the co-integration of the quenching resistor and the diode allows a drastic reduction of parasitic capacitances. The quenching time is then reduced; i.e., the number of charge carriers in a Geiger pulse is limited. As the electroluminescence intensity is linked to the number of carriers in an avalanche pulse, full integration is undoubtedly beneficial to keep the optical crosstalk probability at a negligible level. An additional benefit of the low number of carriers in a pulse lies in the control of thermal heating at high counting rate. In our laboratory, the array was illuminated in order to obtain a counting rate of 20 MHz for each pixel. No drift of the count rate was observed. C. Photon Detection Probability Fabricated in a planar process, the depletion region of the CMOS-SPAD is thin (in the order of 1 m) and close to the surface. Therefore, the photon detection probability peaks in the blue range and decreases in the red–infrared as less and less photons are absorbed in the depletion region. At 2.5-V excess bias voltage, the detection probability peaks at about 0.2 at nm and is still 0.05 at nm [7]. To judge the disparity of the detection probability between the 32 pixels, the nm. The measured dearray was uniformly lighted at tection probabilities are plotted on Fig. 5. For all the pixels, the detection probability reaches almost the same level. The mean value over the array is about 0.175. The relative variation of the 2.5%. One detection probability in the array is in the range should notice that the defective pixel behaves normally in terms of photon detection.
For the very first time, the feasibility of a fully integrated array of SPADs is demonstrated. The used industrial CMOS process guarantees low production costs. It also brings additional benefits. Co-integration allows for a drastic reduction of parasitic capacitances. Though passively quenched, a very short dead time of about 32 ns is then obtained. Furthermore, the number of charge carriers in a Geiger pulse is limited. As a consequence, the optical crosstalk probability is kept to a negligible level. For a large majority of the pixels, the maturity of the CMOS process leads to outstanding dark-count rates, even at room temperature. At 20 C, the characterized array exhibits 31 pixels with dark-count rate below 10 Hz. Only one pixel exhibits a dark-count rate of 300 Hz, which is still an acceptable value for most practical applications. Cleanness and reliability of the fabrication process allow us to obtain detectors without afterpulses and with a constant detection probability over the whole array. The design of the array can be easily modified for a particular application requiring a determined number of diodes in specific positions. The position accuracy of each pixel is below the micron, determined by the process photolithography. In case of a linear array, of interest for spectral analysis, the pitch between pixels can be reduced by placing the electronic circuits on each side of the detectors row. Signal multiplexing will have to be developed in dependence of the application. Finally, the CMOS fabrication allows one to integrate additional functionalities such as on-chip smart data processing. REFERENCES [1] C. W. Wilkerson, P. M. Goodwin, W. P. Ambrose, J. C. Martin, and R. A. Keller, “Detection and lifetime measurement of single molecules in flowing sample streams by laser-induced fluorescence,” Appl. Phys. Lett., vol. 62, pp. 2030–2032, Apr. 1993. [2] M. Eigen and R. Rigler, “Sorting single molecules application to diagnostics and evolutionary biotechnology,” in Proc. NAS, vol. 91, June 1994, pp. 5740–5747. [3] H. Blom et al., “Parallel fluorescence detection of single biomolecules in microarrays by a diffractive-optical-designed 2 2 fan-out element,” Appl. Opt., vol. 41, pp. 3336–3421, June 2002. [4] W. J. Kindt, H. W. Van-Zeijl, and S. Middelhoek, “Optical cross talk in Geiger mode avalanche photodiode arrays: modeling, prevention and measurement,” in Proc. 28th ESSDERC, Bordeaux, France, 1998, pp. 192–195. [5] F. Zappa et al., “Integrated array of avalanche photodiodes for singlephoton counting,” in Proc. 27th ESSDERC, Stuttgart, Germany, 1997, pp. 600–603. [6] A. Rochas et al., “Low-noise silicon avalanche photodiodes fabricated in conventional CMOS technologies,” IEEE Trans. Electron Devices, vol. 49, pp. 387–394, Mar. 2002. [7] A. Rochas, G. Ribordy, B. Furrer, P. A. Besse, and R. S. Popovic, “First passively-quenched single photon counting avalanche photodiode element integrated in a conventional CMOS process with 32 ns dead time,” Proc. SPIE, vol. 4833, pp. 107–116, Feb. 2003.
