How do I connect HW to SW? ... Suppose you want to build a big data analy cs ... app. HW req:: proxy event lib. HW wrapper bus driver app.methodName(). HW.
Jun 5, 2015 ... Eros film library of over 2,300 films is a stable source of revenue ... (2)
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1. PROJECT PRESENTATION: MEASUREMENT TOOL FOR
ENTREPRENEUSHIP EDUCATION. Elena Ruskovaara. Lappeenranta
University of Technology.
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Hardware Development. Myron King ... Suppose you want to build a big ... app. HW req:: proxy event lib. HW wrapper bus driver app.methodName(). HW fifos ... ARM. Bluesim. Ubuntu. Centos. Ubuntu. Android. Ubuntu. Centos. Zynq. Mini-âITX ...
Connectal A Framework for So2ware-‐Driven Hardware Development Myron King, Jamey Hicks, John Ankcorn Quanta Research Cambridge
Suppose you want to build a wheeled zedboard robot
• Buy robot kit – Some assembly required
• Start wriHng so2ware – BaIeries not included – Much assembly required – Zedboard embedded Linux tutorial 52 steps! – How many steps and files are really required? – How do I connect HW to SW? www.connectal.org
2
Suppose you want to build a big data analy:cs accelerator?
• Use off-‐the-‐shelf FPGA board • Build a Flash daughter card • Start wriHng so2ware – How many steps and files are really required? – Can’t I focus on the applicaHon? – Can I use python or javascript? – What if I change which FPGA board I use? www.connectal.org
3
Talk Outline • • • • •
MoHvaHon Target Systems ConnecHng Hardware to So2ware Sharing Memory What is Connectal?
www.connectal.org
4
Target Systems System Memory PCIe
FPGA
Host System
PCIe Expansion Card
X86 CPU
AcceleraHng data-‐centers video
System Memory
sonar AXI
FPGA
ARM CPU
h bridge gyro
Embedded System
Many common implementaHon challenges
Controlling embedded systems flash chip
System Memory
DDR
PCIe
FPGA
Host System
PCIe Expansion Card
X86 CPU
flash chip flash chip flash chip
Novel architectures for Big Data www.connectal.org
5
Zedboard Robot So2ware Stack Using Connectal User Space
Robot Control So2ware
Linux Kernel
Sensor Device Driver
FPGA External Device
Sensor Interface
• • •
Gyroscope Sensor
• • •
3 user-‐defined components Each with its own computaHonal model Each with its own programming language Can we eliminate the need for the Sensor Device Driver? Yes: User-‐mode access to hardware Now only 2 user-‐defined components!
BSV reduces the gap BSV module gyro(Gyro); method AcHon sample(...); ... endmethod ... endmodule
So=ware gyro-‐>sample(...)
A BSV method is like an AXI stream port to a Verilog module
www.connectal.org
8
Asynchronous Remote Method InvocaHon • Long latency to hardware -‐> asynchronous • So2ware invokes remote so2ware by sending a message through a socket or shared memory • So2ware invokes hardware by sending a message • Hardware invokes so2ware by sending a message www.connectal.org
Portal Message Transports • Just showed memory mapped hardware FIFOs • Other opHons – Shared memory FIFOs
• So2ware-‐to-‐So2ware IPC – Shared memory FIFOs – Unix Sockets – TCP – Web Sockets (to talk to your Javascript!)
• Binary or JSON message encoding www.connectal.org
14
Sharing Memory (DMA) • Achieving performance goals o2en requires direct HW access to shared memory – String search example – Samples from sensors such as gyroscope
• PortalMem – Provides reference-‐counted sharing of memory buffers between user processes and HW – Provides logical/physical translaHons of non-‐ conHguous physical memory for HW www.connectal.org
15
Shared Memory HW • Simple MMU for non-‐conHguous physical regions • BSV libraries for bus-‐mastering (DMA engines) • Infra for sharing full-‐speed bus access among many hardware clients
www.connectal.org
16
The Connectal Framework 1. Easy declaraHon and invocaHon of remote methods between host so2ware and FPGA using Portals 2. Direct user-‐mode access to accelerators from so2ware 3. High performance read/write bus master access to system memory from FPGA 4. Infrastructure for sharing full-‐speed memory port access between clients in FPGA 5. Portability across plarorms (CPUs, OperaHng Systems, buses, FPGAs) 6. Fully integrated tool-‐chain support for dependency builds and device configuraHon www.connectal.org
• Provides a streamlined flow for building and running HW/SW apps – make build.zedboard – make run.zedboard
• Cloud-‐based toolchain available www.connectal.org
18
Plarorm Portability and Tool Chain Support Ubuntu
KC705
Centos
Ubuntu
x86
ARM
PCIe
AXI
VC707
ZYBO
Zedboard
Ubuntu
Android
Centos
Bluesim
ZC702
ZC706
Parallela
Zynq Mini-‐ITX
Tool-‐chain support • Available as a service at connectalbuild.qrclab.com • Program some devices directly from your browser www.connectal.org
19
Connectal • Open source on github: – hIps://github.com/cambridgehackers/connectal
• DocumentaHon (some) – hIp://www.connectal.org/
• Public build service – Free for open source projects – Compile and run on your zedboard with zero so2ware installs – hIp://build.connectal.org/ www.connectal.org
20
BACKUP
www.connectal.org
21
What is a Portal? Using Bluespec System Verilog (BSV), the user declares logical groups of unidirecHonal “send” methods, each of which is implemented as a fifo channel by the Connectal interface compiler; all channels corresponding to a single BSV interface are grouped together into a single portal.
www.connectal.org
22
Remote Methods through Portals 1. Define HW/SW interfaces using BSV 2. Invoke interface compiler to generate Wrappers and Proxies 3. Connect user-‐so2ware and user-‐ hardware using generated “glue” User So2ware void found(int loc){ … }